ASoC: Updates for v3.15
This is mostly a few additional fixes from Lars-Peter, a new driver and cleaning up a git failure with merging the Intel branch (combined with an xargs failure to pay attention to error codes). The history lists a bunch of additional commits for the branch but the content of those commits is actually present already but not recorded in history due to git failing. Unfortunately xargs is used in the merge script and it doesn't do a good job of noticing errors from the commands it invokes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJTIb/oAAoJELSic+t+oim9w5gP/AnPxNltiReYgAWgkT9KfG+y eAD4QbAxc66FAMRicsyArM0Y+jilgFIhh9Ved6cy70oDgUuMQHU3Ma5/W4dCYdBh WLLz5YaCqgaHFxLKWsp2vYG4pZik0Yp7hMCC0j391/6LQyVMSTsulHy70zAbhDGK NpP+Z1BfB/mwDAftECGuTAmS5lJOkZ5vSkAr20n3/Omg9P/3dJ0ZixMSyVSPLyjJ +1lpQ0FYGwaPmfxivXBS7y5XaBQQ8yggLMlZJcNC13Ye2zB0yaBrXC8/cVyE+S3z 5MIpwilbRsWyam2/aOa3Q5gTsTKwvWWoikIHPFTUc0qFGVr5DVea2eipuAaElPQ3 hB7UxjhgHUEaMmpZMZp15NYieOrixS5U/es+rrugJOMp8yxazIatSipYD+P3LYeN I2esMnLRWr+9FGudFvwdHlmx8UQ4CDPTp1V87kibKt6SRe9GluaGnJx+YZFzH3dq 1VZ5lA4t5Q53wTtwwsY1A7bNQxcLKwMHDr56xQMOoRZTuiBNxd5GuVQem/Obz5tg x+8iniasCc24pP3z95Ilx5EpW1FFyOsqXZHugup81O7SdtGuOWcrYaFVkfURVnaQ g04agU1ObK8bvQR2CFkux6F96nktBix9Y9PQFZrzEhKK+4qGjBSJVJBcNCKfd+NB btf2vWOw5jt2XodkguiZ =nG53 -----END PGP SIGNATURE----- Merge tag 'asoc-v3.15-2' into asoc-linus ASoC: Updates for v3.15 This is mostly a few additional fixes from Lars-Peter, a new driver and cleaning up a git failure with merging the Intel branch (combined with an xargs failure to pay attention to error codes). The history lists a bunch of additional commits for the branch but the content of those commits is actually present already but not recorded in history due to git failing. Unfortunately xargs is used in the merge script and it doesn't do a good job of noticing errors from the commands it invokes. # gpg: Signature made Thu 13 Mar 2014 14:25:44 GMT using RSA key ID 7EA229BD # gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>" # gpg: aka "Mark Brown <broonie@debian.org>" # gpg: aka "Mark Brown <broonie@kernel.org>" # gpg: aka "Mark Brown <broonie@tardis.ed.ac.uk>" # gpg: aka "Mark Brown <broonie@linaro.org>" # gpg: aka "Mark Brown <Mark.Brown@linaro.org>"
This commit is contained in:
commit
f7cf71e3df
|
@ -0,0 +1,24 @@
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|||
Device Tree bindings for the Armada 370 DB audio
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||||
================================================
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||||
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||||
These Device Tree bindings are used to describe the audio complex
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||||
found on the Armada 370 DB platform.
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Mandatory properties:
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* compatible: must be "marvell,a370db-audio"
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* marvell,audio-controller: a phandle that points to the audio
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controller of the Armada 370 SoC.
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* marvell,audio-codec: a phandle that points to the analog audio
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codec connected to the Armada 370 SoC.
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Example:
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sound {
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compatible = "marvell,a370db-audio";
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marvell,audio-controller = <&audio_controller>;
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marvell,audio-codec = <&audio_codec>;
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status = "okay";
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};
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@ -5,6 +5,7 @@ Required properties:
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- compatible:
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"marvell,kirkwood-audio" for Kirkwood platforms
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"marvell,dove-audio" for Dove platforms
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"marvell,armada370-audio" for Armada 370 platforms
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- reg: physical base address of the controller and length of memory mapped
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region.
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|
|
61
Documentation/devicetree/bindings/sound/tlv320aic31xx.txt
Normal file
61
Documentation/devicetree/bindings/sound/tlv320aic31xx.txt
Normal file
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@ -0,0 +1,61 @@
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Texas Instruments - tlv320aic31xx Codec module
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The tlv320aic31xx serial control bus communicates through I2C protocols
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Required properties:
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- compatible - "string" - One of:
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"ti,tlv320aic310x" - Generic TLV320AIC31xx with mono speaker amp
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"ti,tlv320aic311x" - Generic TLV320AIC31xx with stereo speaker amp
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"ti,tlv320aic3100" - TLV320AIC3100 (mono speaker amp, no MiniDSP)
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"ti,tlv320aic3110" - TLV320AIC3110 (stereo speaker amp, no MiniDSP)
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"ti,tlv320aic3120" - TLV320AIC3120 (mono speaker amp, MiniDSP)
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"ti,tlv320aic3111" - TLV320AIC3111 (stereo speaker amp, MiniDSP)
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- reg - <int> - I2C slave address
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Optional properties:
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- gpio-reset - gpio pin number used for codec reset
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- ai31xx-micbias-vg - MicBias Voltage setting
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1 or MICBIAS_2_0V - MICBIAS output is powered to 2.0V
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2 or MICBIAS_2_5V - MICBIAS output is powered to 2.5V
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3 or MICBIAS_AVDD - MICBIAS output is connected to AVDD
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If this node is not mentioned or if the value is unknown, then
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micbias is set to 2.0V.
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- HPVDD-supply, SPRVDD-supply, SPLVDD-supply, AVDD-supply, IOVDD-supply,
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DVDD-supply : power supplies for the device as covered in
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Documentation/devicetree/bindings/regulator/regulator.txt
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|
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CODEC output pins:
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* HPL
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* HPR
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* SPL, devices with stereo speaker amp
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* SPR, devices with stereo speaker amp
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* SPK, devices with mono speaker amp
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* MICBIAS
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CODEC input pins:
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* MIC1LP
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* MIC1RP
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* MIC1LM
|
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|
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The pins can be used in referring sound node's audio-routing property.
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|
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Example:
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#include <dt-bindings/sound/tlv320aic31xx-micbias.h>
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|
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tlv320aic31xx: tlv320aic31xx@18 {
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compatible = "ti,tlv320aic311x";
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reg = <0x18>;
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ai31xx-micbias-vg = <MICBIAS_OFF>;
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|
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HPVDD-supply = <®ulator>;
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SPRVDD-supply = <®ulator>;
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SPLVDD-supply = <®ulator>;
|
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AVDD-supply = <®ulator>;
|
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IOVDD-supply = <®ulator>;
|
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DVDD-supply = <®ulator>;
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};
|
|
@ -2203,6 +2203,13 @@ L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
|||
S: Odd Fixes
|
||||
F: sound/soc/codecs/cs4270*
|
||||
|
||||
CIRRUS LOGIC AUDIO CODEC DRIVERS
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M: Brian Austin <brian.austin@cirrus.com>
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M: Paul Handrigan <Paul.Handrigan@cirrus.com>
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||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: sound/soc/codecs/cs*
|
||||
|
||||
CLEANCACHE API
|
||||
M: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
|
|
8
include/dt-bindings/sound/tlv320aic31xx-micbias.h
Normal file
8
include/dt-bindings/sound/tlv320aic31xx-micbias.h
Normal file
|
@ -0,0 +1,8 @@
|
|||
#ifndef __DT_TLV320AIC31XX_MICBIAS_H
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||||
#define __DT_TLV320AIC31XX_MICBIAS_H
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||||
|
||||
#define MICBIAS_2_0V 1
|
||||
#define MICBIAS_2_5V 2
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||||
#define MICBIAS_AVDDV 3
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||||
|
||||
#endif /* __DT_TLV320AIC31XX_MICBIAS_H */
|
|
@ -354,12 +354,6 @@ typedef int (*hw_write_t)(void *,const char* ,int);
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|||
|
||||
extern struct snd_ac97_bus_ops *soc_ac97_ops;
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|
||||
enum snd_soc_control_type {
|
||||
SND_SOC_I2C = 1,
|
||||
SND_SOC_SPI,
|
||||
SND_SOC_REGMAP,
|
||||
};
|
||||
|
||||
enum snd_soc_pcm_subclass {
|
||||
SND_SOC_PCM_CLASS_PCM = 0,
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||||
SND_SOC_PCM_CLASS_BE = 1,
|
||||
|
@ -406,8 +400,7 @@ int snd_soc_codec_readable_register(struct snd_soc_codec *codec,
|
|||
int snd_soc_codec_writable_register(struct snd_soc_codec *codec,
|
||||
unsigned int reg);
|
||||
int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
|
||||
int addr_bits, int data_bits,
|
||||
enum snd_soc_control_type control);
|
||||
struct regmap *regmap);
|
||||
int snd_soc_cache_sync(struct snd_soc_codec *codec);
|
||||
int snd_soc_cache_init(struct snd_soc_codec *codec);
|
||||
int snd_soc_cache_exit(struct snd_soc_codec *codec);
|
||||
|
@ -614,7 +607,8 @@ struct snd_soc_jack_gpio {
|
|||
struct snd_soc_jack *jack;
|
||||
struct delayed_work work;
|
||||
|
||||
int (*jack_status_check)(void);
|
||||
void *data;
|
||||
int (*jack_status_check)(void *data);
|
||||
};
|
||||
|
||||
struct snd_soc_jack {
|
||||
|
@ -717,7 +711,6 @@ struct snd_soc_codec {
|
|||
/* codec IO */
|
||||
void *control_data; /* codec control (i2c/3wire) data */
|
||||
hw_write_t hw_write;
|
||||
unsigned int (*hw_read)(struct snd_soc_codec *, unsigned int);
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||||
unsigned int (*read)(struct snd_soc_codec *, unsigned int);
|
||||
int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
|
||||
void *reg_cache;
|
||||
|
|
|
@ -65,18 +65,6 @@ static const struct snd_soc_dapm_route audio_map[] = {
|
|||
{"MICIN", NULL, "Mic Jack"},
|
||||
};
|
||||
|
||||
static int snappercl15_tlv320aic23_init(struct snd_soc_pcm_runtime *rtd)
|
||||
{
|
||||
struct snd_soc_codec *codec = rtd->codec;
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||||
struct snd_soc_dapm_context *dapm = &codec->dapm;
|
||||
|
||||
snd_soc_dapm_new_controls(dapm, tlv320aic23_dapm_widgets,
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||||
ARRAY_SIZE(tlv320aic23_dapm_widgets));
|
||||
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||||
snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
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||||
return 0;
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||||
}
|
||||
|
||||
static struct snd_soc_dai_link snappercl15_dai = {
|
||||
.name = "tlv320aic23",
|
||||
.stream_name = "AIC23",
|
||||
|
@ -84,7 +72,6 @@ static struct snd_soc_dai_link snappercl15_dai = {
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|||
.codec_dai_name = "tlv320aic23-hifi",
|
||||
.codec_name = "tlv320aic23-codec.0-001a",
|
||||
.platform_name = "ep93xx-i2s",
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||||
.init = snappercl15_tlv320aic23_init,
|
||||
.dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_IF |
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||||
SND_SOC_DAIFMT_CBS_CFS,
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.ops = &snappercl15_ops,
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||||
|
@ -95,6 +82,11 @@ static struct snd_soc_card snd_soc_snappercl15 = {
|
|||
.owner = THIS_MODULE,
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||||
.dai_link = &snappercl15_dai,
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.num_links = 1,
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||||
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||||
.dapm_widgets = tlv320aic23_dapm_widgets,
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||||
.num_dapm_widgets = ARRAY_SIZE(tlv320aic23_dapm_widgets),
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.dapm_routes = audio_map,
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||||
.num_dapm_routes = ARRAY_SIZE(audio_map),
|
||||
};
|
||||
|
||||
static int snappercl15_probe(struct platform_device *pdev)
|
||||
|
|
|
@ -1327,8 +1327,7 @@ static int pm860x_probe(struct snd_soc_codec *codec)
|
|||
|
||||
pm860x->codec = codec;
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||||
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codec->control_data = pm860x->regmap;
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ret = snd_soc_codec_set_cache_io(codec, 0, 0, SND_SOC_REGMAP);
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ret = snd_soc_codec_set_cache_io(codec, pm860x->regmap);
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if (ret)
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||||
return ret;
|
||||
|
||||
|
|
|
@ -85,6 +85,7 @@ config SND_SOC_ALL_CODECS
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select SND_SOC_TLV320AIC23_I2C if I2C
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select SND_SOC_TLV320AIC23_SPI if SPI_MASTER
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select SND_SOC_TLV320AIC26 if SPI_MASTER
|
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select SND_SOC_TLV320AIC31XX if I2C
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select SND_SOC_TLV320AIC32X4 if I2C
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select SND_SOC_TLV320AIC3X if I2C
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select SND_SOC_TPA6130A2 if I2C
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|
@ -449,6 +450,9 @@ config SND_SOC_TLV320AIC26
|
|||
tristate
|
||||
depends on SPI
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||||
|
||||
config SND_SOC_TLV320AIC31XX
|
||||
tristate
|
||||
|
||||
config SND_SOC_TLV320AIC32X4
|
||||
tristate
|
||||
|
||||
|
|
|
@ -79,6 +79,7 @@ snd-soc-tlv320aic23-objs := tlv320aic23.o
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|||
snd-soc-tlv320aic23-i2c-objs := tlv320aic23-i2c.o
|
||||
snd-soc-tlv320aic23-spi-objs := tlv320aic23-spi.o
|
||||
snd-soc-tlv320aic26-objs := tlv320aic26.o
|
||||
snd-soc-tlv320aic31xx-objs := tlv320aic31xx.o
|
||||
snd-soc-tlv320aic32x4-objs := tlv320aic32x4.o
|
||||
snd-soc-tlv320aic3x-objs := tlv320aic3x.o
|
||||
snd-soc-tlv320dac33-objs := tlv320dac33.o
|
||||
|
@ -223,6 +224,7 @@ obj-$(CONFIG_SND_SOC_TLV320AIC23) += snd-soc-tlv320aic23.o
|
|||
obj-$(CONFIG_SND_SOC_TLV320AIC23_I2C) += snd-soc-tlv320aic23-i2c.o
|
||||
obj-$(CONFIG_SND_SOC_TLV320AIC23_SPI) += snd-soc-tlv320aic23-spi.o
|
||||
obj-$(CONFIG_SND_SOC_TLV320AIC26) += snd-soc-tlv320aic26.o
|
||||
obj-$(CONFIG_SND_SOC_TLV320AIC31XX) += snd-soc-tlv320aic31xx.o
|
||||
obj-$(CONFIG_SND_SOC_TLV320AIC32X4) += snd-soc-tlv320aic32x4.o
|
||||
obj-$(CONFIG_SND_SOC_TLV320AIC3X) += snd-soc-tlv320aic3x.o
|
||||
obj-$(CONFIG_SND_SOC_TLV320DAC33) += snd-soc-tlv320dac33.o
|
||||
|
|
|
@ -322,14 +322,6 @@ static struct snd_soc_dai_driver ad193x_dai = {
|
|||
static int ad193x_codec_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct ad193x_priv *ad193x = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
codec->control_data = ad193x->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 0, 0, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* default setting for ad193x */
|
||||
|
||||
|
@ -347,7 +339,7 @@ static int ad193x_codec_probe(struct snd_soc_codec *codec)
|
|||
regmap_write(ad193x->regmap, AD193X_PLL_CLK_CTRL0, 0x99); /* mclk=24.576Mhz: 0x9D; mclk=12.288Mhz: 0x99 */
|
||||
regmap_write(ad193x->regmap, AD193X_PLL_CLK_CTRL1, 0x04);
|
||||
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct snd_soc_codec_driver soc_codec_dev_ad193x = {
|
||||
|
|
|
@ -1376,15 +1376,8 @@ static int adau1373_probe(struct snd_soc_codec *codec)
|
|||
struct adau1373_platform_data *pdata = codec->dev->platform_data;
|
||||
bool lineout_differential = false;
|
||||
unsigned int val;
|
||||
int ret;
|
||||
int i;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 0, 0, SND_SOC_REGMAP);
|
||||
if (ret) {
|
||||
dev_err(codec->dev, "failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (pdata) {
|
||||
if (pdata->num_drc > ARRAY_SIZE(pdata->drc_setting))
|
||||
return -EINVAL;
|
||||
|
|
|
@ -801,15 +801,8 @@ static struct snd_soc_dai_driver adav80x_dais[] = {
|
|||
|
||||
static int adav80x_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
int ret;
|
||||
struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec);
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 0, 0, SND_SOC_REGMAP);
|
||||
if (ret) {
|
||||
dev_err(codec->dev, "failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Force PLLs on for SYSCLK output */
|
||||
snd_soc_dapm_force_enable_pin(&codec->dapm, "PLL1");
|
||||
snd_soc_dapm_force_enable_pin(&codec->dapm, "PLL2");
|
||||
|
|
|
@ -388,15 +388,6 @@ static int ak4535_resume(struct snd_soc_codec *codec)
|
|||
|
||||
static int ak4535_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct ak4535_priv *ak4535 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
codec->control_data = ak4535->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
/* power on device */
|
||||
ak4535_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
|
||||
|
|
|
@ -519,14 +519,6 @@ static int ak4641_resume(struct snd_soc_codec *codec)
|
|||
|
||||
static int ak4641_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* power on device */
|
||||
ak4641_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
|
||||
|
|
|
@ -465,14 +465,6 @@ static int ak4642_resume(struct snd_soc_codec *codec)
|
|||
|
||||
static int ak4642_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ak4642_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -613,17 +613,7 @@ static struct snd_soc_dai_driver ak4671_dai = {
|
|||
|
||||
static int ak4671_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ak4671_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
|
||||
return ret;
|
||||
return ak4671_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
}
|
||||
|
||||
static int ak4671_remove(struct snd_soc_codec *codec)
|
||||
|
|
|
@ -904,13 +904,6 @@ static int alc5623_probe(struct snd_soc_codec *codec)
|
|||
struct snd_soc_dapm_context *dapm = &codec->dapm;
|
||||
int ret;
|
||||
|
||||
codec->control_data = alc5623->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
alc5623_reset(codec);
|
||||
|
||||
/* power on device */
|
||||
|
|
|
@ -1063,14 +1063,6 @@ static int alc5632_probe(struct snd_soc_codec *codec)
|
|||
struct alc5632_priv *alc5632 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
codec->control_data = alc5632->regmap;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* power on device */
|
||||
alc5632_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
|
||||
|
|
|
@ -138,9 +138,8 @@ static int cq93vc_probe(struct snd_soc_codec *codec)
|
|||
struct davinci_vc *davinci_vc = codec->dev->platform_data;
|
||||
|
||||
davinci_vc->cq93vc.codec = codec;
|
||||
codec->control_data = davinci_vc->regmap;
|
||||
|
||||
snd_soc_codec_set_cache_io(codec, 32, 32, SND_SOC_REGMAP);
|
||||
snd_soc_codec_set_cache_io(codec, davinci_vc->regmap);
|
||||
|
||||
/* Off, with power on */
|
||||
cq93vc_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
|
|
|
@ -506,15 +506,6 @@ static int cs4270_probe(struct snd_soc_codec *codec)
|
|||
struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
/* Tell ASoC what kind of I/O to use to read the registers. ASoC will
|
||||
* then do the I2C transactions itself.
|
||||
*/
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "failed to set cache I/O (ret=%i)\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Disable auto-mute. This feature appears to be buggy. In some
|
||||
* situations, auto-mute will not deactivate when it should, so we want
|
||||
* this feature disabled by default. An application (e.g. alsactl) can
|
||||
|
|
|
@ -488,12 +488,6 @@ static int cs42l51_probe(struct snd_soc_codec *codec)
|
|||
{
|
||||
int ret, reg;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* DAC configuration
|
||||
* - Use signal processor
|
||||
|
|
|
@ -1109,14 +1109,7 @@ static void cs42l52_free_beep(struct snd_soc_codec *codec)
|
|||
static int cs42l52_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct cs42l52_private *cs42l52 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
codec->control_data = cs42l52->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
regcache_cache_only(cs42l52->regmap, true);
|
||||
|
||||
cs42l52_add_mic_controls(codec);
|
||||
|
@ -1128,7 +1121,7 @@ static int cs42l52_probe(struct snd_soc_codec *codec)
|
|||
cs42l52->sysclk = CS42L52_DEFAULT_CLK;
|
||||
cs42l52->config.format = CS42L52_DEFAULT_FORMAT;
|
||||
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int cs42l52_remove(struct snd_soc_codec *codec)
|
||||
|
|
|
@ -1345,17 +1345,8 @@ static int cs42l73_resume(struct snd_soc_codec *codec)
|
|||
|
||||
static int cs42l73_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
int ret;
|
||||
struct cs42l73_private *cs42l73 = snd_soc_codec_get_drvdata(codec);
|
||||
|
||||
codec->control_data = cs42l73->regmap;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
cs42l73_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
|
||||
/* Set Charge Pump Frequency */
|
||||
|
@ -1368,7 +1359,7 @@ static int cs42l73_probe(struct snd_soc_codec *codec)
|
|||
cs42l73->mclksel = CS42L73_CLKID_MCLK1;
|
||||
cs42l73->mclk = 0;
|
||||
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int cs42l73_remove(struct snd_soc_codec *codec)
|
||||
|
|
|
@ -1071,17 +1071,9 @@ static struct snd_soc_dai_driver da7210_dai = {
|
|||
static int da7210_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct da7210_priv *da7210 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
dev_info(codec->dev, "DA7210 Audio Codec %s\n", DA7210_VERSION);
|
||||
|
||||
codec->control_data = da7210->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
da7210->mclk_rate = 0; /* This will be set from set_sysclk() */
|
||||
da7210->master = 0; /* This will be set from set_fmt() */
|
||||
|
||||
|
|
|
@ -1393,17 +1393,9 @@ static int da7213_set_bias_level(struct snd_soc_codec *codec,
|
|||
|
||||
static int da7213_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
int ret;
|
||||
struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
|
||||
struct da7213_platform_data *pdata = da7213->pdata;
|
||||
|
||||
codec->control_data = da7213->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Default to using ALC auto offset calibration mode. */
|
||||
snd_soc_update_bits(codec, DA7213_ALC_CTRL1,
|
||||
DA7213_ALC_CALIB_MODE_MAN, 0);
|
||||
|
|
|
@ -1297,9 +1297,9 @@ static void da732x_dac_offset_adjust(struct snd_soc_codec *codec)
|
|||
msleep(DA732X_WAIT_FOR_STABILIZATION);
|
||||
|
||||
/* Check DAC offset sign */
|
||||
sign[DA732X_HPL_DAC] = (codec->hw_read(codec, DA732X_REG_HPL_DAC_OFF_CNTL) &
|
||||
sign[DA732X_HPL_DAC] = (snd_soc_read(codec, DA732X_REG_HPL_DAC_OFF_CNTL) &
|
||||
DA732X_HP_DAC_OFF_CNTL_COMPO);
|
||||
sign[DA732X_HPR_DAC] = (codec->hw_read(codec, DA732X_REG_HPR_DAC_OFF_CNTL) &
|
||||
sign[DA732X_HPR_DAC] = (snd_soc_read(codec, DA732X_REG_HPR_DAC_OFF_CNTL) &
|
||||
DA732X_HP_DAC_OFF_CNTL_COMPO);
|
||||
|
||||
/* Binary search DAC offset values (both channels at once) */
|
||||
|
@ -1316,10 +1316,10 @@ static void da732x_dac_offset_adjust(struct snd_soc_codec *codec)
|
|||
|
||||
msleep(DA732X_WAIT_FOR_STABILIZATION);
|
||||
|
||||
if ((codec->hw_read(codec, DA732X_REG_HPL_DAC_OFF_CNTL) &
|
||||
if ((snd_soc_read(codec, DA732X_REG_HPL_DAC_OFF_CNTL) &
|
||||
DA732X_HP_DAC_OFF_CNTL_COMPO) ^ sign[DA732X_HPL_DAC])
|
||||
offset[DA732X_HPL_DAC] &= ~step;
|
||||
if ((codec->hw_read(codec, DA732X_REG_HPR_DAC_OFF_CNTL) &
|
||||
if ((snd_soc_read(codec, DA732X_REG_HPR_DAC_OFF_CNTL) &
|
||||
DA732X_HP_DAC_OFF_CNTL_COMPO) ^ sign[DA732X_HPR_DAC])
|
||||
offset[DA732X_HPR_DAC] &= ~step;
|
||||
|
||||
|
@ -1360,9 +1360,9 @@ static void da732x_output_offset_adjust(struct snd_soc_codec *codec)
|
|||
msleep(DA732X_WAIT_FOR_STABILIZATION);
|
||||
|
||||
/* Check output offset sign */
|
||||
sign[DA732X_HPL_AMP] = codec->hw_read(codec, DA732X_REG_HPL) &
|
||||
sign[DA732X_HPL_AMP] = snd_soc_read(codec, DA732X_REG_HPL) &
|
||||
DA732X_HP_OUT_COMPO;
|
||||
sign[DA732X_HPR_AMP] = codec->hw_read(codec, DA732X_REG_HPR) &
|
||||
sign[DA732X_HPR_AMP] = snd_soc_read(codec, DA732X_REG_HPR) &
|
||||
DA732X_HP_OUT_COMPO;
|
||||
|
||||
snd_soc_write(codec, DA732X_REG_HPL, DA732X_HP_OUT_COMP |
|
||||
|
@ -1383,10 +1383,10 @@ static void da732x_output_offset_adjust(struct snd_soc_codec *codec)
|
|||
|
||||
msleep(DA732X_WAIT_FOR_STABILIZATION);
|
||||
|
||||
if ((codec->hw_read(codec, DA732X_REG_HPL) &
|
||||
if ((snd_soc_read(codec, DA732X_REG_HPL) &
|
||||
DA732X_HP_OUT_COMPO) ^ sign[DA732X_HPL_AMP])
|
||||
offset[DA732X_HPL_AMP] &= ~step;
|
||||
if ((codec->hw_read(codec, DA732X_REG_HPR) &
|
||||
if ((snd_soc_read(codec, DA732X_REG_HPR) &
|
||||
DA732X_HP_OUT_COMPO) ^ sign[DA732X_HPR_AMP])
|
||||
offset[DA732X_HPR_AMP] &= ~step;
|
||||
|
||||
|
@ -1512,23 +1512,14 @@ static int da732x_probe(struct snd_soc_codec *codec)
|
|||
{
|
||||
struct da732x_priv *da732x = snd_soc_codec_get_drvdata(codec);
|
||||
struct snd_soc_dapm_context *dapm = &codec->dapm;
|
||||
int ret = 0;
|
||||
|
||||
da732x->codec = codec;
|
||||
|
||||
dapm->idle_bias_off = false;
|
||||
|
||||
codec->control_data = da732x->regmap;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to register codec.\n");
|
||||
goto err;
|
||||
}
|
||||
|
||||
da732x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
err:
|
||||
return ret;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int da732x_remove(struct snd_soc_codec *codec)
|
||||
|
|
|
@ -1383,16 +1383,8 @@ static int da9055_set_bias_level(struct snd_soc_codec *codec,
|
|||
|
||||
static int da9055_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
int ret;
|
||||
struct da9055_priv *da9055 = snd_soc_codec_get_drvdata(codec);
|
||||
|
||||
codec->control_data = da9055->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Enable all Gain Ramps */
|
||||
snd_soc_update_bits(codec, DA9055_AUX_L_CTRL,
|
||||
DA9055_GAIN_RAMPING_EN, DA9055_GAIN_RAMPING_EN);
|
||||
|
|
|
@ -1090,23 +1090,7 @@ static struct snd_soc_dai_driver isabelle_dai[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static int isabelle_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
codec->control_data = dev_get_regmap(codec->dev, NULL);
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct snd_soc_codec_driver soc_codec_dev_isabelle = {
|
||||
.probe = isabelle_probe,
|
||||
.set_bias_level = isabelle_set_bias_level,
|
||||
.controls = isabelle_snd_controls,
|
||||
.num_controls = ARRAY_SIZE(isabelle_snd_controls),
|
||||
|
|
|
@ -101,8 +101,7 @@ static const char *lm4857_mode[] = {
|
|||
"Headphone",
|
||||
};
|
||||
|
||||
static const struct soc_enum lm4857_mode_enum =
|
||||
SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(lm4857_mode), lm4857_mode);
|
||||
static SOC_ENUM_SINGLE_EXT_DECL(lm4857_mode_enum, lm4857_mode);
|
||||
|
||||
static const struct snd_soc_dapm_widget lm4857_dapm_widgets[] = {
|
||||
SND_SOC_DAPM_INPUT("IN"),
|
||||
|
|
|
@ -213,15 +213,13 @@ static const char *lm49453_adcl_mux_text[] = { "MIC1", "Aux_L" };
|
|||
|
||||
static const char *lm49453_adcr_mux_text[] = { "MIC2", "Aux_R" };
|
||||
|
||||
static const struct soc_enum lm49453_adcl_enum =
|
||||
SOC_ENUM_SINGLE(LM49453_P0_ANALOG_MIXER_ADC_REG, 0,
|
||||
ARRAY_SIZE(lm49453_adcl_mux_text),
|
||||
lm49453_adcl_mux_text);
|
||||
static SOC_ENUM_SINGLE_DECL(lm49453_adcl_enum,
|
||||
LM49453_P0_ANALOG_MIXER_ADC_REG, 0,
|
||||
lm49453_adcl_mux_text);
|
||||
|
||||
static const struct soc_enum lm49453_adcr_enum =
|
||||
SOC_ENUM_SINGLE(LM49453_P0_ANALOG_MIXER_ADC_REG, 1,
|
||||
ARRAY_SIZE(lm49453_adcr_mux_text),
|
||||
lm49453_adcr_mux_text);
|
||||
static SOC_ENUM_SINGLE_DECL(lm49453_adcr_enum,
|
||||
LM49453_P0_ANALOG_MIXER_ADC_REG, 1,
|
||||
lm49453_adcr_mux_text);
|
||||
|
||||
static const struct snd_kcontrol_new lm49453_adcl_mux_control =
|
||||
SOC_DAPM_ENUM("ADC Left Mux", lm49453_adcl_enum);
|
||||
|
@ -1409,22 +1407,6 @@ static int lm49453_resume(struct snd_soc_codec *codec)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int lm49453_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct lm49453_priv *lm49453 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret = 0;
|
||||
|
||||
codec->control_data = lm49453->regmap;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* power down chip */
|
||||
static int lm49453_remove(struct snd_soc_codec *codec)
|
||||
{
|
||||
|
@ -1433,7 +1415,6 @@ static int lm49453_remove(struct snd_soc_codec *codec)
|
|||
}
|
||||
|
||||
static struct snd_soc_codec_driver soc_codec_dev_lm49453 = {
|
||||
.probe = lm49453_probe,
|
||||
.remove = lm49453_remove,
|
||||
.suspend = lm49453_suspend,
|
||||
.resume = lm49453_resume,
|
||||
|
|
|
@ -135,11 +135,6 @@ static int max9768_probe(struct snd_soc_codec *codec)
|
|||
struct max9768 *max9768 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
codec->control_data = max9768->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 2, 6, SND_SOC_REGMAP);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (max9768->flags & MAX9768_FLAG_CLASSIC_PWM) {
|
||||
ret = snd_soc_write(codec, MAX9768_CTRL, MAX9768_CTRL_PWM);
|
||||
if (ret)
|
||||
|
|
|
@ -597,28 +597,27 @@ static const unsigned int max98088_exmode_values[] = {
|
|||
0x00, 0x43, 0x10, 0x20, 0x30, 0x40, 0x11, 0x22, 0x32
|
||||
};
|
||||
|
||||
static const struct soc_enum max98088_exmode_enum =
|
||||
SOC_VALUE_ENUM_SINGLE(M98088_REG_41_SPKDHP, 0, 127,
|
||||
ARRAY_SIZE(max98088_exmode_texts),
|
||||
max98088_exmode_texts,
|
||||
max98088_exmode_values);
|
||||
static SOC_VALUE_ENUM_SINGLE_DECL(max98088_exmode_enum,
|
||||
M98088_REG_41_SPKDHP, 0, 127,
|
||||
max98088_exmode_texts,
|
||||
max98088_exmode_values);
|
||||
|
||||
static const char *max98088_ex_thresh[] = { /* volts PP */
|
||||
"0.6", "1.2", "1.8", "2.4", "3.0", "3.6", "4.2", "4.8"};
|
||||
static const struct soc_enum max98088_ex_thresh_enum[] = {
|
||||
SOC_ENUM_SINGLE(M98088_REG_42_SPKDHP_THRESH, 0, 8,
|
||||
max98088_ex_thresh),
|
||||
};
|
||||
static SOC_ENUM_SINGLE_DECL(max98088_ex_thresh_enum,
|
||||
M98088_REG_42_SPKDHP_THRESH, 0,
|
||||
max98088_ex_thresh);
|
||||
|
||||
static const char *max98088_fltr_mode[] = {"Voice", "Music" };
|
||||
static const struct soc_enum max98088_filter_mode_enum[] = {
|
||||
SOC_ENUM_SINGLE(M98088_REG_18_DAI1_FILTERS, 7, 2, max98088_fltr_mode),
|
||||
};
|
||||
static SOC_ENUM_SINGLE_DECL(max98088_filter_mode_enum,
|
||||
M98088_REG_18_DAI1_FILTERS, 7,
|
||||
max98088_fltr_mode);
|
||||
|
||||
static const char *max98088_extmic_text[] = { "None", "MIC1", "MIC2" };
|
||||
|
||||
static const struct soc_enum max98088_extmic_enum =
|
||||
SOC_ENUM_SINGLE(M98088_REG_48_CFG_MIC, 0, 3, max98088_extmic_text);
|
||||
static SOC_ENUM_SINGLE_DECL(max98088_extmic_enum,
|
||||
M98088_REG_48_CFG_MIC, 0,
|
||||
max98088_extmic_text);
|
||||
|
||||
static const struct snd_kcontrol_new max98088_extmic_mux =
|
||||
SOC_DAPM_ENUM("External MIC Mux", max98088_extmic_enum);
|
||||
|
@ -626,12 +625,12 @@ static const struct snd_kcontrol_new max98088_extmic_mux =
|
|||
static const char *max98088_dai1_fltr[] = {
|
||||
"Off", "fc=258/fs=16k", "fc=500/fs=16k",
|
||||
"fc=258/fs=8k", "fc=500/fs=8k", "fc=200"};
|
||||
static const struct soc_enum max98088_dai1_dac_filter_enum[] = {
|
||||
SOC_ENUM_SINGLE(M98088_REG_18_DAI1_FILTERS, 0, 6, max98088_dai1_fltr),
|
||||
};
|
||||
static const struct soc_enum max98088_dai1_adc_filter_enum[] = {
|
||||
SOC_ENUM_SINGLE(M98088_REG_18_DAI1_FILTERS, 4, 6, max98088_dai1_fltr),
|
||||
};
|
||||
static SOC_ENUM_SINGLE_DECL(max98088_dai1_dac_filter_enum,
|
||||
M98088_REG_18_DAI1_FILTERS, 0,
|
||||
max98088_dai1_fltr);
|
||||
static SOC_ENUM_SINGLE_DECL(max98088_dai1_adc_filter_enum,
|
||||
M98088_REG_18_DAI1_FILTERS, 4,
|
||||
max98088_dai1_fltr);
|
||||
|
||||
static int max98088_mic1pre_set(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
|
@ -1915,12 +1914,6 @@ static int max98088_probe(struct snd_soc_codec *codec)
|
|||
|
||||
regcache_mark_dirty(max98088->regmap);
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* initialize private data */
|
||||
|
||||
max98088->sysclk = (unsigned)-1;
|
||||
|
|
|
@ -2218,14 +2218,6 @@ static int max98090_probe(struct snd_soc_codec *codec)
|
|||
|
||||
max98090->codec = codec;
|
||||
|
||||
codec->control_data = max98090->regmap;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Reset the codec, the DSP core, and disable all interrupts */
|
||||
max98090_reset(max98090);
|
||||
|
||||
|
|
|
@ -560,25 +560,27 @@ static void m98095_biquad_band(struct snd_soc_codec *codec, unsigned int dai,
|
|||
}
|
||||
|
||||
static const char * const max98095_fltr_mode[] = { "Voice", "Music" };
|
||||
static const struct soc_enum max98095_dai1_filter_mode_enum[] = {
|
||||
SOC_ENUM_SINGLE(M98095_02E_DAI1_FILTERS, 7, 2, max98095_fltr_mode),
|
||||
};
|
||||
static const struct soc_enum max98095_dai2_filter_mode_enum[] = {
|
||||
SOC_ENUM_SINGLE(M98095_038_DAI2_FILTERS, 7, 2, max98095_fltr_mode),
|
||||
};
|
||||
static SOC_ENUM_SINGLE_DECL(max98095_dai1_filter_mode_enum,
|
||||
M98095_02E_DAI1_FILTERS, 7,
|
||||
max98095_fltr_mode);
|
||||
static SOC_ENUM_SINGLE_DECL(max98095_dai2_filter_mode_enum,
|
||||
M98095_038_DAI2_FILTERS, 7,
|
||||
max98095_fltr_mode);
|
||||
|
||||
static const char * const max98095_extmic_text[] = { "None", "MIC1", "MIC2" };
|
||||
|
||||
static const struct soc_enum max98095_extmic_enum =
|
||||
SOC_ENUM_SINGLE(M98095_087_CFG_MIC, 0, 3, max98095_extmic_text);
|
||||
static SOC_ENUM_SINGLE_DECL(max98095_extmic_enum,
|
||||
M98095_087_CFG_MIC, 0,
|
||||
max98095_extmic_text);
|
||||
|
||||
static const struct snd_kcontrol_new max98095_extmic_mux =
|
||||
SOC_DAPM_ENUM("External MIC Mux", max98095_extmic_enum);
|
||||
|
||||
static const char * const max98095_linein_text[] = { "INA", "INB" };
|
||||
|
||||
static const struct soc_enum max98095_linein_enum =
|
||||
SOC_ENUM_SINGLE(M98095_086_CFG_LINE, 6, 2, max98095_linein_text);
|
||||
static SOC_ENUM_SINGLE_DECL(max98095_linein_enum,
|
||||
M98095_086_CFG_LINE, 6,
|
||||
max98095_linein_text);
|
||||
|
||||
static const struct snd_kcontrol_new max98095_linein_mux =
|
||||
SOC_DAPM_ENUM("Linein Input Mux", max98095_linein_enum);
|
||||
|
@ -586,24 +588,26 @@ static const struct snd_kcontrol_new max98095_linein_mux =
|
|||
static const char * const max98095_line_mode_text[] = {
|
||||
"Stereo", "Differential"};
|
||||
|
||||
static const struct soc_enum max98095_linein_mode_enum =
|
||||
SOC_ENUM_SINGLE(M98095_086_CFG_LINE, 7, 2, max98095_line_mode_text);
|
||||
static SOC_ENUM_SINGLE_DECL(max98095_linein_mode_enum,
|
||||
M98095_086_CFG_LINE, 7,
|
||||
max98095_line_mode_text);
|
||||
|
||||
static const struct soc_enum max98095_lineout_mode_enum =
|
||||
SOC_ENUM_SINGLE(M98095_086_CFG_LINE, 4, 2, max98095_line_mode_text);
|
||||
static SOC_ENUM_SINGLE_DECL(max98095_lineout_mode_enum,
|
||||
M98095_086_CFG_LINE, 4,
|
||||
max98095_line_mode_text);
|
||||
|
||||
static const char * const max98095_dai_fltr[] = {
|
||||
"Off", "Elliptical-HPF-16k", "Butterworth-HPF-16k",
|
||||
"Elliptical-HPF-8k", "Butterworth-HPF-8k", "Butterworth-HPF-Fs/240"};
|
||||
static const struct soc_enum max98095_dai1_dac_filter_enum[] = {
|
||||
SOC_ENUM_SINGLE(M98095_02E_DAI1_FILTERS, 0, 6, max98095_dai_fltr),
|
||||
};
|
||||
static const struct soc_enum max98095_dai2_dac_filter_enum[] = {
|
||||
SOC_ENUM_SINGLE(M98095_038_DAI2_FILTERS, 0, 6, max98095_dai_fltr),
|
||||
};
|
||||
static const struct soc_enum max98095_dai3_dac_filter_enum[] = {
|
||||
SOC_ENUM_SINGLE(M98095_042_DAI3_FILTERS, 0, 6, max98095_dai_fltr),
|
||||
};
|
||||
static SOC_ENUM_SINGLE_DECL(max98095_dai1_dac_filter_enum,
|
||||
M98095_02E_DAI1_FILTERS, 0,
|
||||
max98095_dai_fltr);
|
||||
static SOC_ENUM_SINGLE_DECL(max98095_dai2_dac_filter_enum,
|
||||
M98095_038_DAI2_FILTERS, 0,
|
||||
max98095_dai_fltr);
|
||||
static SOC_ENUM_SINGLE_DECL(max98095_dai3_dac_filter_enum,
|
||||
M98095_042_DAI3_FILTERS, 0,
|
||||
max98095_dai_fltr);
|
||||
|
||||
static int max98095_mic1pre_set(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
|
@ -2234,12 +2238,6 @@ static int max98095_probe(struct snd_soc_codec *codec)
|
|||
struct i2c_client *client;
|
||||
int ret = 0;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* reset the codec, the DSP core, and disable all interrupts */
|
||||
max98095_reset(codec);
|
||||
|
||||
|
|
|
@ -312,14 +312,6 @@ static int max9850_resume(struct snd_soc_codec *codec)
|
|||
|
||||
static int max9850_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* enable zero-detect */
|
||||
snd_soc_update_bits(codec, MAX9850_GENERAL_PURPOSE, 1, 1);
|
||||
/* enable slew-rate control */
|
||||
|
|
|
@ -612,8 +612,8 @@ static int mc13783_probe(struct snd_soc_codec *codec)
|
|||
struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
codec->control_data = dev_get_regmap(codec->dev->parent, NULL);
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 24, SND_SOC_REGMAP);
|
||||
ret = snd_soc_codec_set_cache_io(codec,
|
||||
dev_get_regmap(codec->dev->parent, NULL));
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
|
|
|
@ -586,16 +586,6 @@ static int ml26124_resume(struct snd_soc_codec *codec)
|
|||
|
||||
static int ml26124_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
int ret;
|
||||
struct ml26124_priv *priv = snd_soc_codec_get_drvdata(codec);
|
||||
codec->control_data = priv->regmap;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Software Reset */
|
||||
snd_soc_update_bits(codec, ML26124_SW_RST, 0x01, 1);
|
||||
snd_soc_update_bits(codec, ML26124_SW_RST, 0x01, 0);
|
||||
|
|
|
@ -1570,15 +1570,6 @@ static int rt5631_probe(struct snd_soc_codec *codec)
|
|||
{
|
||||
struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
|
||||
unsigned int val;
|
||||
int ret;
|
||||
|
||||
codec->control_data = rt5631->regmap;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
val = rt5631_read_index(codec, RT5631_ADDA_MIXER_INTL_REG3);
|
||||
if (val & 0x0002)
|
||||
|
|
|
@ -1936,16 +1936,8 @@ static int rt5640_set_bias_level(struct snd_soc_codec *codec,
|
|||
static int rt5640_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
rt5640->codec = codec;
|
||||
codec->control_data = rt5640->regmap;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
codec->dapm.idle_bias_off = 1;
|
||||
rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
|
||||
|
|
|
@ -1352,14 +1352,6 @@ static int sgtl5000_probe(struct snd_soc_codec *codec)
|
|||
int ret;
|
||||
struct sgtl5000_priv *sgtl5000 = snd_soc_codec_get_drvdata(codec);
|
||||
|
||||
/* setup i2c data ops */
|
||||
codec->control_data = sgtl5000->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = sgtl5000_enable_regulators(codec);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
|
|
@ -21,6 +21,7 @@
|
|||
#include <linux/slab.h>
|
||||
#include <sound/pcm.h>
|
||||
#include <sound/pcm_params.h>
|
||||
#include <linux/regmap.h>
|
||||
#include <sound/soc.h>
|
||||
#include <sound/initval.h>
|
||||
|
||||
|
@ -209,8 +210,9 @@ out:
|
|||
|
||||
static int si476x_codec_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
codec->control_data = dev_get_regmap(codec->dev->parent, NULL);
|
||||
return snd_soc_codec_set_cache_io(codec, 0, 0, SND_SOC_REGMAP);
|
||||
struct regmap *regmap = dev_get_regmap(codec->dev->parent, NULL);
|
||||
|
||||
return snd_soc_codec_set_cache_io(codec, regmap);
|
||||
}
|
||||
|
||||
static struct snd_soc_dai_ops si476x_dai_ops = {
|
||||
|
|
|
@ -825,8 +825,6 @@ static int sn95031_codec_probe(struct snd_soc_codec *codec)
|
|||
{
|
||||
pr_debug("codec_probe called\n");
|
||||
|
||||
snd_soc_codec_set_cache_io(codec, 0, 0, SND_SOC_REGMAP);
|
||||
|
||||
/* PCM interface config
|
||||
* This sets the pcm rx slot conguration to max 6 slots
|
||||
* for max 4 dais (2 stereo and 2 mono)
|
||||
|
|
|
@ -648,16 +648,6 @@ static struct snd_soc_dai_driver ssm2518_dai = {
|
|||
|
||||
static int ssm2518_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct ssm2518 *ssm2518 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
codec->control_data = ssm2518->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 0, 0, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return ssm2518_set_bias_level(codec, SND_SOC_BIAS_OFF);
|
||||
}
|
||||
|
||||
|
|
|
@ -562,13 +562,6 @@ static int ssm260x_codec_probe(struct snd_soc_codec *codec)
|
|||
struct ssm2602_priv *ssm2602 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
codec->control_data = ssm2602->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 0, 0, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = regmap_write(ssm2602->regmap, SSM2602_RESET, 0);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
|
||||
|
|
|
@ -872,16 +872,6 @@ static int sta32x_probe(struct snd_soc_codec *codec)
|
|||
return ret;
|
||||
}
|
||||
|
||||
/* Tell ASoC what kind of I/O to use to read the registers. ASoC will
|
||||
* then do the I2C transactions itself.
|
||||
*/
|
||||
codec->control_data = sta32x->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "failed to set cache I/O (ret=%i)\n", ret);
|
||||
goto err;
|
||||
}
|
||||
|
||||
/* Chip documentation explicitly requires that the reset values
|
||||
* of reserved register bits are left untouched.
|
||||
* Write the register default value to cache for reserved registers,
|
||||
|
@ -946,10 +936,6 @@ static int sta32x_probe(struct snd_soc_codec *codec)
|
|||
regulator_bulk_disable(ARRAY_SIZE(sta32x->supplies), sta32x->supplies);
|
||||
|
||||
return 0;
|
||||
|
||||
err:
|
||||
regulator_bulk_disable(ARRAY_SIZE(sta32x->supplies), sta32x->supplies);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int sta32x_remove(struct snd_soc_codec *codec)
|
||||
|
|
|
@ -322,16 +322,6 @@ static struct snd_soc_dai_driver sta529_dai = {
|
|||
|
||||
static int sta529_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct sta529 *sta529 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
codec->control_data = sta529->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
sta529_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -559,14 +559,6 @@ static int tlv320aic23_resume(struct snd_soc_codec *codec)
|
|||
|
||||
static int tlv320aic23_codec_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Reset codec */
|
||||
snd_soc_write(codec, TLV320AIC23_RESET, 0);
|
||||
|
||||
|
|
|
@ -296,8 +296,6 @@ static int aic26_probe(struct snd_soc_codec *codec)
|
|||
struct aic26 *aic26 = dev_get_drvdata(codec->dev);
|
||||
int ret, reg;
|
||||
|
||||
snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_REGMAP);
|
||||
|
||||
aic26->codec = codec;
|
||||
|
||||
/* Reset the codec to power on defaults */
|
||||
|
|
1295
sound/soc/codecs/tlv320aic31xx.c
Normal file
1295
sound/soc/codecs/tlv320aic31xx.c
Normal file
File diff suppressed because it is too large
Load diff
258
sound/soc/codecs/tlv320aic31xx.h
Normal file
258
sound/soc/codecs/tlv320aic31xx.h
Normal file
|
@ -0,0 +1,258 @@
|
|||
/*
|
||||
* ALSA SoC TLV320AIC31XX codec driver
|
||||
*
|
||||
* Copyright (C) 2013 Texas Instruments, Inc.
|
||||
*
|
||||
* This package is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
|
||||
*
|
||||
*/
|
||||
#ifndef _TLV320AIC31XX_H
|
||||
#define _TLV320AIC31XX_H
|
||||
|
||||
#define AIC31XX_RATES SNDRV_PCM_RATE_8000_192000
|
||||
|
||||
#define AIC31XX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE \
|
||||
| SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)
|
||||
|
||||
|
||||
#define AIC31XX_STEREO_CLASS_D_BIT 0x1
|
||||
#define AIC31XX_MINIDSP_BIT 0x2
|
||||
|
||||
enum aic31xx_type {
|
||||
AIC3100 = 0,
|
||||
AIC3110 = AIC31XX_STEREO_CLASS_D_BIT,
|
||||
AIC3120 = AIC31XX_MINIDSP_BIT,
|
||||
AIC3111 = (AIC31XX_STEREO_CLASS_D_BIT | AIC31XX_MINIDSP_BIT),
|
||||
};
|
||||
|
||||
struct aic31xx_pdata {
|
||||
enum aic31xx_type codec_type;
|
||||
unsigned int gpio_reset;
|
||||
int micbias_vg;
|
||||
};
|
||||
|
||||
/* Page Control Register */
|
||||
#define AIC31XX_PAGECTL 0x00
|
||||
|
||||
/* Page 0 Registers */
|
||||
/* Software reset register */
|
||||
#define AIC31XX_RESET 0x01
|
||||
/* OT FLAG register */
|
||||
#define AIC31XX_OT_FLAG 0x03
|
||||
/* Clock clock Gen muxing, Multiplexers*/
|
||||
#define AIC31XX_CLKMUX 0x04
|
||||
/* PLL P and R-VAL register */
|
||||
#define AIC31XX_PLLPR 0x05
|
||||
/* PLL J-VAL register */
|
||||
#define AIC31XX_PLLJ 0x06
|
||||
/* PLL D-VAL MSB register */
|
||||
#define AIC31XX_PLLDMSB 0x07
|
||||
/* PLL D-VAL LSB register */
|
||||
#define AIC31XX_PLLDLSB 0x08
|
||||
/* DAC NDAC_VAL register*/
|
||||
#define AIC31XX_NDAC 0x0B
|
||||
/* DAC MDAC_VAL register */
|
||||
#define AIC31XX_MDAC 0x0C
|
||||
/* DAC OSR setting register 1, MSB value */
|
||||
#define AIC31XX_DOSRMSB 0x0D
|
||||
/* DAC OSR setting register 2, LSB value */
|
||||
#define AIC31XX_DOSRLSB 0x0E
|
||||
#define AIC31XX_MINI_DSP_INPOL 0x10
|
||||
/* Clock setting register 8, PLL */
|
||||
#define AIC31XX_NADC 0x12
|
||||
/* Clock setting register 9, PLL */
|
||||
#define AIC31XX_MADC 0x13
|
||||
/* ADC Oversampling (AOSR) Register */
|
||||
#define AIC31XX_AOSR 0x14
|
||||
/* Clock setting register 9, Multiplexers */
|
||||
#define AIC31XX_CLKOUTMUX 0x19
|
||||
/* Clock setting register 10, CLOCKOUT M divider value */
|
||||
#define AIC31XX_CLKOUTMVAL 0x1A
|
||||
/* Audio Interface Setting Register 1 */
|
||||
#define AIC31XX_IFACE1 0x1B
|
||||
/* Audio Data Slot Offset Programming */
|
||||
#define AIC31XX_DATA_OFFSET 0x1C
|
||||
/* Audio Interface Setting Register 2 */
|
||||
#define AIC31XX_IFACE2 0x1D
|
||||
/* Clock setting register 11, BCLK N Divider */
|
||||
#define AIC31XX_BCLKN 0x1E
|
||||
/* Audio Interface Setting Register 3, Secondary Audio Interface */
|
||||
#define AIC31XX_IFACESEC1 0x1F
|
||||
/* Audio Interface Setting Register 4 */
|
||||
#define AIC31XX_IFACESEC2 0x20
|
||||
/* Audio Interface Setting Register 5 */
|
||||
#define AIC31XX_IFACESEC3 0x21
|
||||
/* I2C Bus Condition */
|
||||
#define AIC31XX_I2C 0x22
|
||||
/* ADC FLAG */
|
||||
#define AIC31XX_ADCFLAG 0x24
|
||||
/* DAC Flag Registers */
|
||||
#define AIC31XX_DACFLAG1 0x25
|
||||
#define AIC31XX_DACFLAG2 0x26
|
||||
/* Sticky Interrupt flag (overflow) */
|
||||
#define AIC31XX_OFFLAG 0x27
|
||||
/* Sticy DAC Interrupt flags */
|
||||
#define AIC31XX_INTRDACFLAG 0x2C
|
||||
/* Sticy ADC Interrupt flags */
|
||||
#define AIC31XX_INTRADCFLAG 0x2D
|
||||
/* DAC Interrupt flags 2 */
|
||||
#define AIC31XX_INTRDACFLAG2 0x2E
|
||||
/* ADC Interrupt flags 2 */
|
||||
#define AIC31XX_INTRADCFLAG2 0x2F
|
||||
/* INT1 interrupt control */
|
||||
#define AIC31XX_INT1CTRL 0x30
|
||||
/* INT2 interrupt control */
|
||||
#define AIC31XX_INT2CTRL 0x31
|
||||
/* GPIO1 control */
|
||||
#define AIC31XX_GPIO1 0x33
|
||||
|
||||
#define AIC31XX_DACPRB 0x3C
|
||||
/* ADC Instruction Set Register */
|
||||
#define AIC31XX_ADCPRB 0x3D
|
||||
/* DAC channel setup register */
|
||||
#define AIC31XX_DACSETUP 0x3F
|
||||
/* DAC Mute and volume control register */
|
||||
#define AIC31XX_DACMUTE 0x40
|
||||
/* Left DAC channel digital volume control */
|
||||
#define AIC31XX_LDACVOL 0x41
|
||||
/* Right DAC channel digital volume control */
|
||||
#define AIC31XX_RDACVOL 0x42
|
||||
/* Headset detection */
|
||||
#define AIC31XX_HSDETECT 0x43
|
||||
/* ADC Digital Mic */
|
||||
#define AIC31XX_ADCSETUP 0x51
|
||||
/* ADC Digital Volume Control Fine Adjust */
|
||||
#define AIC31XX_ADCFGA 0x52
|
||||
/* ADC Digital Volume Control Coarse Adjust */
|
||||
#define AIC31XX_ADCVOL 0x53
|
||||
|
||||
|
||||
/* Page 1 Registers */
|
||||
/* Headphone drivers */
|
||||
#define AIC31XX_HPDRIVER 0x9F
|
||||
/* Class-D Speakear Amplifier */
|
||||
#define AIC31XX_SPKAMP 0xA0
|
||||
/* HP Output Drivers POP Removal Settings */
|
||||
#define AIC31XX_HPPOP 0xA1
|
||||
/* Output Driver PGA Ramp-Down Period Control */
|
||||
#define AIC31XX_SPPGARAMP 0xA2
|
||||
/* DAC_L and DAC_R Output Mixer Routing */
|
||||
#define AIC31XX_DACMIXERROUTE 0xA3
|
||||
/* Left Analog Vol to HPL */
|
||||
#define AIC31XX_LANALOGHPL 0xA4
|
||||
/* Right Analog Vol to HPR */
|
||||
#define AIC31XX_RANALOGHPR 0xA5
|
||||
/* Left Analog Vol to SPL */
|
||||
#define AIC31XX_LANALOGSPL 0xA6
|
||||
/* Right Analog Vol to SPR */
|
||||
#define AIC31XX_RANALOGSPR 0xA7
|
||||
/* HPL Driver */
|
||||
#define AIC31XX_HPLGAIN 0xA8
|
||||
/* HPR Driver */
|
||||
#define AIC31XX_HPRGAIN 0xA9
|
||||
/* SPL Driver */
|
||||
#define AIC31XX_SPLGAIN 0xAA
|
||||
/* SPR Driver */
|
||||
#define AIC31XX_SPRGAIN 0xAB
|
||||
/* HP Driver Control */
|
||||
#define AIC31XX_HPCONTROL 0xAC
|
||||
/* MIC Bias Control */
|
||||
#define AIC31XX_MICBIAS 0xAE
|
||||
/* MIC PGA*/
|
||||
#define AIC31XX_MICPGA 0xAF
|
||||
/* Delta-Sigma Mono ADC Channel Fine-Gain Input Selection for P-Terminal */
|
||||
#define AIC31XX_MICPGAPI 0xB0
|
||||
/* ADC Input Selection for M-Terminal */
|
||||
#define AIC31XX_MICPGAMI 0xB1
|
||||
/* Input CM Settings */
|
||||
#define AIC31XX_MICPGACM 0xB2
|
||||
|
||||
/* Bits, masks and shifts */
|
||||
|
||||
/* AIC31XX_CLKMUX */
|
||||
#define AIC31XX_PLL_CLKIN_MASK 0x0c
|
||||
#define AIC31XX_PLL_CLKIN_SHIFT 2
|
||||
#define AIC31XX_PLL_CLKIN_MCLK 0
|
||||
#define AIC31XX_CODEC_CLKIN_MASK 0x03
|
||||
#define AIC31XX_CODEC_CLKIN_SHIFT 0
|
||||
#define AIC31XX_CODEC_CLKIN_PLL 3
|
||||
#define AIC31XX_CODEC_CLKIN_BCLK 1
|
||||
|
||||
/* AIC31XX_PLLPR, AIC31XX_NDAC, AIC31XX_MDAC, AIC31XX_NADC, AIC31XX_MADC,
|
||||
AIC31XX_BCLKN */
|
||||
#define AIC31XX_PLL_MASK 0x7f
|
||||
#define AIC31XX_PM_MASK 0x80
|
||||
|
||||
/* AIC31XX_IFACE1 */
|
||||
#define AIC31XX_WORD_LEN_16BITS 0x00
|
||||
#define AIC31XX_WORD_LEN_20BITS 0x01
|
||||
#define AIC31XX_WORD_LEN_24BITS 0x02
|
||||
#define AIC31XX_WORD_LEN_32BITS 0x03
|
||||
#define AIC31XX_IFACE1_DATALEN_MASK 0x30
|
||||
#define AIC31XX_IFACE1_DATALEN_SHIFT (4)
|
||||
#define AIC31XX_IFACE1_DATATYPE_MASK 0xC0
|
||||
#define AIC31XX_IFACE1_DATATYPE_SHIFT (6)
|
||||
#define AIC31XX_I2S_MODE 0x00
|
||||
#define AIC31XX_DSP_MODE 0x01
|
||||
#define AIC31XX_RIGHT_JUSTIFIED_MODE 0x02
|
||||
#define AIC31XX_LEFT_JUSTIFIED_MODE 0x03
|
||||
#define AIC31XX_IFACE1_MASTER_MASK 0x0C
|
||||
#define AIC31XX_BCLK_MASTER 0x08
|
||||
#define AIC31XX_WCLK_MASTER 0x04
|
||||
|
||||
/* AIC31XX_DATA_OFFSET */
|
||||
#define AIC31XX_DATA_OFFSET_MASK 0xFF
|
||||
|
||||
/* AIC31XX_IFACE2 */
|
||||
#define AIC31XX_BCLKINV_MASK 0x08
|
||||
#define AIC31XX_BDIVCLK_MASK 0x03
|
||||
#define AIC31XX_DAC2BCLK 0x00
|
||||
#define AIC31XX_DACMOD2BCLK 0x01
|
||||
#define AIC31XX_ADC2BCLK 0x02
|
||||
#define AIC31XX_ADCMOD2BCLK 0x03
|
||||
|
||||
/* AIC31XX_ADCFLAG */
|
||||
#define AIC31XX_ADCPWRSTATUS_MASK 0x40
|
||||
|
||||
/* AIC31XX_DACFLAG1 */
|
||||
#define AIC31XX_LDACPWRSTATUS_MASK 0x80
|
||||
#define AIC31XX_RDACPWRSTATUS_MASK 0x08
|
||||
#define AIC31XX_HPLDRVPWRSTATUS_MASK 0x20
|
||||
#define AIC31XX_HPRDRVPWRSTATUS_MASK 0x02
|
||||
#define AIC31XX_SPLDRVPWRSTATUS_MASK 0x10
|
||||
#define AIC31XX_SPRDRVPWRSTATUS_MASK 0x01
|
||||
|
||||
/* AIC31XX_INTRDACFLAG */
|
||||
#define AIC31XX_HPSCDETECT_MASK 0x80
|
||||
#define AIC31XX_BUTTONPRESS_MASK 0x20
|
||||
#define AIC31XX_HSPLUG_MASK 0x10
|
||||
#define AIC31XX_LDRCTHRES_MASK 0x08
|
||||
#define AIC31XX_RDRCTHRES_MASK 0x04
|
||||
#define AIC31XX_DACSINT_MASK 0x02
|
||||
#define AIC31XX_DACAINT_MASK 0x01
|
||||
|
||||
/* AIC31XX_INT1CTRL */
|
||||
#define AIC31XX_HSPLUGDET_MASK 0x80
|
||||
#define AIC31XX_BUTTONPRESSDET_MASK 0x40
|
||||
#define AIC31XX_DRCTHRES_MASK 0x20
|
||||
#define AIC31XX_AGCNOISE_MASK 0x10
|
||||
#define AIC31XX_OC_MASK 0x08
|
||||
#define AIC31XX_ENGINE_MASK 0x04
|
||||
|
||||
/* AIC31XX_DACSETUP */
|
||||
#define AIC31XX_SOFTSTEP_MASK 0x03
|
||||
|
||||
/* AIC31XX_DACMUTE */
|
||||
#define AIC31XX_DACMUTE_MASK 0x0C
|
||||
|
||||
/* AIC31XX_MICBIAS */
|
||||
#define AIC31XX_MICBIAS_MASK 0x03
|
||||
#define AIC31XX_MICBIAS_SHIFT 0
|
||||
|
||||
#endif /* _TLV320AIC31XX_H */
|
|
@ -614,8 +614,6 @@ static int aic32x4_probe(struct snd_soc_codec *codec)
|
|||
struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec);
|
||||
u32 tmp_reg;
|
||||
|
||||
snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
|
||||
if (gpio_is_valid(aic32x4->rstn_gpio)) {
|
||||
ndelay(10);
|
||||
gpio_set_value(aic32x4->rstn_gpio, 1);
|
||||
|
|
|
@ -1344,12 +1344,6 @@ static int aic3x_probe(struct snd_soc_codec *codec)
|
|||
INIT_LIST_HEAD(&aic3x->list);
|
||||
aic3x->codec = codec;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(aic3x->supplies); i++) {
|
||||
aic3x->disable_nb[i].nb.notifier_call = aic3x_regulator_event;
|
||||
aic3x->disable_nb[i].aic3x = aic3x;
|
||||
|
|
|
@ -122,7 +122,6 @@ struct tlv320dac33_priv {
|
|||
unsigned int uthr;
|
||||
|
||||
enum dac33_state state;
|
||||
enum snd_soc_control_type control_type;
|
||||
void *control_data;
|
||||
};
|
||||
|
||||
|
|
|
@ -786,8 +786,6 @@ static int wm2000_probe(struct snd_soc_codec *codec)
|
|||
{
|
||||
struct wm2000_priv *wm2000 = dev_get_drvdata(codec->dev);
|
||||
|
||||
snd_soc_codec_set_cache_io(codec, 16, 8, SND_SOC_REGMAP);
|
||||
|
||||
/* This will trigger a transition to standby mode by default */
|
||||
wm2000_anc_set_mode(wm2000);
|
||||
|
||||
|
|
|
@ -1554,15 +1554,8 @@ static int wm2200_probe(struct snd_soc_codec *codec)
|
|||
int ret;
|
||||
|
||||
wm2200->codec = codec;
|
||||
codec->control_data = wm2200->regmap;
|
||||
codec->dapm.bias_level = SND_SOC_BIAS_OFF;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = snd_soc_add_codec_controls(codec, wm_adsp1_fw_controls, 2);
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
|
|
|
@ -2343,13 +2343,6 @@ static int wm5100_probe(struct snd_soc_codec *codec)
|
|||
int ret, i;
|
||||
|
||||
wm5100->codec = codec;
|
||||
codec->control_data = wm5100->regmap;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(wm5100_dig_vu); i++)
|
||||
snd_soc_update_bits(codec, wm5100_dig_vu[i], WM5100_OUT_VU,
|
||||
|
|
|
@ -1760,9 +1760,7 @@ static int wm5102_codec_probe(struct snd_soc_codec *codec)
|
|||
struct wm5102_priv *priv = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
codec->control_data = priv->core.arizona->regmap;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 32, 16, SND_SOC_REGMAP);
|
||||
ret = snd_soc_codec_set_cache_io(codec, priv->core.arizona->regmap);
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
|
|
|
@ -1587,10 +1587,9 @@ static int wm5110_codec_probe(struct snd_soc_codec *codec)
|
|||
struct wm5110_priv *priv = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
codec->control_data = priv->core.arizona->regmap;
|
||||
priv->core.arizona->dapm = &codec->dapm;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 32, 16, SND_SOC_REGMAP);
|
||||
ret = snd_soc_codec_set_cache_io(codec, priv->core.arizona->regmap);
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
|
|
|
@ -1505,9 +1505,7 @@ static int wm8350_codec_probe(struct snd_soc_codec *codec)
|
|||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
codec->control_data = wm8350->regmap;
|
||||
|
||||
snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
|
||||
snd_soc_codec_set_cache_io(codec, wm8350->regmap);
|
||||
|
||||
/* Put the codec into reset if it wasn't already */
|
||||
wm8350_clear_bits(wm8350, WM8350_POWER_MGMT_5, WM8350_CODEC_ENA);
|
||||
|
|
|
@ -1316,10 +1316,9 @@ static int wm8400_codec_probe(struct snd_soc_codec *codec)
|
|||
|
||||
snd_soc_codec_set_drvdata(codec, priv);
|
||||
priv->wm8400 = wm8400;
|
||||
codec->control_data = wm8400->regmap;
|
||||
priv->codec = codec;
|
||||
|
||||
snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
|
||||
snd_soc_codec_set_cache_io(codec, wm8400->regmap);
|
||||
|
||||
ret = devm_regulator_bulk_get(wm8400->dev,
|
||||
ARRAY_SIZE(power), &power[0]);
|
||||
|
|
|
@ -589,20 +589,12 @@ static int wm8510_resume(struct snd_soc_codec *codec)
|
|||
|
||||
static int wm8510_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR "wm8510: failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
wm8510_reset(codec);
|
||||
|
||||
/* power on device */
|
||||
wm8510_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* power down chip */
|
||||
|
|
|
@ -392,18 +392,11 @@ static int wm8523_resume(struct snd_soc_codec *codec)
|
|||
static int wm8523_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
|
||||
wm8523->rate_constraint.count =
|
||||
ARRAY_SIZE(wm8523->rate_constraint_list);
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Change some default settings - latch VU and enable ZC */
|
||||
snd_soc_update_bits(codec, WM8523_DAC_GAINR,
|
||||
WM8523_DACR_VU, WM8523_DACR_VU);
|
||||
|
|
|
@ -869,12 +869,6 @@ static int wm8580_probe(struct snd_soc_codec *codec)
|
|||
struct wm8580_priv *wm8580 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret = 0;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = regulator_bulk_enable(ARRAY_SIZE(wm8580->supplies),
|
||||
wm8580->supplies);
|
||||
if (ret != 0) {
|
||||
|
|
|
@ -367,12 +367,6 @@ static int wm8711_probe(struct snd_soc_codec *codec)
|
|||
{
|
||||
int ret;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = wm8711_reset(codec);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to issue reset\n");
|
||||
|
|
|
@ -228,19 +228,10 @@ static int wm8728_resume(struct snd_soc_codec *codec)
|
|||
|
||||
static int wm8728_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR "wm8728: failed to configure cache I/O: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* power on device */
|
||||
wm8728_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wm8728_remove(struct snd_soc_codec *codec)
|
||||
|
|
|
@ -583,13 +583,6 @@ static int wm8731_probe(struct snd_soc_codec *codec)
|
|||
struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret = 0, i;
|
||||
|
||||
codec->control_data = wm8731->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(wm8731->supplies); i++)
|
||||
wm8731->supplies[i].supply = wm8731_supply_names[i];
|
||||
|
||||
|
|
|
@ -570,12 +570,6 @@ static int wm8737_probe(struct snd_soc_codec *codec)
|
|||
struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies),
|
||||
wm8737->supplies);
|
||||
if (ret != 0) {
|
||||
|
|
|
@ -429,12 +429,6 @@ static int wm8741_probe(struct snd_soc_codec *codec)
|
|||
goto err_get;
|
||||
}
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
goto err_enable;
|
||||
}
|
||||
|
||||
ret = wm8741_reset(codec);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to issue reset\n");
|
||||
|
|
|
@ -702,12 +702,6 @@ static int wm8750_probe(struct snd_soc_codec *codec)
|
|||
{
|
||||
int ret;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR "wm8750: failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = wm8750_reset(codec);
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR "wm8750: failed to reset: %d\n", ret);
|
||||
|
|
|
@ -1470,13 +1470,6 @@ static int wm8753_probe(struct snd_soc_codec *codec)
|
|||
|
||||
INIT_DELAYED_WORK(&codec->dapm.delayed_work, wm8753_work);
|
||||
|
||||
codec->control_data = wm8753->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = wm8753_reset(codec);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
|
||||
|
|
|
@ -580,12 +580,6 @@ static int wm8770_probe(struct snd_soc_codec *codec)
|
|||
wm8770 = snd_soc_codec_get_drvdata(codec);
|
||||
wm8770->codec = codec;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = regulator_bulk_enable(ARRAY_SIZE(wm8770->supplies),
|
||||
wm8770->supplies);
|
||||
if (ret) {
|
||||
|
|
|
@ -430,12 +430,6 @@ static int wm8776_probe(struct snd_soc_codec *codec)
|
|||
{
|
||||
int ret = 0;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = wm8776_reset(codec);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
|
||||
|
|
|
@ -546,14 +546,6 @@ static int wm8804_probe(struct snd_soc_codec *codec)
|
|||
|
||||
wm8804 = snd_soc_codec_get_drvdata(codec);
|
||||
|
||||
codec->control_data = wm8804->regmap;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(wm8804->supplies); i++)
|
||||
wm8804->supplies[i].supply = wm8804_supply_names[i];
|
||||
|
||||
|
|
|
@ -1178,13 +1178,7 @@ static int wm8900_resume(struct snd_soc_codec *codec)
|
|||
|
||||
static int wm8900_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
int ret = 0, reg;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
int reg;
|
||||
|
||||
reg = snd_soc_read(codec, WM8900_REG_ID);
|
||||
if (reg != 0x8900) {
|
||||
|
|
|
@ -1897,21 +1897,13 @@ static void wm8903_free_gpio(struct wm8903_priv *wm8903)
|
|||
static int wm8903_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
wm8903->codec = codec;
|
||||
codec->control_data = wm8903->regmap;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* power on device */
|
||||
wm8903_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* power down chip */
|
||||
|
|
|
@ -2048,9 +2048,6 @@ static void wm8904_handle_pdata(struct snd_soc_codec *codec)
|
|||
static int wm8904_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
codec->control_data = wm8904->regmap;
|
||||
|
||||
switch (wm8904->devtype) {
|
||||
case WM8904:
|
||||
|
@ -2064,12 +2061,6 @@ static int wm8904_probe(struct snd_soc_codec *codec)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
wm8904_handle_pdata(codec);
|
||||
|
||||
wm8904_add_widgets(codec);
|
||||
|
|
|
@ -712,12 +712,6 @@ static int wm8940_probe(struct snd_soc_codec *codec)
|
|||
int ret;
|
||||
u16 reg;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = wm8940_reset(codec);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to issue reset\n");
|
||||
|
|
|
@ -895,14 +895,6 @@ static int wm8955_probe(struct snd_soc_codec *codec)
|
|||
struct wm8955_pdata *pdata = dev_get_platdata(codec->dev);
|
||||
int ret, i;
|
||||
|
||||
codec->control_data = wm8955->regmap;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(wm8955->supplies); i++)
|
||||
wm8955->supplies[i].supply = wm8955_supply_names[i];
|
||||
|
||||
|
|
|
@ -976,12 +976,6 @@ static int wm8960_probe(struct snd_soc_codec *codec)
|
|||
wm8960->set_bias_level = wm8960_set_bias_level_capless;
|
||||
}
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = wm8960_reset(codec);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to issue reset\n");
|
||||
|
|
|
@ -836,15 +836,8 @@ static struct snd_soc_dai_driver wm8961_dai = {
|
|||
static int wm8961_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct snd_soc_dapm_context *dapm = &codec->dapm;
|
||||
int ret = 0;
|
||||
u16 reg;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Enable class W */
|
||||
reg = snd_soc_read(codec, WM8961_CHARGE_PUMP_B);
|
||||
reg |= WM8961_CP_DYN_PWR_MASK;
|
||||
|
|
|
@ -3424,13 +3424,6 @@ static int wm8962_probe(struct snd_soc_codec *codec)
|
|||
bool dmicclk, dmicdat;
|
||||
|
||||
wm8962->codec = codec;
|
||||
codec->control_data = wm8962->regmap;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
wm8962->disable_nb[0].notifier_call = wm8962_regulator_event_0;
|
||||
wm8962->disable_nb[1].notifier_call = wm8962_regulator_event_1;
|
||||
|
|
|
@ -648,12 +648,6 @@ static int wm8971_probe(struct snd_soc_codec *codec)
|
|||
int ret = 0;
|
||||
u16 reg;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR "wm8971: failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
INIT_DELAYED_WORK(&codec->dapm.delayed_work, wm8971_work);
|
||||
wm8971_workq = create_workqueue("wm8971");
|
||||
if (wm8971_workq == NULL)
|
||||
|
|
|
@ -593,12 +593,6 @@ static int wm8974_probe(struct snd_soc_codec *codec)
|
|||
{
|
||||
int ret = 0;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = wm8974_reset(codec);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to issue reset\n");
|
||||
|
|
|
@ -975,19 +975,13 @@ static const int update_reg[] = {
|
|||
static int wm8978_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct wm8978_priv *wm8978 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret = 0, i;
|
||||
int i;
|
||||
|
||||
/*
|
||||
* Set default system clock to PLL, it is more precise, this is also the
|
||||
* default hardware setting
|
||||
*/
|
||||
wm8978->sysclk = WM8978_PLL;
|
||||
codec->control_data = wm8978->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* Set the update bit in all registers, that have one. This way all
|
||||
|
|
|
@ -995,12 +995,6 @@ static int wm8983_probe(struct snd_soc_codec *codec)
|
|||
int ret;
|
||||
int i;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = snd_soc_write(codec, WM8983_SOFTWARE_RESET, 0);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
|
||||
|
|
|
@ -995,13 +995,6 @@ static int wm8985_probe(struct snd_soc_codec *codec)
|
|||
int ret;
|
||||
|
||||
wm8985 = snd_soc_codec_get_drvdata(codec);
|
||||
codec->control_data = wm8985->regmap;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(wm8985->supplies); i++)
|
||||
wm8985->supplies[i].supply = wm8985_supply_names[i];
|
||||
|
|
|
@ -810,16 +810,8 @@ static int wm8988_resume(struct snd_soc_codec *codec)
|
|||
|
||||
static int wm8988_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret = 0;
|
||||
|
||||
codec->control_data = wm8988->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = wm8988_reset(codec);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to issue reset\n");
|
||||
|
|
|
@ -1289,14 +1289,6 @@ static int wm8990_resume(struct snd_soc_codec *codec)
|
|||
*/
|
||||
static int wm8990_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
printk(KERN_ERR "wm8990: failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
wm8990_reset(codec);
|
||||
|
||||
/* charge output caps */
|
||||
|
|
|
@ -1248,14 +1248,6 @@ static int wm8991_remove(struct snd_soc_codec *codec)
|
|||
|
||||
static int wm8991_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
wm8991_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -1493,13 +1493,6 @@ static int wm8993_probe(struct snd_soc_codec *codec)
|
|||
wm8993->hubs_data.dcs_codes_r = -2;
|
||||
wm8993->hubs_data.series_startup = 1;
|
||||
|
||||
codec->control_data = wm8993->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Latch volume update bits and default ZC on */
|
||||
snd_soc_update_bits(codec, WM8993_RIGHT_DAC_DIGITAL_VOLUME,
|
||||
WM8993_DAC_VU, WM8993_DAC_VU);
|
||||
|
|
|
@ -3998,9 +3998,8 @@ static int wm8994_codec_probe(struct snd_soc_codec *codec)
|
|||
int ret, i;
|
||||
|
||||
wm8994->hubs.codec = codec;
|
||||
codec->control_data = control->regmap;
|
||||
|
||||
snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_REGMAP);
|
||||
snd_soc_codec_set_cache_io(codec, control->regmap);
|
||||
|
||||
mutex_init(&wm8994->accdet_lock);
|
||||
INIT_DELAYED_WORK(&wm8994->jackdet_bootstrap,
|
||||
|
|
|
@ -2042,13 +2042,6 @@ static int wm8995_probe(struct snd_soc_codec *codec)
|
|||
wm8995 = snd_soc_codec_get_drvdata(codec);
|
||||
wm8995->codec = codec;
|
||||
|
||||
codec->control_data = wm8995->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_REGMAP);
|
||||
if (ret < 0) {
|
||||
dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(wm8995->supplies); i++)
|
||||
wm8995->supplies[i].supply = wm8995_supply_names[i];
|
||||
|
||||
|
|
|
@ -2633,14 +2633,6 @@ static int wm8996_probe(struct snd_soc_codec *codec)
|
|||
init_completion(&wm8996->dcs_done);
|
||||
init_completion(&wm8996->fll_lock);
|
||||
|
||||
codec->control_data = wm8996->regmap;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
goto err;
|
||||
}
|
||||
|
||||
if (wm8996->pdata.num_retune_mobile_cfgs)
|
||||
wm8996_retune_mobile_pdata(codec);
|
||||
else
|
||||
|
@ -2679,13 +2671,11 @@ static int wm8996_probe(struct snd_soc_codec *codec)
|
|||
} else {
|
||||
dev_err(codec->dev, "Failed to request IRQ: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int wm8996_remove(struct snd_soc_codec *codec)
|
||||
|
|
|
@ -1053,9 +1053,7 @@ static int wm8997_codec_probe(struct snd_soc_codec *codec)
|
|||
struct wm8997_priv *priv = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
codec->control_data = priv->core.arizona->regmap;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 32, 16, SND_SOC_REGMAP);
|
||||
ret = snd_soc_codec_set_cache_io(codec, priv->core.arizona->regmap);
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
|
|
|
@ -1260,15 +1260,6 @@ static struct snd_soc_dai_driver wm9081_dai = {
|
|||
static int wm9081_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct wm9081_priv *wm9081 = snd_soc_codec_get_drvdata(codec);
|
||||
int ret;
|
||||
|
||||
codec->control_data = wm9081->regmap;
|
||||
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Enable zero cross by default */
|
||||
snd_soc_update_bits(codec, WM9081_ANALOGUE_LINEOUT,
|
||||
|
@ -1283,7 +1274,7 @@ static int wm9081_probe(struct snd_soc_codec *codec)
|
|||
ARRAY_SIZE(wm9081_eq_controls));
|
||||
}
|
||||
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int wm9081_remove(struct snd_soc_codec *codec)
|
||||
|
|
|
@ -522,16 +522,6 @@ static int wm9090_set_bias_level(struct snd_soc_codec *codec,
|
|||
|
||||
static int wm9090_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct wm9090_priv *wm9090 = dev_get_drvdata(codec->dev);
|
||||
int ret;
|
||||
|
||||
codec->control_data = wm9090->regmap;
|
||||
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
|
||||
if (ret != 0) {
|
||||
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Configure some defaults; they will be written out when we
|
||||
* bring the bias up.
|
||||
*/
|
||||
|
|
|
@ -32,7 +32,7 @@ config SND_SOC_INTEL_BAYTRAIL
|
|||
|
||||
config SND_SOC_INTEL_HASWELL_MACH
|
||||
tristate "ASoC Audio DSP support for Intel Haswell Lynxpoint"
|
||||
depends on SND_SOC_INTEL_SST && X86_INTEL_LPSS
|
||||
depends on SND_SOC_INTEL_SST && X86_INTEL_LPSS && I2C
|
||||
select SND_SOC_INTEL_HASWELL
|
||||
select SND_SOC_RT5640
|
||||
help
|
||||
|
@ -43,7 +43,7 @@ config SND_SOC_INTEL_HASWELL_MACH
|
|||
|
||||
config SND_SOC_INTEL_BYT_RT5640_MACH
|
||||
tristate "ASoC Audio driver for Intel Baytrail with RT5640 codec"
|
||||
depends on SND_SOC_INTEL_SST && X86_INTEL_LPSS
|
||||
depends on SND_SOC_INTEL_SST && X86_INTEL_LPSS && I2C
|
||||
select SND_SOC_INTEL_BAYTRAIL
|
||||
select SND_SOC_RT5640
|
||||
help
|
||||
|
|
|
@ -1,11 +1,19 @@
|
|||
config SND_KIRKWOOD_SOC
|
||||
tristate "SoC Audio for the Marvell Kirkwood and Dove chips"
|
||||
depends on ARCH_KIRKWOOD || ARCH_DOVE || COMPILE_TEST
|
||||
depends on ARCH_KIRKWOOD || ARCH_DOVE || ARCH_MVEBU || COMPILE_TEST
|
||||
help
|
||||
Say Y or M if you want to add support for codecs attached to
|
||||
the Kirkwood I2S interface. You will also need to select the
|
||||
audio interfaces to support below.
|
||||
|
||||
config SND_KIRKWOOD_SOC_ARMADA370_DB
|
||||
tristate "SoC Audio support for Armada 370 DB"
|
||||
depends on SND_KIRKWOOD_SOC && (ARCH_MVEBU || COMPILE_TEST) && I2C
|
||||
select SND_SOC_CS42L51
|
||||
help
|
||||
Say Y if you want to add support for SoC audio on
|
||||
the Armada 370 Development Board.
|
||||
|
||||
config SND_KIRKWOOD_SOC_OPENRD
|
||||
tristate "SoC Audio support for Kirkwood Openrd Client"
|
||||
depends on SND_KIRKWOOD_SOC && (MACH_OPENRD_CLIENT || MACH_OPENRD_ULTIMATE || COMPILE_TEST)
|
||||
|
|
|
@ -4,6 +4,8 @@ obj-$(CONFIG_SND_KIRKWOOD_SOC) += snd-soc-kirkwood.o
|
|||
|
||||
snd-soc-openrd-objs := kirkwood-openrd.o
|
||||
snd-soc-t5325-objs := kirkwood-t5325.o
|
||||
snd-soc-armada-370-db-objs := armada-370-db.o
|
||||
|
||||
obj-$(CONFIG_SND_KIRKWOOD_SOC_ARMADA370_DB) += snd-soc-armada-370-db.o
|
||||
obj-$(CONFIG_SND_KIRKWOOD_SOC_OPENRD) += snd-soc-openrd.o
|
||||
obj-$(CONFIG_SND_KIRKWOOD_SOC_T5325) += snd-soc-t5325.o
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue