drm/amdgpu: fix&cleanups for wb_clear
fix: should do right shift on wb before clearing cleanups: 1,should memset all wb buffer 2,set max wb number to 128 (total 4KB) is big enough Signed-off-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1156,7 +1156,7 @@ static inline void amdgpu_set_ib_value(struct amdgpu_cs_parser *p,
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/*
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* Writeback
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*/
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#define AMDGPU_MAX_WB 512 /* Reserve at most 512 WB slots for amdgpu-owned rings. */
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#define AMDGPU_MAX_WB 128 /* Reserve at most 128 WB slots for amdgpu-owned rings. */
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struct amdgpu_wb {
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struct amdgpu_bo *wb_obj;
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@ -492,7 +492,7 @@ static int amdgpu_device_wb_init(struct amdgpu_device *adev)
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memset(&adev->wb.used, 0, sizeof(adev->wb.used));
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/* clear wb memory */
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memset((char *)adev->wb.wb, 0, AMDGPU_MAX_WB * sizeof(uint32_t));
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memset((char *)adev->wb.wb, 0, AMDGPU_MAX_WB * sizeof(uint32_t) * 8);
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}
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return 0;
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@ -530,8 +530,9 @@ int amdgpu_device_wb_get(struct amdgpu_device *adev, u32 *wb)
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*/
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void amdgpu_device_wb_free(struct amdgpu_device *adev, u32 wb)
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{
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wb >>= 3;
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if (wb < adev->wb.num_wb)
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__clear_bit(wb >> 3, adev->wb.used);
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__clear_bit(wb, adev->wb.used);
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}
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/**
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