diff --git a/drivers/clk/imx/clk-imx6sl.c b/drivers/clk/imx/clk-imx6sl.c
index 0ef57eceb706..f26435960784 100644
--- a/drivers/clk/imx/clk-imx6sl.c
+++ b/drivers/clk/imx/clk-imx6sl.c
@@ -430,10 +430,20 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
 	/* Audio-related clocks configuration */
 	clk_set_parent(hws[IMX6SL_CLK_SPDIF0_SEL]->clk, hws[IMX6SL_CLK_PLL3_PFD3]->clk);
 
+	/* Initialize Video PLLs to valid frequency (650MHz). */
+	clk_set_rate(hws[IMX6SL_CLK_PLL5_VIDEO_DIV]->clk, 650000000);
+
 	/* set PLL5 video as lcdif pix parent clock */
 	clk_set_parent(hws[IMX6SL_CLK_LCDIF_PIX_SEL]->clk,
 			hws[IMX6SL_CLK_PLL5_VIDEO_DIV]->clk);
 
+	/* Configure EPDC clocks */
+	clk_set_parent(hws[IMX6SL_CLK_EPDC_PIX_SEL]->clk,
+		hws[IMX6SL_CLK_PLL5_VIDEO_DIV]->clk);
+	clk_set_parent(hws[IMX6SL_CLK_EPDC_AXI_SEL]->clk,
+		hws[IMX6SL_CLK_PLL2_PFD2]->clk);
+	clk_set_rate(hws[IMX6SL_CLK_EPDC_AXI]->clk, 200000000);
+
 	clk_set_parent(hws[IMX6SL_CLK_LCDIF_AXI_SEL]->clk,
 		       hws[IMX6SL_CLK_PLL2_PFD2]->clk);