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dmaengine: edma: Merge map_dmach_to_queue into assign_channel_eventq 

edma_assign_channel_eventq() is a wrapper around edma_map_dmach_to_queue()
We can merge the content of the later so we will have only one function
to be used for mapping channels to given eventq

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
hifive-unleashed-5.1
Peter Ujfalusi 2015-10-16 10:18:03 +03:00 committed by Vinod Koul
parent d9c345d18a
commit f9425deb66
1 changed files with 22 additions and 34 deletions
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56
drivers/dma/edma.c
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@ -391,22 +391,6 @@ static inline void clear_bits(int offset, int len, unsigned long *p)
clear_bit(offset + (len - 1), p);
}
static void edma_map_dmach_to_queue(struct edma_chan *echan,
enum dma_event_q queue_no)
{
struct edma_cc *ecc = echan->ecc;
int channel = EDMA_CHAN_SLOT(echan->ch_num);
int bit = (channel & 0x7) * 4;
/* default to low priority queue */
if (queue_no == EVENTQ_DEFAULT)
queue_no = ecc->default_queue;
queue_no &= 7;
edma_modify_array(ecc, EDMA_DMAQNUM, (channel >> 3), ~(0x7 << bit),
queue_no << bit);
}
static void edma_assign_priority_to_queue(struct edma_cc *ecc, int queue_no,
int priority)
{
@ -723,6 +707,25 @@ static void edma_clean_channel(struct edma_chan *echan)
edma_write(ecc, EDMA_CCERRCLR, BIT(16) | BIT(1) | BIT(0));
}
/* Move channel to a specific event queue */
static void edma_assign_channel_eventq(struct edma_chan *echan,
enum dma_event_q eventq_no)
{
struct edma_cc *ecc = echan->ecc;
int channel = EDMA_CHAN_SLOT(echan->ch_num);
int bit = (channel & 0x7) * 4;
/* default to low priority queue */
if (eventq_no == EVENTQ_DEFAULT)
eventq_no = ecc->default_queue;
if (eventq_no >= ecc->num_tc)
return;
eventq_no &= 7;
edma_modify_array(ecc, EDMA_DMAQNUM, (channel >> 3), ~(0x7 << bit),
eventq_no << bit);
}
static int edma_alloc_channel(struct edma_chan *echan,
enum dma_event_q eventq_no)
{
@ -751,7 +754,7 @@ static int edma_alloc_channel(struct edma_chan *echan,
edma_setup_interrupt(echan, true);
edma_map_dmach_to_queue(echan, eventq_no);
edma_assign_channel_eventq(echan, eventq_no);
return 0;
}
@ -764,21 +767,6 @@ static void edma_free_channel(struct edma_chan *echan)
edma_setup_interrupt(echan, false);
}
/* Move channel to a specific event queue */
static void edma_assign_channel_eventq(struct edma_chan *echan,
enum dma_event_q eventq_no)
{
struct edma_cc *ecc = echan->ecc;
/* default to low priority queue */
if (eventq_no == EVENTQ_DEFAULT)
eventq_no = ecc->default_queue;
if (eventq_no >= ecc->num_tc)
return;
edma_map_dmach_to_queue(echan, eventq_no);
}
static inline struct edma_cc *to_edma_cc(struct dma_device *d)
{
return container_of(d, struct edma_cc, dma_slave);
@ -2154,8 +2142,8 @@ static int edma_probe(struct platform_device *pdev)
for (i = 0; i < ecc->num_channels; i++) {
/* Assign all channels to the default queue */
edma_map_dmach_to_queue(&ecc->slave_chans[i],
info->default_queue);
edma_assign_channel_eventq(&ecc->slave_chans[i],
info->default_queue);
/* Set entry slot to the dummy slot */
edma_set_chmap(&ecc->slave_chans[i], ecc->dummy_slot);
}