1
0
Fork 0

ARM: dts: prima2: add resets property for VPP nodes

this patch adds missed resets property for CSR SiRFprimaII Video Post
Processor(VPP) node.

Signed-off-by: Renwei Wu <renwei.wu@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
hifive-unleashed-5.1
Renwei Wu 2014-11-25 18:46:43 +08:00 committed by Barry Song
parent 1f634d7415
commit f97b1a1de4
1 changed files with 1 additions and 0 deletions

View File

@ -137,6 +137,7 @@
reg = <0x90020000 0x10000>;
interrupts = <31>;
clocks = <&clks 35>;
resets = <&rstc 6>;
};
};