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media fixes for v5.10-rc6 

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Merge tag 'media/v5.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media

Pull media fixes from Mauro Carvalho Chehab:

 - a rand Kconfig fixup for mtk-vcodec

 - a fix at h264 handling at cedrus codec driver

 - some warning fixes when config PM is not enabled at marvell-ccic

 - two fixes at venus codec driver: one related to codec profile and the
   other one related to a bad error path which causes an OOPS on module
   re-bind

* tag 'media/v5.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media:
  media: venus: pm_helpers: Fix kernel module reload
  media: venus: venc: Fix setting of profile and level
  media: cedrus: h264: Fix check for presence of scaling matrix
  media: media/platform/marvell-ccic: fix warnings when CONFIG_PM is not enabled
  media: mtk-vcodec: fix build breakage when one of VPU or SCP is enabled
  media: mtk-vcodec: move firmware implementations into their own files
zero-sugar-mainline-defconfig
Linus Torvalds 2020-11-25 10:35:44 -08:00
parent 127c501a03 9215f6bb47
commit fa02fcd94b
15 changed files with 338 additions and 188 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
drivers/media/platform/Kconfig
View File

@ -253,17 +253,31 @@ config VIDEO_MEDIATEK_VCODEC
depends on MTK_IOMMU || COMPILE_TEST
depends on VIDEO_DEV && VIDEO_V4L2
depends on ARCH_MEDIATEK || COMPILE_TEST
depends on VIDEO_MEDIATEK_VPU || MTK_SCP
# The two following lines ensure we have the same state ("m" or "y") as
# our dependencies, to avoid missing symbols during link.
depends on VIDEO_MEDIATEK_VPU || !VIDEO_MEDIATEK_VPU
depends on MTK_SCP || !MTK_SCP
select VIDEOBUF2_DMA_CONTIG
select V4L2_MEM2MEM_DEV
select VIDEO_MEDIATEK_VPU
select MTK_SCP
select VIDEO_MEDIATEK_VCODEC_VPU if VIDEO_MEDIATEK_VPU
select VIDEO_MEDIATEK_VCODEC_SCP if MTK_SCP
help
Mediatek video codec driver provides HW capability to
encode and decode in a range of video formats
This driver rely on VPU driver to communicate with VPU.
Mediatek video codec driver provides HW capability to
encode and decode in a range of video formats on MT8173
and MT8183.
To compile this driver as modules, choose M here: the
modules will be called mtk-vcodec-dec and mtk-vcodec-enc.
Note that support for MT8173 requires VIDEO_MEDIATEK_VPU to
also be selected. Support for MT8183 depends on MTK_SCP.
To compile this driver as modules, choose M here: the
modules will be called mtk-vcodec-dec and mtk-vcodec-enc.
config VIDEO_MEDIATEK_VCODEC_VPU
bool
config VIDEO_MEDIATEK_VCODEC_SCP
bool
config VIDEO_MEM2MEM_DEINTERLACE
tristate "Deinterlace support"

2
drivers/media/platform/marvell-ccic/mmp-driver.c
View File

@ -307,6 +307,7 @@ static int mmpcam_platform_remove(struct platform_device *pdev)
* Suspend/resume support.
*/
#ifdef CONFIG_PM
static int mmpcam_runtime_resume(struct device *dev)
{
struct mmp_camera *cam = dev_get_drvdata(dev);
@ -352,6 +353,7 @@ static int __maybe_unused mmpcam_resume(struct device *dev)
return mccic_resume(&cam->mcam);
return 0;
}
#endif
static const struct dev_pm_ops mmpcam_pm_ops = {
SET_RUNTIME_PM_OPS(mmpcam_runtime_suspend, mmpcam_runtime_resume, NULL)

10
drivers/media/platform/mtk-vcodec/Makefile
View File

@ -24,4 +24,12 @@ mtk-vcodec-enc-y := venc/venc_vp8_if.o \
mtk-vcodec-common-y := mtk_vcodec_intr.o \
mtk_vcodec_util.o \
mtk_vcodec_fw.o
mtk_vcodec_fw.o \
ifneq ($(CONFIG_VIDEO_MEDIATEK_VCODEC_VPU),)
mtk-vcodec-common-y += mtk_vcodec_fw_vpu.o
endif
ifneq ($(CONFIG_VIDEO_MEDIATEK_VCODEC_SCP),)
mtk-vcodec-common-y += mtk_vcodec_fw_scp.o
endif

2
drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_drv.c
View File

@ -241,7 +241,7 @@ static int mtk_vcodec_probe(struct platform_device *pdev)
}
dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32));
dev->fw_handler = mtk_vcodec_fw_select(dev, fw_type, VPU_RST_DEC);
dev->fw_handler = mtk_vcodec_fw_select(dev, fw_type, DECODER);
if (IS_ERR(dev->fw_handler))
return PTR_ERR(dev->fw_handler);

2
drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c
View File

@ -293,7 +293,7 @@ static int mtk_vcodec_probe(struct platform_device *pdev)
}
dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32));
dev->fw_handler = mtk_vcodec_fw_select(dev, fw_type, VPU_RST_ENC);
dev->fw_handler = mtk_vcodec_fw_select(dev, fw_type, ENCODER);
if (IS_ERR(dev->fw_handler))
return PTR_ERR(dev->fw_handler);

174
drivers/media/platform/mtk-vcodec/mtk_vcodec_fw.c
View File

@ -1,193 +1,29 @@
// SPDX-License-Identifier: GPL-2.0
#include "mtk_vcodec_fw.h"
#include "mtk_vcodec_fw_priv.h"
#include "mtk_vcodec_util.h"
#include "mtk_vcodec_drv.h"
struct mtk_vcodec_fw_ops {
int (*load_firmware)(struct mtk_vcodec_fw *fw);
unsigned int (*get_vdec_capa)(struct mtk_vcodec_fw *fw);
unsigned int (*get_venc_capa)(struct mtk_vcodec_fw *fw);
void * (*map_dm_addr)(struct mtk_vcodec_fw *fw, u32 dtcm_dmem_addr);
int (*ipi_register)(struct mtk_vcodec_fw *fw, int id,
mtk_vcodec_ipi_handler handler, const char *name, void *priv);
int (*ipi_send)(struct mtk_vcodec_fw *fw, int id, void *buf,
unsigned int len, unsigned int wait);
};
struct mtk_vcodec_fw {
enum mtk_vcodec_fw_type type;
const struct mtk_vcodec_fw_ops *ops;
struct platform_device *pdev;
struct mtk_scp *scp;
};
static int mtk_vcodec_vpu_load_firmware(struct mtk_vcodec_fw *fw)
{
return vpu_load_firmware(fw->pdev);
}
static unsigned int mtk_vcodec_vpu_get_vdec_capa(struct mtk_vcodec_fw *fw)
{
return vpu_get_vdec_hw_capa(fw->pdev);
}
static unsigned int mtk_vcodec_vpu_get_venc_capa(struct mtk_vcodec_fw *fw)
{
return vpu_get_venc_hw_capa(fw->pdev);
}
static void *mtk_vcodec_vpu_map_dm_addr(struct mtk_vcodec_fw *fw,
u32 dtcm_dmem_addr)
{
return vpu_mapping_dm_addr(fw->pdev, dtcm_dmem_addr);
}
static int mtk_vcodec_vpu_set_ipi_register(struct mtk_vcodec_fw *fw, int id,
mtk_vcodec_ipi_handler handler,
const char *name, void *priv)
{
/*
* The handler we receive takes a void * as its first argument. We
* cannot change this because it needs to be passed down to the rproc
* subsystem when SCP is used. VPU takes a const argument, which is
* more constrained, so the conversion below is safe.
*/
ipi_handler_t handler_const = (ipi_handler_t)handler;
return vpu_ipi_register(fw->pdev, id, handler_const, name, priv);
}
static int mtk_vcodec_vpu_ipi_send(struct mtk_vcodec_fw *fw, int id, void *buf,
unsigned int len, unsigned int wait)
{
return vpu_ipi_send(fw->pdev, id, buf, len);
}
static const struct mtk_vcodec_fw_ops mtk_vcodec_vpu_msg = {
.load_firmware = mtk_vcodec_vpu_load_firmware,
.get_vdec_capa = mtk_vcodec_vpu_get_vdec_capa,
.get_venc_capa = mtk_vcodec_vpu_get_venc_capa,
.map_dm_addr = mtk_vcodec_vpu_map_dm_addr,
.ipi_register = mtk_vcodec_vpu_set_ipi_register,
.ipi_send = mtk_vcodec_vpu_ipi_send,
};
static int mtk_vcodec_scp_load_firmware(struct mtk_vcodec_fw *fw)
{
return rproc_boot(scp_get_rproc(fw->scp));
}
static unsigned int mtk_vcodec_scp_get_vdec_capa(struct mtk_vcodec_fw *fw)
{
return scp_get_vdec_hw_capa(fw->scp);
}
static unsigned int mtk_vcodec_scp_get_venc_capa(struct mtk_vcodec_fw *fw)
{
return scp_get_venc_hw_capa(fw->scp);
}
static void *mtk_vcodec_vpu_scp_dm_addr(struct mtk_vcodec_fw *fw,
u32 dtcm_dmem_addr)
{
return scp_mapping_dm_addr(fw->scp, dtcm_dmem_addr);
}
static int mtk_vcodec_scp_set_ipi_register(struct mtk_vcodec_fw *fw, int id,
mtk_vcodec_ipi_handler handler,
const char *name, void *priv)
{
return scp_ipi_register(fw->scp, id, handler, priv);
}
static int mtk_vcodec_scp_ipi_send(struct mtk_vcodec_fw *fw, int id, void *buf,
unsigned int len, unsigned int wait)
{
return scp_ipi_send(fw->scp, id, buf, len, wait);
}
static const struct mtk_vcodec_fw_ops mtk_vcodec_rproc_msg = {
.load_firmware = mtk_vcodec_scp_load_firmware,
.get_vdec_capa = mtk_vcodec_scp_get_vdec_capa,
.get_venc_capa = mtk_vcodec_scp_get_venc_capa,
.map_dm_addr = mtk_vcodec_vpu_scp_dm_addr,
.ipi_register = mtk_vcodec_scp_set_ipi_register,
.ipi_send = mtk_vcodec_scp_ipi_send,
};
static void mtk_vcodec_reset_handler(void *priv)
{
struct mtk_vcodec_dev *dev = priv;
struct mtk_vcodec_ctx *ctx;
mtk_v4l2_err("Watchdog timeout!!");
mutex_lock(&dev->dev_mutex);
list_for_each_entry(ctx, &dev->ctx_list, list) {
ctx->state = MTK_STATE_ABORT;
mtk_v4l2_debug(0, "[%d] Change to state MTK_STATE_ABORT",
ctx->id);
}
mutex_unlock(&dev->dev_mutex);
}
struct mtk_vcodec_fw *mtk_vcodec_fw_select(struct mtk_vcodec_dev *dev,
enum mtk_vcodec_fw_type type,
enum rst_id rst_id)
enum mtk_vcodec_fw_use fw_use)
{
const struct mtk_vcodec_fw_ops *ops;
struct mtk_vcodec_fw *fw;
struct platform_device *fw_pdev = NULL;
struct mtk_scp *scp = NULL;
switch (type) {
case VPU:
ops = &mtk_vcodec_vpu_msg;
fw_pdev = vpu_get_plat_device(dev->plat_dev);
if (!fw_pdev) {
mtk_v4l2_err("firmware device is not ready");
return ERR_PTR(-EINVAL);
}
vpu_wdt_reg_handler(fw_pdev, mtk_vcodec_reset_handler,
dev, rst_id);
break;
return mtk_vcodec_fw_vpu_init(dev, fw_use);
case SCP:
ops = &mtk_vcodec_rproc_msg;
scp = scp_get(dev->plat_dev);
if (!scp) {
mtk_v4l2_err("could not get vdec scp handle");
return ERR_PTR(-EPROBE_DEFER);
}
break;
return mtk_vcodec_fw_scp_init(dev);
default:
mtk_v4l2_err("invalid vcodec fw type");
return ERR_PTR(-EINVAL);
}
fw = devm_kzalloc(&dev->plat_dev->dev, sizeof(*fw), GFP_KERNEL);
if (!fw)
return ERR_PTR(-EINVAL);
fw->type = type;
fw->ops = ops;
fw->pdev = fw_pdev;
fw->scp = scp;
return fw;
}
EXPORT_SYMBOL_GPL(mtk_vcodec_fw_select);
void mtk_vcodec_fw_release(struct mtk_vcodec_fw *fw)
{
switch (fw->type) {
case VPU:
put_device(&fw->pdev->dev);
break;
case SCP:
scp_put(fw->scp);
break;
}
fw->ops->release(fw);
}
EXPORT_SYMBOL_GPL(mtk_vcodec_fw_release);

7
drivers/media/platform/mtk-vcodec/mtk_vcodec_fw.h
View File

@ -15,6 +15,11 @@ enum mtk_vcodec_fw_type {
SCP,
};
enum mtk_vcodec_fw_use {
DECODER,
ENCODER,
};
struct mtk_vcodec_fw;
typedef void (*mtk_vcodec_ipi_handler) (void *data,
@ -22,7 +27,7 @@ typedef void (*mtk_vcodec_ipi_handler) (void *data,
struct mtk_vcodec_fw *mtk_vcodec_fw_select(struct mtk_vcodec_dev *dev,
enum mtk_vcodec_fw_type type,
enum rst_id rst_id);
enum mtk_vcodec_fw_use fw_use);
void mtk_vcodec_fw_release(struct mtk_vcodec_fw *fw);
int mtk_vcodec_fw_load_firmware(struct mtk_vcodec_fw *fw);

52
drivers/media/platform/mtk-vcodec/mtk_vcodec_fw_priv.h 100644
View File

@ -0,0 +1,52 @@
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _MTK_VCODEC_FW_PRIV_H_
#define _MTK_VCODEC_FW_PRIV_H_
#include "mtk_vcodec_fw.h"
struct mtk_vcodec_dev;
struct mtk_vcodec_fw {
enum mtk_vcodec_fw_type type;
const struct mtk_vcodec_fw_ops *ops;
struct platform_device *pdev;
struct mtk_scp *scp;
};
struct mtk_vcodec_fw_ops {
int (*load_firmware)(struct mtk_vcodec_fw *fw);
unsigned int (*get_vdec_capa)(struct mtk_vcodec_fw *fw);
unsigned int (*get_venc_capa)(struct mtk_vcodec_fw *fw);
void *(*map_dm_addr)(struct mtk_vcodec_fw *fw, u32 dtcm_dmem_addr);
int (*ipi_register)(struct mtk_vcodec_fw *fw, int id,
mtk_vcodec_ipi_handler handler, const char *name,
void *priv);
int (*ipi_send)(struct mtk_vcodec_fw *fw, int id, void *buf,
unsigned int len, unsigned int wait);
void (*release)(struct mtk_vcodec_fw *fw);
};
#if IS_ENABLED(CONFIG_VIDEO_MEDIATEK_VCODEC_VPU)
struct mtk_vcodec_fw *mtk_vcodec_fw_vpu_init(struct mtk_vcodec_dev *dev,
enum mtk_vcodec_fw_use fw_use);
#else
static inline struct mtk_vcodec_fw *
mtk_vcodec_fw_vpu_init(struct mtk_vcodec_dev *dev,
enum mtk_vcodec_fw_use fw_use)
{
return ERR_PTR(-ENODEV);
}
#endif /* CONFIG_VIDEO_MEDIATEK_VCODEC_VPU */
#if IS_ENABLED(CONFIG_VIDEO_MEDIATEK_VCODEC_SCP)
struct mtk_vcodec_fw *mtk_vcodec_fw_scp_init(struct mtk_vcodec_dev *dev);
#else
static inline struct mtk_vcodec_fw *
mtk_vcodec_fw_scp_init(struct mtk_vcodec_dev *dev)
{
return ERR_PTR(-ENODEV);
}
#endif /* CONFIG_VIDEO_MEDIATEK_VCODEC_SCP */
#endif /* _MTK_VCODEC_FW_PRIV_H_ */

73
drivers/media/platform/mtk-vcodec/mtk_vcodec_fw_scp.c 100644
View File

@ -0,0 +1,73 @@
// SPDX-License-Identifier: GPL-2.0
#include "mtk_vcodec_fw_priv.h"
#include "mtk_vcodec_util.h"
#include "mtk_vcodec_drv.h"
static int mtk_vcodec_scp_load_firmware(struct mtk_vcodec_fw *fw)
{
return rproc_boot(scp_get_rproc(fw->scp));
}
static unsigned int mtk_vcodec_scp_get_vdec_capa(struct mtk_vcodec_fw *fw)
{
return scp_get_vdec_hw_capa(fw->scp);
}
static unsigned int mtk_vcodec_scp_get_venc_capa(struct mtk_vcodec_fw *fw)
{
return scp_get_venc_hw_capa(fw->scp);
}
static void *mtk_vcodec_vpu_scp_dm_addr(struct mtk_vcodec_fw *fw,
u32 dtcm_dmem_addr)
{
return scp_mapping_dm_addr(fw->scp, dtcm_dmem_addr);
}
static int mtk_vcodec_scp_set_ipi_register(struct mtk_vcodec_fw *fw, int id,
mtk_vcodec_ipi_handler handler,
const char *name, void *priv)
{
return scp_ipi_register(fw->scp, id, handler, priv);
}
static int mtk_vcodec_scp_ipi_send(struct mtk_vcodec_fw *fw, int id, void *buf,
unsigned int len, unsigned int wait)
{
return scp_ipi_send(fw->scp, id, buf, len, wait);
}
static void mtk_vcodec_scp_release(struct mtk_vcodec_fw *fw)
{
scp_put(fw->scp);
}
static const struct mtk_vcodec_fw_ops mtk_vcodec_rproc_msg = {
.load_firmware = mtk_vcodec_scp_load_firmware,
.get_vdec_capa = mtk_vcodec_scp_get_vdec_capa,
.get_venc_capa = mtk_vcodec_scp_get_venc_capa,
.map_dm_addr = mtk_vcodec_vpu_scp_dm_addr,
.ipi_register = mtk_vcodec_scp_set_ipi_register,
.ipi_send = mtk_vcodec_scp_ipi_send,
.release = mtk_vcodec_scp_release,
};
struct mtk_vcodec_fw *mtk_vcodec_fw_scp_init(struct mtk_vcodec_dev *dev)
{
struct mtk_vcodec_fw *fw;
struct mtk_scp *scp;
scp = scp_get(dev->plat_dev);
if (!scp) {
mtk_v4l2_err("could not get vdec scp handle");
return ERR_PTR(-EPROBE_DEFER);
}
fw = devm_kzalloc(&dev->plat_dev->dev, sizeof(*fw), GFP_KERNEL);
fw->type = SCP;
fw->ops = &mtk_vcodec_rproc_msg;
fw->scp = scp;
return fw;
}

110
drivers/media/platform/mtk-vcodec/mtk_vcodec_fw_vpu.c 100644
View File

@ -0,0 +1,110 @@
// SPDX-License-Identifier: GPL-2.0
#include "mtk_vcodec_fw_priv.h"
#include "mtk_vcodec_util.h"
#include "mtk_vcodec_drv.h"
static int mtk_vcodec_vpu_load_firmware(struct mtk_vcodec_fw *fw)
{
return vpu_load_firmware(fw->pdev);
}
static unsigned int mtk_vcodec_vpu_get_vdec_capa(struct mtk_vcodec_fw *fw)
{
return vpu_get_vdec_hw_capa(fw->pdev);
}
static unsigned int mtk_vcodec_vpu_get_venc_capa(struct mtk_vcodec_fw *fw)
{
return vpu_get_venc_hw_capa(fw->pdev);
}
static void *mtk_vcodec_vpu_map_dm_addr(struct mtk_vcodec_fw *fw,
u32 dtcm_dmem_addr)
{
return vpu_mapping_dm_addr(fw->pdev, dtcm_dmem_addr);
}
static int mtk_vcodec_vpu_set_ipi_register(struct mtk_vcodec_fw *fw, int id,
mtk_vcodec_ipi_handler handler,
const char *name, void *priv)
{
/*
* The handler we receive takes a void * as its first argument. We
* cannot change this because it needs to be passed down to the rproc
* subsystem when SCP is used. VPU takes a const argument, which is
* more constrained, so the conversion below is safe.
*/
ipi_handler_t handler_const = (ipi_handler_t)handler;
return vpu_ipi_register(fw->pdev, id, handler_const, name, priv);
}
static int mtk_vcodec_vpu_ipi_send(struct mtk_vcodec_fw *fw, int id, void *buf,
unsigned int len, unsigned int wait)
{
return vpu_ipi_send(fw->pdev, id, buf, len);
}
static void mtk_vcodec_vpu_release(struct mtk_vcodec_fw *fw)
{
put_device(&fw->pdev->dev);
}
static void mtk_vcodec_vpu_reset_handler(void *priv)
{
struct mtk_vcodec_dev *dev = priv;
struct mtk_vcodec_ctx *ctx;
mtk_v4l2_err("Watchdog timeout!!");
mutex_lock(&dev->dev_mutex);
list_for_each_entry(ctx, &dev->ctx_list, list) {
ctx->state = MTK_STATE_ABORT;
mtk_v4l2_debug(0, "[%d] Change to state MTK_STATE_ABORT",
ctx->id);
}
mutex_unlock(&dev->dev_mutex);
}
static const struct mtk_vcodec_fw_ops mtk_vcodec_vpu_msg = {
.load_firmware = mtk_vcodec_vpu_load_firmware,
.get_vdec_capa = mtk_vcodec_vpu_get_vdec_capa,
.get_venc_capa = mtk_vcodec_vpu_get_venc_capa,
.map_dm_addr = mtk_vcodec_vpu_map_dm_addr,
.ipi_register = mtk_vcodec_vpu_set_ipi_register,
.ipi_send = mtk_vcodec_vpu_ipi_send,
.release = mtk_vcodec_vpu_release,
};
struct mtk_vcodec_fw *mtk_vcodec_fw_vpu_init(struct mtk_vcodec_dev *dev,
enum mtk_vcodec_fw_use fw_use)
{
struct platform_device *fw_pdev;
struct mtk_vcodec_fw *fw;
enum rst_id rst_id;
switch (fw_use) {
case ENCODER:
rst_id = VPU_RST_ENC;
break;
case DECODER:
default:
rst_id = VPU_RST_DEC;
break;
}
fw_pdev = vpu_get_plat_device(dev->plat_dev);
if (!fw_pdev) {
mtk_v4l2_err("firmware device is not ready");
return ERR_PTR(-EINVAL);
}
vpu_wdt_reg_handler(fw_pdev, mtk_vcodec_vpu_reset_handler, dev, rst_id);
fw = devm_kzalloc(&dev->plat_dev->dev, sizeof(*fw), GFP_KERNEL);
fw->type = VPU;
fw->ops = &mtk_vcodec_vpu_msg;
fw->pdev = fw_pdev;
return fw;
}

15
drivers/media/platform/qcom/venus/core.h
View File

@ -243,8 +243,19 @@ struct venc_controls {
u32 header_mode;
u32 profile;
u32 level;
struct {
u32 h264;
u32 mpeg4;
u32 hevc;
u32 vp8;
u32 vp9;
} profile;
struct {
u32 h264;
u32 mpeg4;
u32 hevc;
u32 vp9;
} level;
};
struct venus_buffer {

4
drivers/media/platform/qcom/venus/pm_helpers.c
View File

@ -794,7 +794,7 @@ skip_pmdomains:
return 0;
opp_dl_add_err:
dev_pm_domain_detach(core->opp_pmdomain, true);
dev_pm_opp_detach_genpd(core->opp_table);
opp_attach_err:
if (core->pd_dl_venus) {
device_link_del(core->pd_dl_venus);
@ -832,7 +832,7 @@ skip_pmdomains:
if (core->opp_dl_venus)
device_link_del(core->opp_dl_venus);
dev_pm_domain_detach(core->opp_pmdomain, true);
dev_pm_opp_detach_genpd(core->opp_table);
}
static int core_get_v4(struct device *dev)

31
drivers/media/platform/qcom/venus/venc.c
View File

@ -537,6 +537,7 @@ static int venc_set_properties(struct venus_inst *inst)
struct hfi_quantization quant;
struct hfi_quantization_range quant_range;
u32 ptype, rate_control, bitrate;
u32 profile, level;
int ret;
ret = venus_helper_set_work_mode(inst, VIDC_WORK_MODE_2);
@ -684,7 +685,35 @@ static int venc_set_properties(struct venus_inst *inst)
if (ret)
return ret;
ret = venus_helper_set_profile_level(inst, ctr->profile, ctr->level);
switch (inst->hfi_codec) {
case HFI_VIDEO_CODEC_H264:
profile = ctr->profile.h264;
level = ctr->level.h264;
break;
case HFI_VIDEO_CODEC_MPEG4:
profile = ctr->profile.mpeg4;
level = ctr->level.mpeg4;
break;
case HFI_VIDEO_CODEC_VP8:
profile = ctr->profile.vp8;
level = 0;
break;
case HFI_VIDEO_CODEC_VP9:
profile = ctr->profile.vp9;
level = ctr->level.vp9;
break;
case HFI_VIDEO_CODEC_HEVC:
profile = ctr->profile.hevc;
level = ctr->level.hevc;
break;
case HFI_VIDEO_CODEC_MPEG2:
default:
profile = 0;
level = 0;
break;
}
ret = venus_helper_set_profile_level(inst, profile, level);
if (ret)
return ret;

14
drivers/media/platform/qcom/venus/venc_ctrls.c
View File

@ -103,15 +103,25 @@ static int venc_op_s_ctrl(struct v4l2_ctrl *ctrl)
ctr->h264_entropy_mode = ctrl->val;
break;
case V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE:
ctr->profile.mpeg4 = ctrl->val;
break;
case V4L2_CID_MPEG_VIDEO_H264_PROFILE:
ctr->profile.h264 = ctrl->val;
break;
case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE:
ctr->profile.hevc = ctrl->val;
break;
case V4L2_CID_MPEG_VIDEO_VP8_PROFILE:
ctr->profile = ctrl->val;
ctr->profile.vp8 = ctrl->val;
break;
case V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL:
ctr->level.mpeg4 = ctrl->val;
break;
case V4L2_CID_MPEG_VIDEO_H264_LEVEL:
ctr->level.h264 = ctrl->val;
break;
case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL:
ctr->level = ctrl->val;
ctr->level.hevc = ctrl->val;
break;
case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
ctr->h264_i_qp = ctrl->val;

2
drivers/staging/media/sunxi/cedrus/cedrus_h264.c
View File

@ -446,7 +446,7 @@ static void cedrus_set_params(struct cedrus_ctx *ctx,
reg |= (pps->second_chroma_qp_index_offset & 0x3f) << 16;
reg |= (pps->chroma_qp_index_offset & 0x3f) << 8;
reg |= (pps->pic_init_qp_minus26 + 26 + slice->slice_qp_delta) & 0x3f;
if (pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT)
if (!(pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT))
reg |= VE_H264_SHS_QP_SCALING_MATRIX_DEFAULT;
cedrus_write(dev, VE_H264_SHS_QP, reg);