MIPS: Octeon: Add DTS for D-Link DSR-1000N
Add DTS for D-Link DSR-1000N that is usable as is without any "pruning" with APPENDED_DTB. Split out the common parts from octeon_3xxx.dts into octeon_3xxx.dtsi. Compared to builtin generic DTB, we can specificy fixed links properly and avoid probing non-existent I2C devices. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: David Daney <ddaney.cavm@gmail.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12840/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Aaro Koskinen
Ralf Baechle
parent
99a7a234c8
commit
fa0a497b9e
78
arch/mips/boot/dts/cavium-octeon/dlink_dsr-1000n.dts
Normal file
78
arch/mips/boot/dts/cavium-octeon/dlink_dsr-1000n.dts
Normal file
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@ -0,0 +1,78 @@
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/*
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* Device tree source for D-Link DSR-1000N.
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*
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* Written by: Aaro Koskinen <aaro.koskinen@iki.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/include/ "octeon_3xxx.dtsi"
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/ {
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model = "dlink,dsr-1000n";
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soc@0 {
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smi0: mdio@1180000001800 {
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phy8: ethernet-phy@8 {
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reg = <8>;
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compatible = "ethernet-phy-ieee802.3-c22";
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};
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};
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pip: pip@11800a0000000 {
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interface@0 {
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ethernet@0 {
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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ethernet@1 {
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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ethernet@2 {
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phy-handle = <&phy8>;
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};
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};
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};
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twsi0: i2c@1180000001000 {
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rtc@68 {
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compatible = "dallas,ds1337";
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reg = <0x68>;
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};
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};
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uart0: serial@1180000000800 {
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clock-frequency = <500000000>;
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};
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usbn: usbn@1180068000000 {
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refclk-frequency = <12000000>;
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refclk-type = "crystal";
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};
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};
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leds {
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compatible = "gpio-leds";
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usb1 {
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label = "usb1";
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gpios = <&gpio 9 1>; /* Active low */
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};
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usb2 {
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label = "usb2";
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gpios = <&gpio 10 1>; /* Active low */
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};
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};
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aliases {
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pip = &pip;
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};
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};
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@ -1,4 +1,3 @@
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/dts-v1/;
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/*
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* OCTEON 3XXX, 5XXX, 63XX device tree skeleton.
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*
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@ -6,56 +5,12 @@
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* use. Because of this, it contains a super-set of the available
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* devices and properties.
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*/
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/include/ "octeon_3xxx.dtsi"
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/ {
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compatible = "cavium,octeon-3860";
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&ciu>;
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soc@0 {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges; /* Direct mapping */
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ciu: interrupt-controller@1070000000000 {
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compatible = "cavium,octeon-3860-ciu";
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interrupt-controller;
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/* Interrupts are specified by two parts:
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* 1) Controller register (0 or 1)
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* 2) Bit within the register (0..63)
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*/
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#interrupt-cells = <2>;
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reg = <0x10700 0x00000000 0x0 0x7000>;
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};
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gpio: gpio-controller@1070000000800 {
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#gpio-cells = <2>;
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compatible = "cavium,octeon-3860-gpio";
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reg = <0x10700 0x00000800 0x0 0x100>;
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gpio-controller;
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/* Interrupts are specified by two parts:
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* 1) GPIO pin number (0..15)
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* 2) Triggering (1 - edge rising
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* 2 - edge falling
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* 4 - level active high
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* 8 - level active low)
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*/
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interrupt-controller;
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#interrupt-cells = <2>;
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/* The GPIO pin connect to 16 consecutive CUI bits */
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interrupts = <0 16>, <0 17>, <0 18>, <0 19>,
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<0 20>, <0 21>, <0 22>, <0 23>,
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<0 24>, <0 25>, <0 26>, <0 27>,
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<0 28>, <0 29>, <0 30>, <0 31>;
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};
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smi0: mdio@1180000001800 {
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compatible = "cavium,octeon-3860-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x11800 0x00001800 0x0 0x40>;
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phy0: ethernet-phy@0 {
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compatible = "marvell,88e1118";
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marvell,reg-init =
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@ -220,35 +175,16 @@
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};
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pip: pip@11800a0000000 {
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compatible = "cavium,octeon-3860-pip";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x11800 0xa0000000 0x0 0x2000>;
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interface@0 {
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compatible = "cavium,octeon-3860-pip-interface";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>; /* interface */
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ethernet@0 {
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compatible = "cavium,octeon-3860-pip-port";
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reg = <0x0>; /* Port */
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local-mac-address = [ 00 00 00 00 00 00 ];
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phy-handle = <&phy2>;
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cavium,alt-phy-handle = <&phy100>;
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};
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ethernet@1 {
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compatible = "cavium,octeon-3860-pip-port";
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reg = <0x1>; /* Port */
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local-mac-address = [ 00 00 00 00 00 00 ];
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phy-handle = <&phy3>;
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cavium,alt-phy-handle = <&phy101>;
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};
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ethernet@2 {
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compatible = "cavium,octeon-3860-pip-port";
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reg = <0x2>; /* Port */
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local-mac-address = [ 00 00 00 00 00 00 ];
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phy-handle = <&phy4>;
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cavium,alt-phy-handle = <&phy102>;
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};
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@ -322,11 +258,6 @@
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};
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interface@1 {
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compatible = "cavium,octeon-3860-pip-interface";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>; /* interface */
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ethernet@0 {
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compatible = "cavium,octeon-3860-pip-port";
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reg = <0x0>; /* Port */
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@ -355,13 +286,6 @@
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};
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twsi0: i2c@1180000001000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "cavium,octeon-3860-twsi";
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reg = <0x11800 0x00001000 0x0 0x200>;
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interrupts = <0 45>;
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clock-frequency = <100000>;
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rtc@68 {
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compatible = "dallas,ds1337";
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reg = <0x68>;
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@ -381,15 +305,6 @@
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clock-frequency = <100000>;
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};
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uart0: serial@1180000000800 {
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compatible = "cavium,octeon-3860-uart","ns16550";
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reg = <0x11800 0x00000800 0x0 0x400>;
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clock-frequency = <0>;
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current-speed = <115200>;
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reg-shift = <3>;
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interrupts = <0 34>;
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};
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uart1: serial@1180000000c00 {
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compatible = "cavium,octeon-3860-uart","ns16550";
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reg = <0x11800 0x00000c00 0x0 0x400>;
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@ -409,98 +324,6 @@
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};
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bootbus: bootbus@1180000000000 {
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compatible = "cavium,octeon-3860-bootbus";
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reg = <0x11800 0x00000000 0x0 0x200>;
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/* The chip select number and offset */
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#address-cells = <2>;
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/* The size of the chip select region */
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#size-cells = <1>;
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ranges = <0 0 0x0 0x1f400000 0xc00000>,
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<1 0 0x10000 0x30000000 0>,
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<2 0 0x10000 0x40000000 0>,
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<3 0 0x10000 0x50000000 0>,
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<4 0 0x0 0x1d020000 0x10000>,
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<5 0 0x0 0x1d040000 0x10000>,
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<6 0 0x0 0x1d050000 0x10000>,
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<7 0 0x10000 0x90000000 0>;
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cavium,cs-config@0 {
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compatible = "cavium,octeon-3860-bootbus-config";
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cavium,cs-index = <0>;
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cavium,t-adr = <20>;
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cavium,t-ce = <60>;
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cavium,t-oe = <60>;
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cavium,t-we = <45>;
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cavium,t-rd-hld = <35>;
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cavium,t-wr-hld = <45>;
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cavium,t-pause = <0>;
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cavium,t-wait = <0>;
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cavium,t-page = <35>;
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cavium,t-rd-dly = <0>;
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cavium,pages = <0>;
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cavium,bus-width = <8>;
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};
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cavium,cs-config@4 {
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compatible = "cavium,octeon-3860-bootbus-config";
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cavium,cs-index = <4>;
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cavium,t-adr = <320>;
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cavium,t-ce = <320>;
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cavium,t-oe = <320>;
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cavium,t-we = <320>;
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cavium,t-rd-hld = <320>;
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cavium,t-wr-hld = <320>;
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cavium,t-pause = <320>;
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cavium,t-wait = <320>;
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cavium,t-page = <320>;
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cavium,t-rd-dly = <0>;
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cavium,pages = <0>;
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cavium,bus-width = <8>;
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};
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cavium,cs-config@5 {
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compatible = "cavium,octeon-3860-bootbus-config";
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cavium,cs-index = <5>;
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cavium,t-adr = <5>;
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cavium,t-ce = <300>;
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cavium,t-oe = <125>;
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cavium,t-we = <150>;
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cavium,t-rd-hld = <100>;
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cavium,t-wr-hld = <30>;
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cavium,t-pause = <0>;
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cavium,t-wait = <30>;
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cavium,t-page = <320>;
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cavium,t-rd-dly = <0>;
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cavium,pages = <0>;
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cavium,bus-width = <16>;
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};
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cavium,cs-config@6 {
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compatible = "cavium,octeon-3860-bootbus-config";
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cavium,cs-index = <6>;
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cavium,t-adr = <5>;
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cavium,t-ce = <300>;
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cavium,t-oe = <270>;
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cavium,t-we = <150>;
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cavium,t-rd-hld = <100>;
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cavium,t-wr-hld = <70>;
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cavium,t-pause = <0>;
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cavium,t-wait = <0>;
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cavium,t-page = <320>;
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cavium,t-rd-dly = <0>;
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cavium,pages = <0>;
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cavium,wait-mode;
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cavium,bus-width = <16>;
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};
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flash0: nor@0,0 {
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compatible = "cfi-flash";
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reg = <0 0 0x800000>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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led0: led-display@4,0 {
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compatible = "avago,hdsp-253x";
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reg = <4 0x20 0x20>, <4 0 0x20>;
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@ -515,17 +338,6 @@
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};
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};
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dma0: dma-engine@1180000000100 {
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compatible = "cavium,octeon-5750-bootbus-dma";
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reg = <0x11800 0x00000100 0x0 0x8>;
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interrupts = <0 63>;
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};
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dma1: dma-engine@1180000000108 {
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compatible = "cavium,octeon-5750-bootbus-dma";
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reg = <0x11800 0x00000108 0x0 0x8>;
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interrupts = <0 63>;
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};
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uctl: uctl@118006f000000 {
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compatible = "cavium,octeon-6335-uctl";
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reg = <0x11800 0x6f000000 0x0 0x100>;
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@ -552,21 +364,10 @@
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};
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usbn: usbn@1180068000000 {
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compatible = "cavium,octeon-5750-usbn";
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reg = <0x11800 0x68000000 0x0 0x1000>;
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ranges; /* Direct mapping */
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#address-cells = <2>;
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#size-cells = <2>;
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/* 12MHz, 24MHz and 48MHz allowed */
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refclk-frequency = <12000000>;
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/* Either "crystal" or "external" */
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refclk-type = "crystal";
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usbc@16f0010000000 {
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compatible = "cavium,octeon-5750-usbc";
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reg = <0x16f00 0x10000000 0x0 0x80000>;
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interrupts = <0 56>;
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};
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};
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};
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231
arch/mips/boot/dts/cavium-octeon/octeon_3xxx.dtsi
Normal file
231
arch/mips/boot/dts/cavium-octeon/octeon_3xxx.dtsi
Normal file
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@ -0,0 +1,231 @@
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/* OCTEON 3XXX DTS common parts. */
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/dts-v1/;
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/ {
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compatible = "cavium,octeon-3860";
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&ciu>;
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soc@0 {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges; /* Direct mapping */
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ciu: interrupt-controller@1070000000000 {
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compatible = "cavium,octeon-3860-ciu";
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interrupt-controller;
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/* Interrupts are specified by two parts:
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* 1) Controller register (0 or 1)
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* 2) Bit within the register (0..63)
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*/
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#interrupt-cells = <2>;
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reg = <0x10700 0x00000000 0x0 0x7000>;
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};
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gpio: gpio-controller@1070000000800 {
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#gpio-cells = <2>;
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compatible = "cavium,octeon-3860-gpio";
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reg = <0x10700 0x00000800 0x0 0x100>;
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gpio-controller;
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/* Interrupts are specified by two parts:
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* 1) GPIO pin number (0..15)
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* 2) Triggering (1 - edge rising
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* 2 - edge falling
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* 4 - level active high
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* 8 - level active low)
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*/
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interrupt-controller;
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#interrupt-cells = <2>;
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/* The GPIO pin connect to 16 consecutive CUI bits */
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interrupts = <0 16>, <0 17>, <0 18>, <0 19>,
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<0 20>, <0 21>, <0 22>, <0 23>,
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<0 24>, <0 25>, <0 26>, <0 27>,
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<0 28>, <0 29>, <0 30>, <0 31>;
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};
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smi0: mdio@1180000001800 {
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compatible = "cavium,octeon-3860-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x11800 0x00001800 0x0 0x40>;
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};
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pip: pip@11800a0000000 {
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compatible = "cavium,octeon-3860-pip";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x11800 0xa0000000 0x0 0x2000>;
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interface@0 {
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compatible = "cavium,octeon-3860-pip-interface";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>; /* interface */
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ethernet@0 {
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compatible = "cavium,octeon-3860-pip-port";
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reg = <0x0>; /* Port */
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local-mac-address = [ 00 00 00 00 00 00 ];
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};
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ethernet@1 {
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compatible = "cavium,octeon-3860-pip-port";
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reg = <0x1>; /* Port */
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local-mac-address = [ 00 00 00 00 00 00 ];
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};
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ethernet@2 {
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compatible = "cavium,octeon-3860-pip-port";
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reg = <0x2>; /* Port */
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local-mac-address = [ 00 00 00 00 00 00 ];
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};
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};
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interface@1 {
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compatible = "cavium,octeon-3860-pip-interface";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>; /* interface */
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};
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};
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twsi0: i2c@1180000001000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "cavium,octeon-3860-twsi";
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reg = <0x11800 0x00001000 0x0 0x200>;
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interrupts = <0 45>;
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
uart0: serial@1180000000800 {
|
||||
compatible = "cavium,octeon-3860-uart","ns16550";
|
||||
reg = <0x11800 0x00000800 0x0 0x400>;
|
||||
clock-frequency = <0>;
|
||||
current-speed = <115200>;
|
||||
reg-shift = <3>;
|
||||
interrupts = <0 34>;
|
||||
};
|
||||
|
||||
bootbus: bootbus@1180000000000 {
|
||||
compatible = "cavium,octeon-3860-bootbus";
|
||||
reg = <0x11800 0x00000000 0x0 0x200>;
|
||||
/* The chip select number and offset */
|
||||
#address-cells = <2>;
|
||||
/* The size of the chip select region */
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x0 0x1f400000 0xc00000>,
|
||||
<1 0 0x10000 0x30000000 0>,
|
||||
<2 0 0x10000 0x40000000 0>,
|
||||
<3 0 0x10000 0x50000000 0>,
|
||||
<4 0 0x0 0x1d020000 0x10000>,
|
||||
<5 0 0x0 0x1d040000 0x10000>,
|
||||
<6 0 0x0 0x1d050000 0x10000>,
|
||||
<7 0 0x10000 0x90000000 0>;
|
||||
|
||||
cavium,cs-config@0 {
|
||||
compatible = "cavium,octeon-3860-bootbus-config";
|
||||
cavium,cs-index = <0>;
|
||||
cavium,t-adr = <20>;
|
||||
cavium,t-ce = <60>;
|
||||
cavium,t-oe = <60>;
|
||||
cavium,t-we = <45>;
|
||||
cavium,t-rd-hld = <35>;
|
||||
cavium,t-wr-hld = <45>;
|
||||
cavium,t-pause = <0>;
|
||||
cavium,t-wait = <0>;
|
||||
cavium,t-page = <35>;
|
||||
cavium,t-rd-dly = <0>;
|
||||
|
||||
cavium,pages = <0>;
|
||||
cavium,bus-width = <8>;
|
||||
};
|
||||
cavium,cs-config@4 {
|
||||
compatible = "cavium,octeon-3860-bootbus-config";
|
||||
cavium,cs-index = <4>;
|
||||
cavium,t-adr = <320>;
|
||||
cavium,t-ce = <320>;
|
||||
cavium,t-oe = <320>;
|
||||
cavium,t-we = <320>;
|
||||
cavium,t-rd-hld = <320>;
|
||||
cavium,t-wr-hld = <320>;
|
||||
cavium,t-pause = <320>;
|
||||
cavium,t-wait = <320>;
|
||||
cavium,t-page = <320>;
|
||||
cavium,t-rd-dly = <0>;
|
||||
|
||||
cavium,pages = <0>;
|
||||
cavium,bus-width = <8>;
|
||||
};
|
||||
cavium,cs-config@5 {
|
||||
compatible = "cavium,octeon-3860-bootbus-config";
|
||||
cavium,cs-index = <5>;
|
||||
cavium,t-adr = <5>;
|
||||
cavium,t-ce = <300>;
|
||||
cavium,t-oe = <125>;
|
||||
cavium,t-we = <150>;
|
||||
cavium,t-rd-hld = <100>;
|
||||
cavium,t-wr-hld = <30>;
|
||||
cavium,t-pause = <0>;
|
||||
cavium,t-wait = <30>;
|
||||
cavium,t-page = <320>;
|
||||
cavium,t-rd-dly = <0>;
|
||||
|
||||
cavium,pages = <0>;
|
||||
cavium,bus-width = <16>;
|
||||
};
|
||||
cavium,cs-config@6 {
|
||||
compatible = "cavium,octeon-3860-bootbus-config";
|
||||
cavium,cs-index = <6>;
|
||||
cavium,t-adr = <5>;
|
||||
cavium,t-ce = <300>;
|
||||
cavium,t-oe = <270>;
|
||||
cavium,t-we = <150>;
|
||||
cavium,t-rd-hld = <100>;
|
||||
cavium,t-wr-hld = <70>;
|
||||
cavium,t-pause = <0>;
|
||||
cavium,t-wait = <0>;
|
||||
cavium,t-page = <320>;
|
||||
cavium,t-rd-dly = <0>;
|
||||
|
||||
cavium,pages = <0>;
|
||||
cavium,wait-mode;
|
||||
cavium,bus-width = <16>;
|
||||
};
|
||||
|
||||
flash0: nor@0,0 {
|
||||
compatible = "cfi-flash";
|
||||
reg = <0 0 0x800000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
dma0: dma-engine@1180000000100 {
|
||||
compatible = "cavium,octeon-5750-bootbus-dma";
|
||||
reg = <0x11800 0x00000100 0x0 0x8>;
|
||||
interrupts = <0 63>;
|
||||
};
|
||||
|
||||
dma1: dma-engine@1180000000108 {
|
||||
compatible = "cavium,octeon-5750-bootbus-dma";
|
||||
reg = <0x11800 0x00000108 0x0 0x8>;
|
||||
interrupts = <0 63>;
|
||||
};
|
||||
|
||||
usbn: usbn@1180068000000 {
|
||||
compatible = "cavium,octeon-5750-usbn";
|
||||
reg = <0x11800 0x68000000 0x0 0x1000>;
|
||||
ranges; /* Direct mapping */
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
usbc@16f0010000000 {
|
||||
compatible = "cavium,octeon-5750-usbc";
|
||||
reg = <0x16f00 0x10000000 0x0 0x80000>;
|
||||
interrupts = <0 56>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
Loading…
Reference in a new issue