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powerpc/32: Enable HW_BREAKPOINT on BOOK3S 

BOOK3S also has DABR register and capability to handle data
breakpoints, so this patch enable it on all BOOK3S, not only 64 bits.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Scott Wood <oss@buserror.net>
hifive-unleashed-5.1
Christophe Leroy 2016-11-29 09:52:13 +01:00 committed by Scott Wood
parent fdc8c4adb6
commit fa769d3f58
2 changed files with 2 additions and 2 deletions
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2
arch/powerpc/Kconfig
View File

@ -113,7 +113,7 @@ config PPC
select HAVE_PERF_REGS
select HAVE_PERF_USER_STACK_DUMP
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S_64
select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S
select ARCH_WANT_IPC_PARSE_VERSION
select SPARSE_IRQ
select IRQ_DOMAIN

2
arch/powerpc/include/asm/processor.h
View File

@ -225,6 +225,7 @@ struct thread_struct {
#ifdef CONFIG_PPC64
unsigned long start_tb; /* Start purr when proc switched in */
unsigned long accum_tb; /* Total accumulated purr for process */
#endif
#ifdef CONFIG_HAVE_HW_BREAKPOINT
struct perf_event *ptrace_bps[HBP_NUM];
/*
@ -233,7 +234,6 @@ struct thread_struct {
*/
struct perf_event *last_hit_ubp;
#endif /* CONFIG_HAVE_HW_BREAKPOINT */
#endif
struct arch_hw_breakpoint hw_brk; /* info on the hardware breakpoint */
unsigned long trap_nr; /* last trap # on this thread */
u8 load_fp;