ARM: mach-shmobile: Add SDHI support for AG5EVM and sh73a0
Add SDHI0 and SDHI1 support to the AG5EVM board including platform data, pinmux configuration and clock bindings. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>hifive-unleashed-5.1
Magnus Damm
Paul Mundt
parent
2007aea18c
commit
fb66c52385
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@ -34,6 +34,8 @@
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#include <linux/input/sh_keysc.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/sh_mmcif.h>
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#include <linux/mmc/sh_mobile_sdhi.h>
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#include <linux/mfd/tmio.h>
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#include <linux/sh_clk.h>
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#include <video/sh_mobile_lcdc.h>
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#include <video/sh_mipi_dsi.h>
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@ -327,6 +329,85 @@ static struct platform_device mipidsi0_device = {
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},
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};
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static struct sh_mobile_sdhi_info sdhi0_info = {
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.tmio_caps = MMC_CAP_SD_HIGHSPEED,
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.tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
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};
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static struct resource sdhi0_resources[] = {
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[0] = {
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.name = "SDHI0",
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.start = 0xee100000,
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.end = 0xee1000ff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = gic_spi(83),
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = gic_spi(84),
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.flags = IORESOURCE_IRQ,
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},
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[3] = {
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.start = gic_spi(85),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device sdhi0_device = {
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.name = "sh_mobile_sdhi",
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.id = 0,
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.num_resources = ARRAY_SIZE(sdhi0_resources),
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.resource = sdhi0_resources,
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.dev = {
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.platform_data = &sdhi0_info,
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},
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};
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void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state)
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{
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gpio_set_value(GPIO_PORT114, state);
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}
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static struct sh_mobile_sdhi_info sh_sdhi1_platdata = {
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.tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
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.tmio_caps = MMC_CAP_NONREMOVABLE,
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.tmio_ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
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.set_pwr = ag5evm_sdhi1_set_pwr,
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};
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static struct resource sdhi1_resources[] = {
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[0] = {
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.name = "SDHI1",
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.start = 0xee120000,
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.end = 0xee1200ff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = gic_spi(87),
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = gic_spi(88),
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.flags = IORESOURCE_IRQ,
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},
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[3] = {
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.start = gic_spi(89),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device sdhi1_device = {
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.name = "sh_mobile_sdhi",
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.id = 1,
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.dev = {
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.platform_data = &sh_sdhi1_platdata,
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},
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.num_resources = ARRAY_SIZE(sdhi1_resources),
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.resource = sdhi1_resources,
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};
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static struct platform_device *ag5evm_devices[] __initdata = {
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ð_device,
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&keysc_device,
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@ -335,6 +416,8 @@ static struct platform_device *ag5evm_devices[] __initdata = {
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&irda_device,
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&lcdc0_device,
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&mipidsi0_device,
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&sdhi0_device,
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&sdhi1_device,
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};
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static struct map_desc ag5evm_io_desc[] __initdata = {
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@ -456,6 +539,26 @@ static void __init ag5evm_init(void)
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/* MIPI-DSI clock setup */
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__raw_writel(0x2a809010, DSI0PHYCR);
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/* enable SDHI0 on CN15 [SD I/F] */
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gpio_request(GPIO_FN_SDHICD0, NULL);
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gpio_request(GPIO_FN_SDHIWP0, NULL);
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gpio_request(GPIO_FN_SDHICMD0, NULL);
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gpio_request(GPIO_FN_SDHICLK0, NULL);
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gpio_request(GPIO_FN_SDHID0_3, NULL);
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gpio_request(GPIO_FN_SDHID0_2, NULL);
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gpio_request(GPIO_FN_SDHID0_1, NULL);
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gpio_request(GPIO_FN_SDHID0_0, NULL);
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/* enable SDHI1 on CN4 [WLAN I/F] */
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gpio_request(GPIO_FN_SDHICLK1, NULL);
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gpio_request(GPIO_FN_SDHICMD1_PU, NULL);
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gpio_request(GPIO_FN_SDHID1_3_PU, NULL);
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gpio_request(GPIO_FN_SDHID1_2_PU, NULL);
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gpio_request(GPIO_FN_SDHID1_1_PU, NULL);
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gpio_request(GPIO_FN_SDHID1_0_PU, NULL);
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gpio_request(GPIO_PORT114, "sdhi1_power");
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gpio_direction_output(GPIO_PORT114, 0);
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#ifdef CONFIG_CACHE_L2X0
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/* Shared attribute override enable, 64K*8way */
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l2x0_init(__io(0xf0100000), 0x00460000, 0xc2000fff);
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@ -266,7 +266,7 @@ enum { MSTP001,
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MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
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MSTP219,
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MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
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MSTP331, MSTP329, MSTP325, MSTP323, MSTP312,
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MSTP331, MSTP329, MSTP325, MSTP323, MSTP314, MSTP313, MSTP312, MSTP311,
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MSTP411, MSTP410, MSTP403,
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MSTP_NR };
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@ -295,7 +295,10 @@ static struct clk mstp_clks[MSTP_NR] = {
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[MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
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[MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */
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[MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
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[MSTP314] = MSTP(&div6_clks[DIV6_SDHI0], SMSTPCR3, 14, 0), /* SDHI0 */
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[MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
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[MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
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[MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */
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[MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */
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[MSTP410] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */
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[MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
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@ -313,6 +316,9 @@ static struct clk_lookup lookups[] = {
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CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]),
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CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]),
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CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]),
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CLKDEV_CON_ID("sdhi0_clk", &div6_clks[DIV6_SDHI0]),
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CLKDEV_CON_ID("sdhi1_clk", &div6_clks[DIV6_SDHI1]),
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CLKDEV_CON_ID("sdhi2_clk", &div6_clks[DIV6_SDHI2]),
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CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
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CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
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CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
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@ -341,7 +347,10 @@ static struct clk_lookup lookups[] = {
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CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
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CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
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CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
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CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
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CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
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CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
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CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */
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CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
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CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
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CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
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@ -351,6 +360,11 @@ void __init sh73a0_clock_init(void)
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{
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int k, ret = 0;
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/* Set SDHI clocks to a known state */
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__raw_writel(0x108, SD0CKCR);
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__raw_writel(0x108, SD1CKCR);
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__raw_writel(0x108, SD2CKCR);
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/* detect main clock parent */
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switch ((__raw_readl(CKSCR) >> 24) & 0x03) {
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case 0:
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