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ARM: kprobes: Eliminate test code's use of BX instruction on ARMv4 CPUs 

Non-T variants of ARMv4 CPUs don't support the BX instruction so
eliminate its use.

Signed-off-by: Jon Medhurst <tixy@linaro.org>
hifive-unleashed-5.1
Jon Medhurst 2015-01-19 15:15:36 +00:00
parent bfc9657d75
commit fb892bd0fd
2 changed files with 10 additions and 3 deletions
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3
arch/arm/probes/kprobes/test-arm.c
View File

@ -215,9 +215,12 @@ void kprobe_arm_test_cases(void)
TEST_UNSUPPORTED("msr cpsr_f, lr")
TEST_UNSUPPORTED("msr spsr, r0")
#if __LINUX_ARM_ARCH__ >= 5 || \
(__LINUX_ARM_ARCH__ == 4 && !defined(CONFIG_CPU_32v4))
TEST_BF_R("bx r",0,2f,"")
TEST_BB_R("bx r",7,2f,"")
TEST_BF_R("bxeq r",14,2f,"")
#endif
#if __LINUX_ARM_ARCH__ >= 5
TEST_R("clz r0, r",0, 0x0,"")

10
arch/arm/probes/kprobes/test-core.c
View File

@ -236,6 +236,8 @@ static int tests_failed;
#ifndef CONFIG_THUMB2_KERNEL
#define RET(reg) "mov pc, "#reg
long arm_func(long r0, long r1);
static void __used __naked __arm_kprobes_test_func(void)
@ -245,7 +247,7 @@ static void __used __naked __arm_kprobes_test_func(void)
".type arm_func, %%function \n\t"
"arm_func: \n\t"
"adds r0, r0, r1 \n\t"
"bx lr \n\t"
"mov pc, lr \n\t"
".code "NORMAL_ISA /* Back to Thumb if necessary */
: : : "r0", "r1", "cc"
);
@ -253,6 +255,8 @@ static void __used __naked __arm_kprobes_test_func(void)
#else /* CONFIG_THUMB2_KERNEL */
#define RET(reg) "bx "#reg
long thumb16_func(long r0, long r1);
long thumb32even_func(long r0, long r1);
long thumb32odd_func(long r0, long r1);
@ -494,7 +498,7 @@ static void __naked benchmark_nop(void)
{
__asm__ __volatile__ (
"nop \n\t"
"bx lr"
RET(lr)" \n\t"
);
}
@ -977,7 +981,7 @@ void __naked __kprobes_test_case_start(void)
"bic r0, lr, #1 @ r0 = inline data \n\t"
"mov r1, sp \n\t"
"bl kprobes_test_case_start \n\t"
"bx r0 \n\t"
RET(r0)" \n\t"
);
}