PCI: xgene: Clean up whitespace

Use tabs (not spaces) for indentation.  No functional change intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Bjorn Helgaas 2017-09-05 13:09:05 -05:00
parent 582ffae852
commit fca4848bbc

View file

@ -160,7 +160,7 @@ static bool xgene_pcie_hide_rc_bars(struct pci_bus *bus, int offset)
} }
static void __iomem *xgene_pcie_map_bus(struct pci_bus *bus, unsigned int devfn, static void __iomem *xgene_pcie_map_bus(struct pci_bus *bus, unsigned int devfn,
int offset) int offset)
{ {
if ((pci_is_root_bus(bus) && devfn != 0) || if ((pci_is_root_bus(bus) && devfn != 0) ||
xgene_pcie_hide_rc_bars(bus, offset)) xgene_pcie_hide_rc_bars(bus, offset))
@ -265,12 +265,12 @@ static int xgene_v1_pcie_ecam_init(struct pci_config_window *cfg)
} }
struct pci_ecam_ops xgene_v1_pcie_ecam_ops = { struct pci_ecam_ops xgene_v1_pcie_ecam_ops = {
.bus_shift = 16, .bus_shift = 16,
.init = xgene_v1_pcie_ecam_init, .init = xgene_v1_pcie_ecam_init,
.pci_ops = { .pci_ops = {
.map_bus = xgene_pcie_map_bus, .map_bus = xgene_pcie_map_bus,
.read = xgene_pcie_config_read32, .read = xgene_pcie_config_read32,
.write = pci_generic_config_write, .write = pci_generic_config_write,
} }
}; };
@ -280,12 +280,12 @@ static int xgene_v2_pcie_ecam_init(struct pci_config_window *cfg)
} }
struct pci_ecam_ops xgene_v2_pcie_ecam_ops = { struct pci_ecam_ops xgene_v2_pcie_ecam_ops = {
.bus_shift = 16, .bus_shift = 16,
.init = xgene_v2_pcie_ecam_init, .init = xgene_v2_pcie_ecam_init,
.pci_ops = { .pci_ops = {
.map_bus = xgene_pcie_map_bus, .map_bus = xgene_pcie_map_bus,
.read = xgene_pcie_config_read32, .read = xgene_pcie_config_read32,
.write = pci_generic_config_write, .write = pci_generic_config_write,
} }
}; };
#endif #endif
@ -318,7 +318,7 @@ static u64 xgene_pcie_set_ib_mask(struct xgene_pcie_port *port, u32 addr,
} }
static void xgene_pcie_linkup(struct xgene_pcie_port *port, static void xgene_pcie_linkup(struct xgene_pcie_port *port,
u32 *lanes, u32 *speed) u32 *lanes, u32 *speed)
{ {
u32 val32; u32 val32;
@ -593,8 +593,7 @@ static void xgene_pcie_clear_config(struct xgene_pcie_port *port)
xgene_pcie_writel(port, i, 0); xgene_pcie_writel(port, i, 0);
} }
static int xgene_pcie_setup(struct xgene_pcie_port *port, static int xgene_pcie_setup(struct xgene_pcie_port *port, struct list_head *res,
struct list_head *res,
resource_size_t io_base) resource_size_t io_base)
{ {
struct device *dev = port->dev; struct device *dev = port->dev;
@ -706,9 +705,9 @@ static const struct of_device_id xgene_pcie_match_table[] = {
static struct platform_driver xgene_pcie_driver = { static struct platform_driver xgene_pcie_driver = {
.driver = { .driver = {
.name = "xgene-pcie", .name = "xgene-pcie",
.of_match_table = of_match_ptr(xgene_pcie_match_table), .of_match_table = of_match_ptr(xgene_pcie_match_table),
.suppress_bind_attrs = true, .suppress_bind_attrs = true,
}, },
.probe = xgene_pcie_probe_bridge, .probe = xgene_pcie_probe_bridge,
}; };