[PATCH] ppc64 iSeries: more header file white space cleanups
This patch just contains white space and comment cleanups in the iSeries headers files. There are no semantic changes. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
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fcee389526
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@ -82,8 +82,8 @@ struct IoHriMainStoreVpdFruData {
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};
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};
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struct IoHriMainStoreAdrRangeBlock {
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struct IoHriMainStoreAdrRangeBlock {
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void * blockStart __attribute((packed));
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void *blockStart __attribute((packed));
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void * blockEnd __attribute((packed));
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void *blockEnd __attribute((packed));
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u32 blockProcChipId __attribute((packed));
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u32 blockProcChipId __attribute((packed));
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};
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};
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@ -102,7 +102,7 @@ struct IoHriMainStoreArea4 {
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u32 procNodeId __attribute((packed));
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u32 procNodeId __attribute((packed));
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u32 numAdrRangeBlocks __attribute((packed));
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u32 numAdrRangeBlocks __attribute((packed));
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struct IoHriMainStoreAdrRangeBlock xAdrRangeBlock[MaxAreaAdrRangeBlocks] __attribute((packed));
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struct IoHriMainStoreAdrRangeBlock xAdrRangeBlock[MaxAreaAdrRangeBlocks] __attribute((packed));
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struct IoHriMainStoreChipInfo1 chipInfo0 __attribute((packed));
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struct IoHriMainStoreChipInfo1 chipInfo0 __attribute((packed));
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struct IoHriMainStoreChipInfo1 chipInfo1 __attribute((packed));
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struct IoHriMainStoreChipInfo1 chipInfo1 __attribute((packed));
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@ -113,17 +113,17 @@ struct IoHriMainStoreArea4 {
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struct IoHriMainStoreChipInfo1 chipInfo6 __attribute((packed));
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struct IoHriMainStoreChipInfo1 chipInfo6 __attribute((packed));
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struct IoHriMainStoreChipInfo1 chipInfo7 __attribute((packed));
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struct IoHriMainStoreChipInfo1 chipInfo7 __attribute((packed));
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void * msRamAreaArray __attribute((packed));
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void *msRamAreaArray __attribute((packed));
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u32 msRamAreaArrayNumEntries __attribute((packed));
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u32 msRamAreaArrayNumEntries __attribute((packed));
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u32 msRamAreaArrayEntrySize __attribute((packed));
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u32 msRamAreaArrayEntrySize __attribute((packed));
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u32 numaDimmExists __attribute((packed));
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u32 numaDimmExists __attribute((packed));
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u32 numaDimmFunctional __attribute((packed));
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u32 numaDimmFunctional __attribute((packed));
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void * numaDimmArray __attribute((packed));
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void *numaDimmArray __attribute((packed));
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u32 numaDimmArrayNumEntries __attribute((packed));
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u32 numaDimmArrayNumEntries __attribute((packed));
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u32 numaDimmArrayEntrySize __attribute((packed));
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u32 numaDimmArrayEntrySize __attribute((packed));
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struct IoHriMainStoreVpdIdData idData __attribute((packed));
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struct IoHriMainStoreVpdIdData idData __attribute((packed));
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u64 powerData __attribute((packed));
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u64 powerData __attribute((packed));
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u64 cardAssemblyPartNum __attribute((packed));
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u64 cardAssemblyPartNum __attribute((packed));
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@ -151,7 +151,7 @@ struct IoHriMainStoreSegment5 {
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u32 totalMainStore;
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u32 totalMainStore;
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u64 maxConfiguredMsAdr;
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u64 maxConfiguredMsAdr;
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struct IoHriMainStoreArea4* msAreaArray;
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struct IoHriMainStoreArea4 *msAreaArray;
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u32 msAreaArrayNumEntries;
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u32 msAreaArrayNumEntries;
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u32 msAreaArrayEntrySize;
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u32 msAreaArrayEntrySize;
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@ -161,7 +161,4 @@ struct IoHriMainStoreSegment5 {
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u64 reserved3;
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u64 reserved3;
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};
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};
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#endif /* _IOHRIMAINSTORE_H */
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#endif // _IOHRIMAINSTORE_H
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@ -19,16 +19,12 @@
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#ifndef _IOHRIPROCESSORVPD_H
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#ifndef _IOHRIPROCESSORVPD_H
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#define _IOHRIPROCESSORVPD_H
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#define _IOHRIPROCESSORVPD_H
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//===================================================================
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//
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// This struct maps Processor Vpd that is DMAd to SLIC by CSP
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//
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#include <asm/types.h>
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#include <asm/types.h>
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struct IoHriProcessorVpd
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/*
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{
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* This struct maps Processor Vpd that is DMAd to SLIC by CSP
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*/
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struct IoHriProcessorVpd {
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u8 xFormat; // VPD format indicator x00-x00
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u8 xFormat; // VPD format indicator x00-x00
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u8 xProcStatus:8; // Processor State x01-x01
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u8 xProcStatus:8; // Processor State x01-x01
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u8 xSecondaryThreadCount; // Secondary thread cnt x02-x02
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u8 xSecondaryThreadCount; // Secondary thread cnt x02-x02
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@ -44,8 +40,8 @@ struct IoHriProcessorVpd
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u32 xTypeNum; // Card Type/CCIN number x10-x13
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u32 xTypeNum; // Card Type/CCIN number x10-x13
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u32 xModelNum; // Model/Feature number x14-x17
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u32 xModelNum; // Model/Feature number x14-x17
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u64 xSerialNum; // Serial number x18-x1F
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u64 xSerialNum; // Serial number x18-x1F
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char xPartNum[12]; // Book Part or FPU number x20-x2B
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char xPartNum[12]; // Book Part or FPU number x20-x2B
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char xMfgID[4]; // Manufacturing ID x2C-x2F
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char xMfgID[4]; // Manufacturing ID x2C-x2F
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u32 xProcFreq; // Processor Frequency x30-x33
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u32 xProcFreq; // Processor Frequency x30-x33
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u32 xTimeBaseFreq; // Time Base Frequency x34-x37
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u32 xTimeBaseFreq; // Time Base Frequency x34-x37
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@ -82,7 +78,7 @@ struct IoHriProcessorVpd
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u8 xRsvd8[24]; // Reserved xA0-xB7
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u8 xRsvd8[24]; // Reserved xA0-xB7
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char xProcSrc[72]; // CSP format SRC xB8-xFF
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char xProcSrc[72]; // CSP format SRC xB8-xFF
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};
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};
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#endif /* _IOHRIPROCESSORVPD_H */
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#endif /* _IOHRIPROCESSORVPD_H */
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@ -20,39 +20,31 @@
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#define _ITEXTVPDPANEL_H
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#define _ITEXTVPDPANEL_H
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/*
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/*
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*
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* This struct maps the panel information
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* This struct maps the panel information
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*
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*
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* Warning:
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* Warning:
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* This data must match the architecture for the panel information
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* This data must match the architecture for the panel information
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*
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*/
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*/
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/*-------------------------------------------------------------------
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* Standard Includes
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*-------------------------------------------------------------------
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*/
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#include <asm/types.h>
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#include <asm/types.h>
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struct ItExtVpdPanel
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struct ItExtVpdPanel {
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{
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/* Definition of the Extended Vpd On Panel Data Area */
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// Definition of the Extended Vpd On Panel Data Area
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char systemSerial[8];
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char systemSerial[8];
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char mfgID[4];
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char mfgID[4];
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char reserved1[24];
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char reserved1[24];
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char machineType[4];
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char machineType[4];
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char systemID[6];
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char systemID[6];
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char somUniqueCnt[4];
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char somUniqueCnt[4];
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char serialNumberCount;
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char serialNumberCount;
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char reserved2[7];
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char reserved2[7];
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u16 bbu3;
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u16 bbu3;
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u16 bbu2;
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u16 bbu2;
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u16 bbu1;
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u16 bbu1;
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char xLocationLabel[8];
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char xLocationLabel[8];
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u8 xRsvd1[6];
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u8 xRsvd1[6];
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u16 xFrameId;
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u16 xFrameId;
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u8 xRsvd2[48];
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u8 xRsvd2[48];
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};
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};
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#endif /* _ITEXTVPDPANEL_H */
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#endif /* _ITEXTVPDPANEL_H */
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@ -19,58 +19,51 @@
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#ifndef _ITIPLPARMSREAL_H
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#ifndef _ITIPLPARMSREAL_H
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#define _ITIPLPARMSREAL_H
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#define _ITIPLPARMSREAL_H
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//==============================================================================
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/*
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//
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* This struct maps the IPL Parameters DMA'd from the SP.
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// This struct maps the IPL Parameters DMA'd from the SP.
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*
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//
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* Warning:
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// Warning:
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* This data must map in exactly 64 bytes and match the architecture for
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// This data must map in exactly 64 bytes and match the architecture for
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* the IPL parms
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// the IPL parms
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*/
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//
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//=============================================================================
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//-------------------------------------------------------------------
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// Standard Includes
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//-------------------------------------------------------------------
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#include <asm/types.h>
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#include <asm/types.h>
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struct ItIplParmsReal
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struct ItIplParmsReal {
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{
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u8 xFormat; // Defines format of IplParms x00-x00
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u8 xFormat; // Defines format of IplParms x00-x00
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u8 xRsvd01:6; // Reserved x01-x01
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u8 xRsvd01:6; // Reserved x01-x01
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u8 xAlternateSearch:1; // Alternate search indicator ...
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u8 xAlternateSearch:1; // Alternate search indicator ...
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u8 xUaSupplied:1; // UA Supplied on programmed IPL...
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u8 xUaSupplied:1; // UA Supplied on programmed IPL ...
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u8 xLsUaFormat; // Format byte for UA x02-x02
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u8 xLsUaFormat; // Format byte for UA x02-x02
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u8 xRsvd02; // Reserved x03-x03
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u8 xRsvd02; // Reserved x03-x03
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u32 xLsUa; // LS UA x04-x07
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u32 xLsUa; // LS UA x04-x07
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u32 xUnusedLsLid; // First OS LID to load x08-x0B
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u32 xUnusedLsLid; // First OS LID to load x08-x0B
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u16 xLsBusNumber; // LS Bus Number x0C-x0D
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u16 xLsBusNumber; // LS Bus Number x0C-x0D
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u8 xLsCardAdr; // LS Card Address x0E-x0E
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u8 xLsCardAdr; // LS Card Address x0E-x0E
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u8 xLsBoardAdr; // LS Board Address x0F-x0F
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u8 xLsBoardAdr; // LS Board Address x0F-x0F
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u32 xRsvd03; // Reserved x10-x13
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u32 xRsvd03; // Reserved x10-x13
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u8 xSpcnPresent:1; // SPCN present x14-x14
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u8 xSpcnPresent:1; // SPCN present x14-x14
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u8 xCpmPresent:1; // CPM present ...
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u8 xCpmPresent:1; // CPM present ...
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u8 xRsvd04:6; // Reserved ...
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u8 xRsvd04:6; // Reserved ...
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u8 xRsvd05:4; // Reserved x15-x15
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u8 xRsvd05:4; // Reserved x15-x15
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u8 xKeyLock:4; // Keylock setting ...
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u8 xKeyLock:4; // Keylock setting ...
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u8 xRsvd06:6; // Reserved x16-x16
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u8 xRsvd06:6; // Reserved x16-x16
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u8 xIplMode:2; // Ipl mode (A|B|C|D) ...
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u8 xIplMode:2; // Ipl mode (A|B|C|D) ...
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u8 xHwIplType; // Fast v slow v slow EC HW IPL x17-x17
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u8 xHwIplType; // Fast v slow v slow EC HW IPL x17-x17
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u16 xCpmEnabledIpl:1; // CPM in effect when IPL initiatedx18-x19
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u16 xCpmEnabledIpl:1; // CPM in effect when IPL initiated x18-x19
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u16 xPowerOnResetIpl:1; // Indicate POR condition ...
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u16 xPowerOnResetIpl:1; // Indicate POR condition ...
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u16 xMainStorePreserved:1; // Main Storage is preserved ...
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u16 xMainStorePreserved:1; // Main Storage is preserved ...
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u16 xRsvd07:13; // Reserved ...
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u16 xRsvd07:13; // Reserved ...
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u16 xIplSource:16; // Ipl source x1A-x1B
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u16 xIplSource:16; // Ipl source x1A-x1B
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u8 xIplReason:8; // Reason for this IPL x1C-x1C
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u8 xIplReason:8; // Reason for this IPL x1C-x1C
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u8 xRsvd08; // Reserved x1D-x1D
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u8 xRsvd08; // Reserved x1D-x1D
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u16 xRsvd09; // Reserved x1E-x1F
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u16 xRsvd09; // Reserved x1E-x1F
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u16 xSysBoxType; // System Box Type x20-x21
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u16 xSysBoxType; // System Box Type x20-x21
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u16 xSysProcType; // System Processor Type x22-x23
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u16 xSysProcType; // System Processor Type x22-x23
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u32 xRsvd10; // Reserved x24-x27
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u32 xRsvd10; // Reserved x24-x27
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u64 xRsvd11; // Reserved x28-x2F
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u64 xRsvd11; // Reserved x28-x2F
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u64 xRsvd12; // Reserved x30-x37
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u64 xRsvd12; // Reserved x30-x37
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u64 xRsvd13; // Reserved x38-x3F
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u64 xRsvd13; // Reserved x38-x3F
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};
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};
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#endif /* _ITIPLPARMSREAL_H */
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#endif /* _ITIPLPARMSREAL_H */
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#ifndef _ITLPNACA_H
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#ifndef _ITLPNACA_H
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#define _ITLPNACA_H
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#define _ITLPNACA_H
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//=============================================================================
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/*
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//
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* This control block contains the data that is shared between the
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// This control block contains the data that is shared between the
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* hypervisor (PLIC) and the OS.
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// hypervisor (PLIC) and the OS.
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*/
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//
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//=============================================================================
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struct ItLpNaca
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struct ItLpNaca {
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{
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//=============================================================================
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// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data
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// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data
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//=============================================================================
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u32 xDesc; // Eye catcher x00-x03
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u32 xDesc; // Eye catcher x00-x03
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u16 xSize; // Size of this class x04-x05
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u16 xSize; // Size of this class x04-x05
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u16 xIntHdlrOffset; // Offset to IntHdlr array x06-x07
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u16 xIntHdlrOffset; // Offset to IntHdlr array x06-x07
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u64 xLoadAreaAddr; // ER address of load area x28-x2F
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u64 xLoadAreaAddr; // ER address of load area x28-x2F
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u32 xLoadAreaChunks; // Chunks for the load area x30-x33
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u32 xLoadAreaChunks; // Chunks for the load area x30-x33
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u32 xPaseSysCallCRMask; // Mask used to test CR before x34-x37
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u32 xPaseSysCallCRMask; // Mask used to test CR before x34-x37
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// doing an ASR switch on PASE
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// doing an ASR switch on PASE
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// system call.
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// system call.
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u64 xSlicSegmentTablePtr; // Pointer to Slic seg table. x38-x3f
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u64 xSlicSegmentTablePtr; // Pointer to Slic seg table. x38-x3f
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u8 xRsvd1_4[64]; // x40-x7F
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u8 xRsvd1_4[64]; // x40-x7F
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//=============================================================================
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// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data
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// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data
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//=============================================================================
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u8 xRsvd2_0[128]; // Reserved x00-x7F
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u8 xRsvd2_0[128]; // Reserved x00-x7F
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//=============================================================================
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// CACHE_LINE_3-6 0x0100 - 0x02FF Contains LP Queue indicators
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// CACHE_LINE_3-6 0x0100 - 0x02FF Contains LP Queue indicators
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// NB: Padding required to keep xInterrruptHdlr at x300 which is required
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// NB: Padding required to keep xInterrruptHdlr at x300 which is required
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// for v4r4 PLIC.
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// for v4r4 PLIC.
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//=============================================================================
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u8 xOldLpQueue[128]; // LP Queue needed for v4r4 100-17F
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u8 xOldLpQueue[128]; // LP Queue needed for v4r4 100-17F
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u8 xRsvd3_0[384]; // Reserved 180-2FF
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u8 xRsvd3_0[384]; // Reserved 180-2FF
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//=============================================================================
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// CACHE_LINE_7-8 0x0300 - 0x03FF Contains the address of the OS interrupt
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// CACHE_LINE_7-8 0x0300 - 0x03FF Contains the address of the OS interrupt
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// handlers
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// handlers
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//=============================================================================
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u64 xInterruptHdlr[32]; // Interrupt handlers 300-x3FF
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u64 xInterruptHdlr[32]; // Interrupt handlers 300-x3FF
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};
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};
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//=============================================================================
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#endif /* _ITLPNACA_H */
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#endif /* _ITLPNACA_H */
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#ifndef _ITLPQUEUE_H
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#ifndef _ITLPQUEUE_H
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#define _ITLPQUEUE_H
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#define _ITLPQUEUE_H
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//=============================================================================
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/*
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//
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* This control block defines the simple LP queue structure that is
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// This control block defines the simple LP queue structure that is
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* shared between the hypervisor (PLIC) and the OS in order to send
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// shared between the hypervisor (PLIC) and the OS in order to send
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* events to an LP.
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// events to an LP.
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*/
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//
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#include <asm/types.h>
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#include <asm/types.h>
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#include <asm/ptrace.h>
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#include <asm/ptrace.h>
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struct HvLpEvent;
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struct HvLpEvent;
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#define ITMaxLpQueues 8
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#define ITMaxLpQueues 8
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#define NotUsed 0 // Queue will not be used by PLIC
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#define NotUsed 0 // Queue will not be used by PLIC
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#define DedicatedIo 1 // Queue dedicated to IO processor specified
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#define DedicatedIo 1 // Queue dedicated to IO processor specified
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#define DedicatedLp 2 // Queue dedicated to LP specified
|
#define DedicatedLp 2 // Queue dedicated to LP specified
|
||||||
#define Shared 3 // Queue shared for both IO and LP
|
#define Shared 3 // Queue shared for both IO and LP
|
||||||
|
|
||||||
#define LpEventStackSize 4096
|
#define LpEventStackSize 4096
|
||||||
#define LpEventMaxSize 256
|
#define LpEventMaxSize 256
|
||||||
#define LpEventAlign 64
|
#define LpEventAlign 64
|
||||||
|
|
||||||
struct ItLpQueue
|
struct ItLpQueue {
|
||||||
{
|
/*
|
||||||
//
|
* The xSlicCurEventPtr is the pointer to the next event stack entry
|
||||||
// The xSlicCurEventPtr is the pointer to the next event stack entry that will
|
* that will become valid. The OS must peek at this entry to determine
|
||||||
// become valid. The OS must peek at this entry to determine if it is valid.
|
* if it is valid. PLIC will set the valid indicator as the very last
|
||||||
// PLIC will set the valid indicator as the very last store into that entry.
|
* store into that entry.
|
||||||
//
|
*
|
||||||
// When the OS has completed processing of the event then it will mark the event
|
* When the OS has completed processing of the event then it will mark
|
||||||
// as invalid so that PLIC knows it can store into that event location again.
|
* the event as invalid so that PLIC knows it can store into that event
|
||||||
//
|
* location again.
|
||||||
// If the event stack fills and there are overflow events, then PLIC will set
|
*
|
||||||
// the xPlicOverflowIntPending flag in which case the OS will have to fetch the
|
* If the event stack fills and there are overflow events, then PLIC
|
||||||
// additional LP events once they have drained the event stack.
|
* will set the xPlicOverflowIntPending flag in which case the OS will
|
||||||
//
|
* have to fetch the additional LP events once they have drained the
|
||||||
// The first 16-bytes are known by both the OS and PLIC. The remainder of the
|
* event stack.
|
||||||
// cache line is for use by the OS.
|
*
|
||||||
//
|
* The first 16-bytes are known by both the OS and PLIC. The remainder
|
||||||
//=============================================================================
|
* of the cache line is for use by the OS.
|
||||||
|
*/
|
||||||
u8 xPlicOverflowIntPending;// 0x00 Overflow events are pending
|
u8 xPlicOverflowIntPending;// 0x00 Overflow events are pending
|
||||||
u8 xPlicStatus; // 0x01 DedicatedIo or DedicatedLp or NotUsed
|
u8 xPlicStatus; // 0x01 DedicatedIo or DedicatedLp or NotUsed
|
||||||
u16 xSlicLogicalProcIndex; // 0x02 Logical Proc Index for correlation
|
u16 xSlicLogicalProcIndex; // 0x02 Logical Proc Index for correlation
|
||||||
|
@ -76,17 +76,17 @@ struct ItLpQueue
|
||||||
|
|
||||||
extern struct ItLpQueue xItLpQueue;
|
extern struct ItLpQueue xItLpQueue;
|
||||||
|
|
||||||
extern struct HvLpEvent * ItLpQueue_getNextLpEvent( struct ItLpQueue * );
|
extern struct HvLpEvent * ItLpQueue_getNextLpEvent(struct ItLpQueue *);
|
||||||
extern int ItLpQueue_isLpIntPending( struct ItLpQueue * );
|
extern int ItLpQueue_isLpIntPending(struct ItLpQueue *);
|
||||||
extern unsigned ItLpQueue_process( struct ItLpQueue *, struct pt_regs * );
|
extern unsigned ItLpQueue_process(struct ItLpQueue *, struct pt_regs *);
|
||||||
extern void ItLpQueue_clearValid( struct HvLpEvent * );
|
extern void ItLpQueue_clearValid(struct HvLpEvent *);
|
||||||
|
|
||||||
static __inline__ void process_iSeries_events( void )
|
static __inline__ void process_iSeries_events(void)
|
||||||
{
|
{
|
||||||
__asm__ __volatile__ (
|
__asm__ __volatile__ (
|
||||||
" li 0,0x5555 \n\
|
" li 0,0x5555 \n\
|
||||||
sc"
|
sc"
|
||||||
: : : "r0", "r3" );
|
: : : "r0", "r3");
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* _ITLPQUEUE_H */
|
#endif /* _ITLPQUEUE_H */
|
||||||
|
|
|
@ -19,19 +19,16 @@
|
||||||
#ifndef _ITLPREGSAVE_H
|
#ifndef _ITLPREGSAVE_H
|
||||||
#define _ITLPREGSAVE_H
|
#define _ITLPREGSAVE_H
|
||||||
|
|
||||||
//=====================================================================================
|
/*
|
||||||
//
|
* This control block contains the data that is shared between PLIC
|
||||||
// This control block contains the data that is shared between PLIC
|
* and the OS
|
||||||
// and the OS
|
*/
|
||||||
//
|
|
||||||
//
|
|
||||||
|
|
||||||
struct ItLpRegSave
|
struct ItLpRegSave {
|
||||||
{
|
|
||||||
u32 xDesc; // Eye catcher "LpRS" ebcdic 000-003
|
u32 xDesc; // Eye catcher "LpRS" ebcdic 000-003
|
||||||
u16 xSize; // Size of this class 004-005
|
u16 xSize; // Size of this class 004-005
|
||||||
u8 xInUse; // Area is live 006-007
|
u8 xInUse; // Area is live 006-007
|
||||||
u8 xRsvd1[9]; // Reserved 007-00F
|
u8 xRsvd1[9]; // Reserved 007-00F
|
||||||
|
|
||||||
u8 xFixedRegSave[352]; // Fixed Register Save Area 010-16F
|
u8 xFixedRegSave[352]; // Fixed Register Save Area 010-16F
|
||||||
u32 xCTRL; // Control Register 170-173
|
u32 xCTRL; // Control Register 170-173
|
||||||
|
@ -67,7 +64,7 @@ struct ItLpRegSave
|
||||||
|
|
||||||
u64 xFPR[32]; // Floating Point Registers 200-2FF
|
u64 xFPR[32]; // Floating Point Registers 200-2FF
|
||||||
|
|
||||||
u64 xMSR; // Machine State Register 300-307
|
u64 xMSR; // Machine State Register 300-307
|
||||||
u64 xNIA; // Next Instruction Address 308-30F
|
u64 xNIA; // Next Instruction Address 308-30F
|
||||||
|
|
||||||
u64 xDABR; // Data Address Breakpoint Reg 310-317
|
u64 xDABR; // Data Address Breakpoint Reg 310-317
|
||||||
|
@ -76,8 +73,8 @@ struct ItLpRegSave
|
||||||
u64 xHID0; // HW Implementation Dependent0 320-327
|
u64 xHID0; // HW Implementation Dependent0 320-327
|
||||||
|
|
||||||
u64 xHID4; // HW Implementation Dependent4 328-32F
|
u64 xHID4; // HW Implementation Dependent4 328-32F
|
||||||
u64 xSCOMd; // SCON Data Reg (SPRG4) 330-337
|
u64 xSCOMd; // SCON Data Reg (SPRG4) 330-337
|
||||||
u64 xSCOMc; // SCON Command Reg (SPRG5) 338-33F
|
u64 xSCOMc; // SCON Command Reg (SPRG5) 338-33F
|
||||||
u64 xSDAR; // Sample Data Address Register 340-347
|
u64 xSDAR; // Sample Data Address Register 340-347
|
||||||
u64 xSIAR; // Sample Inst Address Register 348-34F
|
u64 xSIAR; // Sample Inst Address Register 348-34F
|
||||||
|
|
||||||
|
|
|
@ -17,13 +17,11 @@
|
||||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
#ifndef _ITSPCOMMAREA_H
|
#ifndef _ITSPCOMMAREA_H
|
||||||
#define _ITSPCOMMAREA_H
|
#define _ITSPCOMMAREA_H
|
||||||
|
|
||||||
|
|
||||||
struct SpCommArea
|
struct SpCommArea {
|
||||||
{
|
|
||||||
u32 xDesc; // Descriptor (only in new formats) 000-003
|
u32 xDesc; // Descriptor (only in new formats) 000-003
|
||||||
u8 xFormat; // Format (only in new formats) 004-004
|
u8 xFormat; // Format (only in new formats) 004-004
|
||||||
u8 xRsvd1[11]; // Reserved 005-00F
|
u8 xRsvd1[11]; // Reserved 005-00F
|
||||||
|
|
|
@ -19,78 +19,75 @@
|
||||||
#ifndef _ITVPDAREAS_H
|
#ifndef _ITVPDAREAS_H
|
||||||
#define _ITVPDAREAS_H
|
#define _ITVPDAREAS_H
|
||||||
|
|
||||||
//=====================================================================================
|
/*
|
||||||
//
|
* This file defines the address and length of all of the VPD area passed to
|
||||||
// This file defines the address and length of all of the VPD area passed to
|
* the OS from PLIC (most of which start from the SP).
|
||||||
// the OS from PLIC (most of which start from the SP).
|
*/
|
||||||
//
|
|
||||||
|
|
||||||
#include <asm/types.h>
|
#include <asm/types.h>
|
||||||
|
|
||||||
// VPD Entry index is carved in stone - cannot be changed (easily).
|
/* VPD Entry index is carved in stone - cannot be changed (easily). */
|
||||||
#define ItVpdCecVpd 0
|
#define ItVpdCecVpd 0
|
||||||
#define ItVpdDynamicSpace 1
|
#define ItVpdDynamicSpace 1
|
||||||
#define ItVpdExtVpd 2
|
#define ItVpdExtVpd 2
|
||||||
#define ItVpdExtVpdOnPanel 3
|
#define ItVpdExtVpdOnPanel 3
|
||||||
#define ItVpdFirstPaca 4
|
#define ItVpdFirstPaca 4
|
||||||
#define ItVpdIoVpd 5
|
#define ItVpdIoVpd 5
|
||||||
#define ItVpdIplParms 6
|
#define ItVpdIplParms 6
|
||||||
#define ItVpdMsVpd 7
|
#define ItVpdMsVpd 7
|
||||||
#define ItVpdPanelVpd 8
|
#define ItVpdPanelVpd 8
|
||||||
#define ItVpdLpNaca 9
|
#define ItVpdLpNaca 9
|
||||||
#define ItVpdBackplaneAndMaybeClockCardVpd 10
|
#define ItVpdBackplaneAndMaybeClockCardVpd 10
|
||||||
#define ItVpdRecoveryLogBuffer 11
|
#define ItVpdRecoveryLogBuffer 11
|
||||||
#define ItVpdSpCommArea 12
|
#define ItVpdSpCommArea 12
|
||||||
#define ItVpdSpLogBuffer 13
|
#define ItVpdSpLogBuffer 13
|
||||||
#define ItVpdSpLogBufferSave 14
|
#define ItVpdSpLogBufferSave 14
|
||||||
#define ItVpdSpCardVpd 15
|
#define ItVpdSpCardVpd 15
|
||||||
#define ItVpdFirstProcVpd 16
|
#define ItVpdFirstProcVpd 16
|
||||||
#define ItVpdApModelVpd 17
|
#define ItVpdApModelVpd 17
|
||||||
#define ItVpdClockCardVpd 18
|
#define ItVpdClockCardVpd 18
|
||||||
#define ItVpdBusExtCardVpd 19
|
#define ItVpdBusExtCardVpd 19
|
||||||
#define ItVpdProcCapacityVpd 20
|
#define ItVpdProcCapacityVpd 20
|
||||||
#define ItVpdInteractiveCapacityVpd 21
|
#define ItVpdInteractiveCapacityVpd 21
|
||||||
#define ItVpdFirstSlotLabel 22
|
#define ItVpdFirstSlotLabel 22
|
||||||
#define ItVpdFirstLpQueue 23
|
#define ItVpdFirstLpQueue 23
|
||||||
#define ItVpdFirstL3CacheVpd 24
|
#define ItVpdFirstL3CacheVpd 24
|
||||||
#define ItVpdFirstProcFruVpd 25
|
#define ItVpdFirstProcFruVpd 25
|
||||||
|
|
||||||
#define ItVpdMaxEntries 26
|
#define ItVpdMaxEntries 26
|
||||||
|
|
||||||
|
#define ItDmaMaxEntries 10
|
||||||
|
|
||||||
#define ItDmaMaxEntries 10
|
#define ItVpdAreasMaxSlotLabels 192
|
||||||
|
|
||||||
#define ItVpdAreasMaxSlotLabels 192
|
|
||||||
|
|
||||||
|
|
||||||
struct SlicVpdAdrs {
|
struct SlicVpdAdrs {
|
||||||
u32 pad1;
|
u32 pad1;
|
||||||
void * vpdAddr;
|
void *vpdAddr;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
struct ItVpdAreas
|
struct ItVpdAreas {
|
||||||
{
|
u32 xSlicDesc; // Descriptor 000-003
|
||||||
u32 xSlicDesc; // Descriptor 000-003
|
u16 xSlicSize; // Size of this control block 004-005
|
||||||
u16 xSlicSize; // Size of this control block 004-005
|
u16 xPlicAdjustVpdLens:1; // Flag to indicate new interface006-007
|
||||||
u16 xPlicAdjustVpdLens:1; // Flag to indicate new interface 006-007
|
u16 xRsvd1:15; // Reserved bits ...
|
||||||
u16 xRsvd1:15; // Reserved bits ...
|
u16 xSlicVpdEntries; // Number of VPD entries 008-009
|
||||||
u16 xSlicVpdEntries; // Number of VPD entries 008-009
|
u16 xSlicDmaEntries; // Number of DMA entries 00A-00B
|
||||||
u16 xSlicDmaEntries; // Number of DMA entries 00A-00B
|
u16 xSlicMaxLogicalProcs; // Maximum logical processors 00C-00D
|
||||||
u16 xSlicMaxLogicalProcs; // Maximum logical processors 00C-00D
|
u16 xSlicMaxPhysicalProcs; // Maximum physical processors 00E-00F
|
||||||
u16 xSlicMaxPhysicalProcs; // Maximum physical processors 00E-00F
|
u16 xSlicDmaToksOffset; // Offset into this of array 010-011
|
||||||
u16 xSlicDmaToksOffset; // Offset into this of array 010-011
|
u16 xSlicVpdAdrsOffset; // Offset into this of array 012-013
|
||||||
u16 xSlicVpdAdrsOffset; // Offset into this of array 012-013
|
u16 xSlicDmaLensOffset; // Offset into this of array 014-015
|
||||||
u16 xSlicDmaLensOffset; // Offset into this of array 014-015
|
u16 xSlicVpdLensOffset; // Offset into this of array 016-017
|
||||||
u16 xSlicVpdLensOffset; // Offset into this of array 016-017
|
u16 xSlicMaxSlotLabels; // Maximum number of slot labels018-019
|
||||||
u16 xSlicMaxSlotLabels; // Maximum number of slot labels 018-019
|
u16 xSlicMaxLpQueues; // Maximum number of LP Queues 01A-01B
|
||||||
u16 xSlicMaxLpQueues; // Maximum number of LP Queues 01A-01B
|
u8 xRsvd2[4]; // Reserved 01C-01F
|
||||||
u8 xRsvd2[4]; // Reserved 01C-01F
|
u64 xRsvd3[12]; // Reserved 020-07F
|
||||||
u64 xRsvd3[12]; // Reserved 020-07F
|
u32 xPlicDmaLens[ItDmaMaxEntries];// Array of DMA lengths 080-0A7
|
||||||
u32 xPlicDmaLens[ItDmaMaxEntries];// Array of DMA lengths 080-0A7
|
u32 xPlicDmaToks[ItDmaMaxEntries];// Array of DMA tokens 0A8-0CF
|
||||||
u32 xPlicDmaToks[ItDmaMaxEntries];// Array of DMA tokens 0A8-0CF
|
u32 xSlicVpdLens[ItVpdMaxEntries];// Array of VPD lengths 0D0-12F
|
||||||
u32 xSlicVpdLens[ItVpdMaxEntries];// Array of VPD lengths 0D0-12F
|
void *xSlicVpdAdrs[ItVpdMaxEntries];// Array of VPD buffers 130-1EF
|
||||||
void * xSlicVpdAdrs[ItVpdMaxEntries];// Array of VPD buffers 130-1EF
|
|
||||||
};
|
};
|
||||||
|
|
||||||
#endif /* _ITVPDAREAS_H */
|
#endif /* _ITVPDAREAS_H */
|
||||||
|
|
|
@ -34,16 +34,15 @@
|
||||||
#include <asm/iSeries/ItLpQueue.h>
|
#include <asm/iSeries/ItLpQueue.h>
|
||||||
#include <asm/iSeries/IoHriProcessorVpd.h>
|
#include <asm/iSeries/IoHriProcessorVpd.h>
|
||||||
|
|
||||||
extern struct LparMap xLparMap;
|
extern struct LparMap xLparMap;
|
||||||
extern struct HvReleaseData hvReleaseData;
|
extern struct HvReleaseData hvReleaseData;
|
||||||
extern struct ItLpNaca itLpNaca;
|
extern struct ItLpNaca itLpNaca;
|
||||||
extern struct ItIplParmsReal xItIplParmsReal;
|
extern struct ItIplParmsReal xItIplParmsReal;
|
||||||
extern struct ItExtVpdPanel xItExtVpdPanel;
|
extern struct ItExtVpdPanel xItExtVpdPanel;
|
||||||
extern struct IoHriProcessorVpd xIoHriProcessorVpd[];
|
extern struct IoHriProcessorVpd xIoHriProcessorVpd[];
|
||||||
extern struct ItLpQueue xItLpQueue;
|
extern struct ItLpQueue xItLpQueue;
|
||||||
extern struct ItVpdAreas itVpdAreas;
|
extern struct ItVpdAreas itVpdAreas;
|
||||||
extern u64 xMsVpd[];
|
extern u64 xMsVpd[];
|
||||||
extern struct msChunks msChunks;
|
extern struct msChunks msChunks;
|
||||||
|
|
||||||
|
|
||||||
#endif /* _LPARDATA_H */
|
#endif /* _LPARDATA_H */
|
||||||
|
|
|
@ -21,7 +21,8 @@
|
||||||
|
|
||||||
#include <asm/types.h>
|
#include <asm/types.h>
|
||||||
|
|
||||||
/* The iSeries hypervisor will set up mapping for one or more
|
/*
|
||||||
|
* The iSeries hypervisor will set up mapping for one or more
|
||||||
* ESID/VSID pairs (in SLB/segment registers) and will set up
|
* ESID/VSID pairs (in SLB/segment registers) and will set up
|
||||||
* mappings of one or more ranges of pages to VAs.
|
* mappings of one or more ranges of pages to VAs.
|
||||||
* We will have the hypervisor set up the ESID->VSID mapping
|
* We will have the hypervisor set up the ESID->VSID mapping
|
||||||
|
@ -48,20 +49,19 @@
|
||||||
* entry to map the Esid to the Vsid.
|
* entry to map the Esid to the Vsid.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
// Hypervisor initially maps 32MB of the load area
|
/* Hypervisor initially maps 32MB of the load area */
|
||||||
#define HvPagesToMap 8192
|
#define HvPagesToMap 8192
|
||||||
|
|
||||||
struct LparMap
|
struct LparMap {
|
||||||
{
|
u64 xNumberEsids; // Number of ESID/VSID pairs (1)
|
||||||
u64 xNumberEsids; // Number of ESID/VSID pairs (1)
|
u64 xNumberRanges; // Number of VA ranges to map (1)
|
||||||
u64 xNumberRanges; // Number of VA ranges to map (1)
|
u64 xSegmentTableOffs; // Page number within load area of seg table (0)
|
||||||
u64 xSegmentTableOffs; // Page number within load area of seg table (0)
|
u64 xRsvd[5];
|
||||||
u64 xRsvd[5]; // Reserved (0)
|
u64 xKernelEsid; // Esid used to map kernel load (0x0C00000000)
|
||||||
u64 xKernelEsid; // Esid used to map kernel load (0x0C00000000)
|
u64 xKernelVsid; // Vsid used to map kernel load (0x0C00000000)
|
||||||
u64 xKernelVsid; // Vsid used to map kernel load (0x0C00000000)
|
u64 xPages; // Number of pages to be mapped (8192)
|
||||||
u64 xPages; // Number of pages to be mapped (8192)
|
u64 xOffset; // Offset from start of load area (0)
|
||||||
u64 xOffset; // Offset from start of load area (0)
|
u64 xVPN; // Virtual Page Number (0x000C000000000000)
|
||||||
u64 xVPN; // Virtual Page Number (0x000C000000000000)
|
|
||||||
};
|
};
|
||||||
|
|
||||||
#endif /* _LPARMAP_H */
|
#endif /* _LPARMAP_H */
|
||||||
|
|
|
@ -1,8 +1,6 @@
|
||||||
|
|
||||||
#ifndef __XMPCILPEVENT_H__
|
#ifndef __XMPCILPEVENT_H__
|
||||||
#define __XMPCILPEVENT_H__
|
#define __XMPCILPEVENT_H__
|
||||||
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
extern "C" {
|
extern "C" {
|
||||||
#endif
|
#endif
|
||||||
|
@ -10,7 +8,6 @@ extern "C" {
|
||||||
int XmPciLpEvent_init(void);
|
int XmPciLpEvent_init(void);
|
||||||
void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq);
|
void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq);
|
||||||
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -5,32 +5,33 @@
|
||||||
|
|
||||||
#ifdef CONFIG_PPC_ISERIES
|
#ifdef CONFIG_PPC_ISERIES
|
||||||
#include <linux/types.h>
|
#include <linux/types.h>
|
||||||
/************************************************************************/
|
/*
|
||||||
/* File iSeries_io.h created by Allan Trautman on Thu Dec 28 2000. */
|
* File iSeries_io.h created by Allan Trautman on Thu Dec 28 2000.
|
||||||
/************************************************************************/
|
*
|
||||||
/* Remaps the io.h for the iSeries Io */
|
* Remaps the io.h for the iSeries Io
|
||||||
/* Copyright (C) 20yy Allan H Trautman, IBM Corporation */
|
* Copyright (C) 2000 Allan H Trautman, IBM Corporation
|
||||||
/* */
|
*
|
||||||
/* This program is free software; you can redistribute it and/or modify */
|
* This program is free software; you can redistribute it and/or modify
|
||||||
/* it under the terms of the GNU General Public License as published by */
|
* it under the terms of the GNU General Public License as published by
|
||||||
/* the Free Software Foundation; either version 2 of the License, or */
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
/* (at your option) any later version. */
|
* (at your option) any later version.
|
||||||
/* */
|
*
|
||||||
/* This program is distributed in the hope that it will be useful, */
|
* This program is distributed in the hope that it will be useful,
|
||||||
/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
/* GNU General Public License for more details. */
|
* GNU General Public License for more details.
|
||||||
/* */
|
*
|
||||||
/* You should have received a copy of the GNU General Public License */
|
* You should have received a copy of the GNU General Public License
|
||||||
/* along with this program; if not, write to the: */
|
* along with this program; if not, write to the:
|
||||||
/* Free Software Foundation, Inc., */
|
* Free Software Foundation, Inc.,
|
||||||
/* 59 Temple Place, Suite 330, */
|
* 59 Temple Place, Suite 330,
|
||||||
/* Boston, MA 02111-1307 USA */
|
* Boston, MA 02111-1307 USA
|
||||||
/************************************************************************/
|
*
|
||||||
/* Change Activity: */
|
* Change Activity:
|
||||||
/* Created December 28, 2000 */
|
* Created December 28, 2000
|
||||||
/* End Change Activity */
|
* End Change Activity
|
||||||
/************************************************************************/
|
*/
|
||||||
|
|
||||||
extern u8 iSeries_Read_Byte(const volatile void __iomem * IoAddress);
|
extern u8 iSeries_Read_Byte(const volatile void __iomem * IoAddress);
|
||||||
extern u16 iSeries_Read_Word(const volatile void __iomem * IoAddress);
|
extern u16 iSeries_Read_Word(const volatile void __iomem * IoAddress);
|
||||||
extern u32 iSeries_Read_Long(const volatile void __iomem * IoAddress);
|
extern u32 iSeries_Read_Long(const volatile void __iomem * IoAddress);
|
||||||
|
@ -39,8 +40,10 @@ extern void iSeries_Write_Word(u16 IoData, volatile void __iomem * IoAddress);
|
||||||
extern void iSeries_Write_Long(u32 IoData, volatile void __iomem * IoAddress);
|
extern void iSeries_Write_Long(u32 IoData, volatile void __iomem * IoAddress);
|
||||||
|
|
||||||
extern void iSeries_memset_io(volatile void __iomem *dest, char x, size_t n);
|
extern void iSeries_memset_io(volatile void __iomem *dest, char x, size_t n);
|
||||||
extern void iSeries_memcpy_toio(volatile void __iomem *dest, void *source, size_t n);
|
extern void iSeries_memcpy_toio(volatile void __iomem *dest, void *source,
|
||||||
extern void iSeries_memcpy_fromio(void *dest, const volatile void __iomem *source, size_t n);
|
size_t n);
|
||||||
|
extern void iSeries_memcpy_fromio(void *dest,
|
||||||
|
const volatile void __iomem *source, size_t n);
|
||||||
|
|
||||||
#endif /* CONFIG_PPC_ISERIES */
|
#endif /* CONFIG_PPC_ISERIES */
|
||||||
#endif /* _ISERIES_IO_H */
|
#endif /* _ISERIES_IO_H */
|
||||||
|
|
|
@ -1,112 +1,113 @@
|
||||||
#ifndef _ISERIES_64_PCI_H
|
#ifndef _ISERIES_64_PCI_H
|
||||||
#define _ISERIES_64_PCI_H
|
#define _ISERIES_64_PCI_H
|
||||||
|
|
||||||
/************************************************************************/
|
/*
|
||||||
/* File iSeries_pci.h created by Allan Trautman on Tue Feb 20, 2001. */
|
* File iSeries_pci.h created by Allan Trautman on Tue Feb 20, 2001.
|
||||||
/************************************************************************/
|
*
|
||||||
/* Define some useful macros for the iSeries pci routines. */
|
* Define some useful macros for the iSeries pci routines.
|
||||||
/* Copyright (C) 2001 Allan H Trautman, IBM Corporation */
|
* Copyright (C) 2001 Allan H Trautman, IBM Corporation
|
||||||
/* */
|
*
|
||||||
/* This program is free software; you can redistribute it and/or modify */
|
* This program is free software; you can redistribute it and/or modify
|
||||||
/* it under the terms of the GNU General Public License as published by */
|
* it under the terms of the GNU General Public License as published by
|
||||||
/* the Free Software Foundation; either version 2 of the License, or */
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
/* (at your option) any later version. */
|
* (at your option) any later version.
|
||||||
/* */
|
*
|
||||||
/* This program is distributed in the hope that it will be useful, */
|
* This program is distributed in the hope that it will be useful,
|
||||||
/* but WITHOUT ANY WARRANTY; without even the implied warranty of */
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
/* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
/* GNU General Public License for more details. */
|
* GNU General Public License for more details.
|
||||||
/* */
|
*
|
||||||
/* You should have received a copy of the GNU General Public License */
|
* You should have received a copy of the GNU General Public License
|
||||||
/* along with this program; if not, write to the: */
|
* along with this program; if not, write to the:
|
||||||
/* Free Software Foundation, Inc., */
|
* Free Software Foundation, Inc.,
|
||||||
/* 59 Temple Place, Suite 330, */
|
* 59 Temple Place, Suite 330,
|
||||||
/* Boston, MA 02111-1307 USA */
|
* Boston, MA 02111-1307 USA
|
||||||
/************************************************************************/
|
*
|
||||||
/* Change Activity: */
|
* Change Activity:
|
||||||
/* Created Feb 20, 2001 */
|
* Created Feb 20, 2001
|
||||||
/* Added device reset, March 22, 2001 */
|
* Added device reset, March 22, 2001
|
||||||
/* Ported to ppc64, May 25, 2001 */
|
* Ported to ppc64, May 25, 2001
|
||||||
/* End Change Activity */
|
* End Change Activity
|
||||||
/************************************************************************/
|
*/
|
||||||
|
|
||||||
#include <asm/iSeries/HvCallPci.h>
|
#include <asm/iSeries/HvCallPci.h>
|
||||||
#include <asm/abs_addr.h>
|
#include <asm/abs_addr.h>
|
||||||
|
|
||||||
struct pci_dev; /* For Forward Reference */
|
struct pci_dev; /* For Forward Reference */
|
||||||
struct iSeries_Device_Node;
|
struct iSeries_Device_Node;
|
||||||
|
|
||||||
/************************************************************************/
|
/*
|
||||||
/* Gets iSeries Bus, SubBus, DevFn using iSeries_Device_Node structure */
|
* Gets iSeries Bus, SubBus, DevFn using iSeries_Device_Node structure
|
||||||
/************************************************************************/
|
*/
|
||||||
|
|
||||||
#define ISERIES_BUS(DevPtr) DevPtr->DsaAddr.Dsa.busNumber
|
#define ISERIES_BUS(DevPtr) DevPtr->DsaAddr.Dsa.busNumber
|
||||||
#define ISERIES_SUBBUS(DevPtr) DevPtr->DsaAddr.Dsa.subBusNumber
|
#define ISERIES_SUBBUS(DevPtr) DevPtr->DsaAddr.Dsa.subBusNumber
|
||||||
#define ISERIES_DEVICE(DevPtr) DevPtr->DsaAddr.Dsa.deviceId
|
#define ISERIES_DEVICE(DevPtr) DevPtr->DsaAddr.Dsa.deviceId
|
||||||
#define ISERIES_DSA(DevPtr) DevPtr->DsaAddr.DsaAddr
|
#define ISERIES_DSA(DevPtr) DevPtr->DsaAddr.DsaAddr
|
||||||
#define ISERIES_DEVFUN(DevPtr) DevPtr->DevFn
|
#define ISERIES_DEVFUN(DevPtr) DevPtr->DevFn
|
||||||
#define ISERIES_DEVNODE(PciDev) ((struct iSeries_Device_Node*)PciDev->sysdata)
|
#define ISERIES_DEVNODE(PciDev) ((struct iSeries_Device_Node*)PciDev->sysdata)
|
||||||
|
|
||||||
#define EADsMaxAgents 7
|
#define EADsMaxAgents 7
|
||||||
|
|
||||||
/************************************************************************/
|
/*
|
||||||
/* Decodes Linux DevFn to iSeries DevFn, bridge device, or function. */
|
* Decodes Linux DevFn to iSeries DevFn, bridge device, or function.
|
||||||
/* For Linux, see PCI_SLOT and PCI_FUNC in include/linux/pci.h */
|
* For Linux, see PCI_SLOT and PCI_FUNC in include/linux/pci.h
|
||||||
/************************************************************************/
|
*/
|
||||||
|
|
||||||
#define ISERIES_PCI_AGENTID(idsel,func) ((idsel & 0x0F) << 4) | (func & 0x07)
|
#define ISERIES_PCI_AGENTID(idsel, func) \
|
||||||
#define ISERIES_ENCODE_DEVICE(agentid) ((0x10) | ((agentid&0x20)>>2) | (agentid&07))
|
((idsel & 0x0F) << 4) | (func & 0x07)
|
||||||
|
#define ISERIES_ENCODE_DEVICE(agentid) \
|
||||||
|
((0x10) | ((agentid & 0x20) >> 2) | (agentid & 0x07))
|
||||||
|
|
||||||
#define ISERIES_GET_DEVICE_FROM_SUBBUS(subbus) ((subbus >> 5) & 0x7)
|
#define ISERIES_GET_DEVICE_FROM_SUBBUS(subbus) ((subbus >> 5) & 0x7)
|
||||||
#define ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus) ((subbus >> 2) & 0x7)
|
#define ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus) ((subbus >> 2) & 0x7)
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* N.B. the ISERIES_DECODE_* macros are not used anywhere, and I think
|
* N.B. the ISERIES_DECODE_* macros are not used anywhere, and I think
|
||||||
* the 0x71 (at least) must be wrong - 0x78 maybe? -- paulus.
|
* the 0x71 (at least) must be wrong - 0x78 maybe? -- paulus.
|
||||||
*/
|
*/
|
||||||
#define ISERIES_DECODE_DEVFN(linuxdevfn) (((linuxdevfn & 0x71) << 1) | (linuxdevfn & 0x07))
|
#define ISERIES_DECODE_DEVFN(linuxdevfn) \
|
||||||
#define ISERIES_DECODE_DEVICE(linuxdevfn) (((linuxdevfn & 0x38) >> 3) |(((linuxdevfn & 0x40) >> 2) + 0x10))
|
(((linuxdevfn & 0x71) << 1) | (linuxdevfn & 0x07))
|
||||||
#define ISERIES_DECODE_FUNCTION(linuxdevfn) (linuxdevfn & 0x07)
|
#define ISERIES_DECODE_DEVICE(linuxdevfn) \
|
||||||
|
(((linuxdevfn & 0x38) >> 3) | (((linuxdevfn & 0x40) >> 2) + 0x10))
|
||||||
|
#define ISERIES_DECODE_FUNCTION(linuxdevfn) \
|
||||||
|
(linuxdevfn & 0x07)
|
||||||
|
|
||||||
/************************************************************************/
|
/*
|
||||||
/* Converts Virtual Address to Real Address for Hypervisor calls */
|
* Converts Virtual Address to Real Address for Hypervisor calls
|
||||||
/************************************************************************/
|
*/
|
||||||
|
#define ISERIES_HV_ADDR(virtaddr) \
|
||||||
#define ISERIES_HV_ADDR(virtaddr) (0x8000000000000000 | virt_to_abs(virtaddr))
|
(0x8000000000000000 | virt_to_abs(virtaddr))
|
||||||
|
|
||||||
/************************************************************************/
|
|
||||||
/* iSeries Device Information */
|
|
||||||
/************************************************************************/
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
* iSeries Device Information
|
||||||
|
*/
|
||||||
struct iSeries_Device_Node {
|
struct iSeries_Device_Node {
|
||||||
struct list_head Device_List;
|
struct list_head Device_List;
|
||||||
struct pci_dev* PciDev; /* Pointer to pci_dev structure*/
|
struct pci_dev *PciDev;
|
||||||
union HvDsaMap DsaAddr; /* Direct Select Address */
|
union HvDsaMap DsaAddr; /* Direct Select Address */
|
||||||
/* busNumber,subBusNumber, */
|
/* busNumber, subBusNumber, */
|
||||||
/* deviceId, barNumber */
|
/* deviceId, barNumber */
|
||||||
HvAgentId AgentId; /* Hypervisor DevFn */
|
HvAgentId AgentId; /* Hypervisor DevFn */
|
||||||
int DevFn; /* Linux devfn */
|
int DevFn; /* Linux devfn */
|
||||||
int BarOffset;
|
int BarOffset;
|
||||||
int Irq; /* Assigned IRQ */
|
int Irq; /* Assigned IRQ */
|
||||||
int ReturnCode; /* Return Code Holder */
|
int ReturnCode; /* Return Code Holder */
|
||||||
int IoRetry; /* Current Retry Count */
|
int IoRetry; /* Current Retry Count */
|
||||||
int Flags; /* Possible flags(disable/bist)*/
|
int Flags; /* Possible flags(disable/bist)*/
|
||||||
u16 Vendor; /* Vendor ID */
|
u16 Vendor; /* Vendor ID */
|
||||||
u8 LogicalSlot; /* Hv Slot Index for Tces */
|
u8 LogicalSlot; /* Hv Slot Index for Tces */
|
||||||
struct iommu_table* iommu_table;/* Device TCE Table */
|
struct iommu_table *iommu_table;/* Device TCE Table */
|
||||||
u8 PhbId; /* Phb Card is on. */
|
u8 PhbId; /* Phb Card is on. */
|
||||||
u16 Board; /* Board Number */
|
u16 Board; /* Board Number */
|
||||||
u8 FrameId; /* iSeries spcn Frame Id */
|
u8 FrameId; /* iSeries spcn Frame Id */
|
||||||
char CardLocation[4];/* Char format of planar vpd */
|
char CardLocation[4];/* Char format of planar vpd */
|
||||||
char Location[20]; /* Frame 1, Card C10 */
|
char Location[20]; /* Frame 1, Card C10 */
|
||||||
};
|
};
|
||||||
|
|
||||||
/************************************************************************/
|
extern int iSeries_Device_Information(struct pci_dev*, char*, int);
|
||||||
/* Functions */
|
extern void iSeries_Get_Location_Code(struct iSeries_Device_Node*);
|
||||||
/************************************************************************/
|
extern int iSeries_Device_ToggleReset(struct pci_dev* PciDev,
|
||||||
|
int AssertTime, int DelayTime);
|
||||||
extern int iSeries_Device_Information(struct pci_dev*,char*, int);
|
|
||||||
extern void iSeries_Get_Location_Code(struct iSeries_Device_Node*);
|
|
||||||
extern int iSeries_Device_ToggleReset(struct pci_dev* PciDev, int AssertTime, int DelayTime);
|
|
||||||
|
|
||||||
#endif /* _ISERIES_64_PCI_H */
|
#endif /* _ISERIES_64_PCI_H */
|
||||||
|
|
|
@ -9,7 +9,6 @@
|
||||||
* all partitions in the iSeries. It also provides miscellaneous low-level
|
* all partitions in the iSeries. It also provides miscellaneous low-level
|
||||||
* machine facility type operations.
|
* machine facility type operations.
|
||||||
*
|
*
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
* This program is free software; you can redistribute it and/or modify
|
||||||
* it under the terms of the GNU General Public License as published by
|
* it under the terms of the GNU General Public License as published by
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
|
|
@ -44,14 +44,16 @@
|
||||||
#include <asm/iSeries/HvTypes.h>
|
#include <asm/iSeries/HvTypes.h>
|
||||||
#include <asm/iSeries/HvLpEvent.h>
|
#include <asm/iSeries/HvLpEvent.h>
|
||||||
|
|
||||||
/* iSeries virtual I/O events use the subtype field in
|
/*
|
||||||
|
* iSeries virtual I/O events use the subtype field in
|
||||||
* HvLpEvent to figure out what kind of vio event is coming
|
* HvLpEvent to figure out what kind of vio event is coming
|
||||||
* in. We use a table to route these, and this defines
|
* in. We use a table to route these, and this defines
|
||||||
* the maximum number of distinct subtypes
|
* the maximum number of distinct subtypes
|
||||||
*/
|
*/
|
||||||
#define VIO_MAX_SUBTYPES 8
|
#define VIO_MAX_SUBTYPES 8
|
||||||
|
|
||||||
/* Each subtype can register a handler to process their events.
|
/*
|
||||||
|
* Each subtype can register a handler to process their events.
|
||||||
* The handler must have this interface.
|
* The handler must have this interface.
|
||||||
*/
|
*/
|
||||||
typedef void (vio_event_handler_t) (struct HvLpEvent * event);
|
typedef void (vio_event_handler_t) (struct HvLpEvent * event);
|
||||||
|
@ -70,13 +72,13 @@ void vio_free_event_buffer(int subtype, void *buffer);
|
||||||
extern HvLpIndex viopath_hostLp;
|
extern HvLpIndex viopath_hostLp;
|
||||||
extern HvLpIndex viopath_ourLp;
|
extern HvLpIndex viopath_ourLp;
|
||||||
|
|
||||||
#define VIOCHAR_MAX_DATA 200
|
#define VIOCHAR_MAX_DATA 200
|
||||||
|
|
||||||
#define VIOMAJOR_SUBTYPE_MASK 0xff00
|
#define VIOMAJOR_SUBTYPE_MASK 0xff00
|
||||||
#define VIOMINOR_SUBTYPE_MASK 0x00ff
|
#define VIOMINOR_SUBTYPE_MASK 0x00ff
|
||||||
#define VIOMAJOR_SUBTYPE_SHIFT 8
|
#define VIOMAJOR_SUBTYPE_SHIFT 8
|
||||||
|
|
||||||
#define VIOVERSION 0x0101
|
#define VIOVERSION 0x0101
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* This is the general structure for VIO errors; each module should have
|
* This is the general structure for VIO errors; each module should have
|
||||||
|
@ -89,8 +91,8 @@ struct vio_error_entry {
|
||||||
int errno;
|
int errno;
|
||||||
const char *msg;
|
const char *msg;
|
||||||
};
|
};
|
||||||
const struct vio_error_entry *vio_lookup_rc(const struct vio_error_entry
|
extern const struct vio_error_entry *vio_lookup_rc(
|
||||||
*local_table, u16 rc);
|
const struct vio_error_entry *local_table, u16 rc);
|
||||||
|
|
||||||
enum viosubtypes {
|
enum viosubtypes {
|
||||||
viomajorsubtype_monitor = 0x0100,
|
viomajorsubtype_monitor = 0x0100,
|
||||||
|
@ -102,7 +104,6 @@ enum viosubtypes {
|
||||||
viomajorsubtype_scsi = 0x0700
|
viomajorsubtype_scsi = 0x0700
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
||||||
enum vioconfigsubtype {
|
enum vioconfigsubtype {
|
||||||
vioconfigget = 0x0001,
|
vioconfigget = 0x0001,
|
||||||
};
|
};
|
||||||
|
|
Loading…
Reference in a new issue