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drm/amdgpu/gfx8: KIQ is also disabled when MEC is disabled 

Set the ready flag to reflect this.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
hifive-unleashed-5.1
Alex Deucher 2017-03-30 13:03:07 -04:00
parent 1125016426
commit fcf17a43ff
1 changed files with 1 additions and 0 deletions
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drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
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@ -4565,6 +4565,7 @@ static void gfx_v8_0_cp_compute_enable(struct amdgpu_device *adev, bool enable)
WREG32(mmCP_MEC_CNTL, (CP_MEC_CNTL__MEC_ME1_HALT_MASK | CP_MEC_CNTL__MEC_ME2_HALT_MASK));
for (i = 0; i < adev->gfx.num_compute_rings; i++)
adev->gfx.compute_ring[i].ready = false;
adev->gfx.kiq.ring.ready = false;
}
udelay(50);
}