drm/radeon: Print gart initialization details on all chipsets
This was previously done for r300 only. Use %016llX instead of %08X for printing the table address. Also fix typos in gart warning messages. Signed-off-by: Tormod Volden <debian.tormod@gmail.com> Reviewed-by: Michel Dänzer <michel@daenzer.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -910,6 +910,9 @@ int evergreen_pcie_gart_enable(struct radeon_device *rdev)
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WREG32(VM_CONTEXT1_CNTL, 0);
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evergreen_pcie_gart_tlb_flush(rdev);
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DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n",
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(unsigned)(rdev->mc.gtt_size >> 20),
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(unsigned long long)rdev->gart.table_addr);
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rdev->gart.ready = true;
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return 0;
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}
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@ -996,6 +996,9 @@ int cayman_pcie_gart_enable(struct radeon_device *rdev)
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WREG32(VM_CONTEXT1_CNTL, 0);
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cayman_pcie_gart_tlb_flush(rdev);
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DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n",
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(unsigned)(rdev->mc.gtt_size >> 20),
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(unsigned long long)rdev->gart.table_addr);
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rdev->gart.ready = true;
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return 0;
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}
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@ -513,6 +513,9 @@ int r100_pci_gart_enable(struct radeon_device *rdev)
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tmp = RREG32(RADEON_AIC_CNTL) | RADEON_PCIGART_TRANSLATE_EN;
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WREG32(RADEON_AIC_CNTL, tmp);
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r100_pci_gart_tlb_flush(rdev);
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DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n",
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(unsigned)(rdev->mc.gtt_size >> 20),
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(unsigned long long)rdev->gart.table_addr);
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rdev->gart.ready = true;
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return 0;
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}
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@ -144,8 +144,9 @@ int rv370_pcie_gart_enable(struct radeon_device *rdev)
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tmp |= RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD;
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WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
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rv370_pcie_gart_tlb_flush(rdev);
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DRM_INFO("PCIE GART of %uM enabled (table at 0x%08X).\n",
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(unsigned)(rdev->mc.gtt_size >> 20), table_addr);
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DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n",
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(unsigned)(rdev->mc.gtt_size >> 20),
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(unsigned long long)table_addr);
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rdev->gart.ready = true;
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return 0;
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}
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@ -993,6 +993,9 @@ int r600_pcie_gart_enable(struct radeon_device *rdev)
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WREG32(VM_CONTEXT0_CNTL + (i * 4), 0);
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r600_pcie_gart_tlb_flush(rdev);
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DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n",
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(unsigned)(rdev->mc.gtt_size >> 20),
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(unsigned long long)rdev->gart.table_addr);
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rdev->gart.ready = true;
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return 0;
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}
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@ -142,7 +142,7 @@ void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
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u64 page_base;
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if (!rdev->gart.ready) {
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WARN(1, "trying to unbind memory to unitialized GART !\n");
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WARN(1, "trying to unbind memory from uninitialized GART !\n");
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return;
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}
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t = offset / RADEON_GPU_PAGE_SIZE;
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@ -174,7 +174,7 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
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int i, j;
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if (!rdev->gart.ready) {
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WARN(1, "trying to bind memory to unitialized GART !\n");
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WARN(1, "trying to bind memory to uninitialized GART !\n");
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return -EINVAL;
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}
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t = offset / RADEON_GPU_PAGE_SIZE;
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@ -182,6 +182,9 @@ int rs400_gart_enable(struct radeon_device *rdev)
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/* Enable gart */
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WREG32_MC(RS480_AGP_ADDRESS_SPACE_SIZE, (RS480_GART_EN | size_reg));
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rs400_gart_tlb_flush(rdev);
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DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n",
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(unsigned)(rdev->mc.gtt_size >> 20),
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(unsigned long long)rdev->gart.table_addr);
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rdev->gart.ready = true;
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return 0;
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}
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@ -484,6 +484,9 @@ static int rs600_gart_enable(struct radeon_device *rdev)
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tmp = RREG32_MC(R_000009_MC_CNTL1);
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WREG32_MC(R_000009_MC_CNTL1, (tmp | S_000009_ENABLE_PAGE_TABLES(1)));
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rs600_gart_tlb_flush(rdev);
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DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n",
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(unsigned)(rdev->mc.gtt_size >> 20),
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(unsigned long long)rdev->gart.table_addr);
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rdev->gart.ready = true;
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return 0;
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}
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@ -161,6 +161,9 @@ int rv770_pcie_gart_enable(struct radeon_device *rdev)
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WREG32(VM_CONTEXT0_CNTL + (i * 4), 0);
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r600_pcie_gart_tlb_flush(rdev);
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DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n",
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(unsigned)(rdev->mc.gtt_size >> 20),
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(unsigned long long)rdev->gart.table_addr);
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rdev->gart.ready = true;
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return 0;
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}
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