Merge branch 'pinmux/next' of git://linuxtv.org/pinchartl/fbdev into devel
This commit is contained in:
Linus Walleij
commit
fdc07cc13a
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@ -490,7 +490,7 @@ exit:
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* <devicename> <state> <pinname> are values that should match the pinctrl-maps
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* <newvalue> reflects the new config and is driver dependant
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*/
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static int pinconf_dbg_config_write(struct file *file,
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static ssize_t pinconf_dbg_config_write(struct file *file,
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const char __user *user_buf, size_t count, loff_t *ppos)
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{
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struct pinctrl_maps *maps_node;
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@ -508,7 +508,7 @@ static int pinconf_dbg_config_write(struct file *file,
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int i;
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/* Get userspace string and assure termination */
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buf_size = min(count, (size_t)(sizeof(buf)-1));
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buf_size = min(count, sizeof(buf) - 1);
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if (copy_from_user(buf, user_buf, buf_size))
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return -EFAULT;
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buf[buf_size] = 0;
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@ -3,7 +3,7 @@
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*
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* Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
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*
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* Arthur: Pritesh Raithatha <praithatha@nvidia.com>
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* Author: Pritesh Raithatha <praithatha@nvidia.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -2763,7 +2763,6 @@ static struct platform_driver tegra114_pinctrl_driver = {
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};
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module_platform_driver(tegra114_pinctrl_driver);
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MODULE_ALIAS("platform:tegra114-pinctrl");
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MODULE_AUTHOR("Pritesh Raithatha <praithatha@nvidia.com>");
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MODULE_DESCRIPTION("NVIDIA Tegra114 pincontrol driver");
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MODULE_DESCRIPTION("NVIDIA Tegra114 pinctrl driver");
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MODULE_LICENSE("GPL v2");
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@ -1288,6 +1288,22 @@ static struct sh_pfc_pin pinmux_pins[] = {
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arg5##_MARK, arg6##_MARK, \
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arg7##_MARK, arg8##_MARK, }
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/* - AUDIO macro -------------------------------------------------------------*/
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#define AUDIO_PFC_PIN(name, pin) SH_PFC_PINS(name, pin)
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#define AUDIO_PFC_DAT(name, pin) SH_PFC_MUX1(name, pin)
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/* - AUDIO clock -------------------------------------------------------------*/
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AUDIO_PFC_PIN(audio_clk_a, RCAR_GP_PIN(2, 22));
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AUDIO_PFC_DAT(audio_clk_a, AUDIO_CLKA);
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AUDIO_PFC_PIN(audio_clk_b, RCAR_GP_PIN(2, 23));
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AUDIO_PFC_DAT(audio_clk_b, AUDIO_CLKB);
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AUDIO_PFC_PIN(audio_clk_c, RCAR_GP_PIN(2, 7));
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AUDIO_PFC_DAT(audio_clk_c, AUDIO_CLKC);
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AUDIO_PFC_PIN(audio_clkout_a, RCAR_GP_PIN(2, 16));
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AUDIO_PFC_DAT(audio_clkout_a, AUDIO_CLKOUT_A);
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AUDIO_PFC_PIN(audio_clkout_b, RCAR_GP_PIN(1, 16));
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AUDIO_PFC_DAT(audio_clkout_b, AUDIO_CLKOUT_B);
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/* - Ether ------------------------------------------------------------------ */
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SH_PFC_PINS(ether_rmii, RCAR_GP_PIN(4, 10), RCAR_GP_PIN(4, 11),
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RCAR_GP_PIN(4, 13), RCAR_GP_PIN(4, 9),
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@ -1577,6 +1593,59 @@ SDHI_PFC_WPPN(sdhi2_wp_a, SD2_WP_A);
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SDHI_PFC_PINS(sdhi2_wp_b, RCAR_GP_PIN(3, 28));
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SDHI_PFC_WPPN(sdhi2_wp_b, SD2_WP_B);
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/* - SSI macro -------------------------------------------------------------- */
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#define SSI_PFC_PINS(name, args...) SH_PFC_PINS(name, args)
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#define SSI_PFC_CTRL(name, sck, ws) SH_PFC_MUX2(name, sck, ws)
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#define SSI_PFC_DATA(name, d) SH_PFC_MUX1(name, d)
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/* - SSI 0/1/2 -------------------------------------------------------------- */
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SSI_PFC_PINS(ssi012_ctrl, RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7));
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SSI_PFC_CTRL(ssi012_ctrl, SSI_SCK012, SSI_WS012);
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SSI_PFC_PINS(ssi0_data, RCAR_GP_PIN(3, 10));
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SSI_PFC_DATA(ssi0_data, SSI_SDATA0);
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SSI_PFC_PINS(ssi1_a_ctrl, RCAR_GP_PIN(2, 20), RCAR_GP_PIN(2, 21));
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SSI_PFC_CTRL(ssi1_a_ctrl, SSI_SCK1_A, SSI_WS1_A);
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SSI_PFC_PINS(ssi1_b_ctrl, PIN_NUMBER(3, 20), RCAR_GP_PIN(1, 3));
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SSI_PFC_CTRL(ssi1_b_ctrl, SSI_SCK1_B, SSI_WS1_B);
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SSI_PFC_PINS(ssi1_data, RCAR_GP_PIN(3, 9));
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SSI_PFC_DATA(ssi1_data, SSI_SDATA1);
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SSI_PFC_PINS(ssi2_a_ctrl, RCAR_GP_PIN(2, 26), RCAR_GP_PIN(3, 4));
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SSI_PFC_CTRL(ssi2_a_ctrl, SSI_SCK2_A, SSI_WS2_A);
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SSI_PFC_PINS(ssi2_b_ctrl, RCAR_GP_PIN(2, 6), RCAR_GP_PIN(2, 17));
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SSI_PFC_CTRL(ssi2_b_ctrl, SSI_SCK2_B, SSI_WS2_B);
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SSI_PFC_PINS(ssi2_data, RCAR_GP_PIN(3, 8));
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SSI_PFC_DATA(ssi2_data, SSI_SDATA2);
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/* - SSI 3/4 ---------------------------------------------------------------- */
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SSI_PFC_PINS(ssi34_ctrl, RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3));
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SSI_PFC_CTRL(ssi34_ctrl, SSI_SCK34, SSI_WS34);
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SSI_PFC_PINS(ssi3_data, RCAR_GP_PIN(3, 5));
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SSI_PFC_DATA(ssi3_data, SSI_SDATA3);
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SSI_PFC_PINS(ssi4_ctrl, RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 23));
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SSI_PFC_CTRL(ssi4_ctrl, SSI_SCK4, SSI_WS4);
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SSI_PFC_PINS(ssi4_data, RCAR_GP_PIN(3, 4));
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SSI_PFC_DATA(ssi4_data, SSI_SDATA4);
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/* - SSI 5 ------------------------------------------------------------------ */
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SSI_PFC_PINS(ssi5_ctrl, RCAR_GP_PIN(2, 31), RCAR_GP_PIN(3, 0));
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SSI_PFC_CTRL(ssi5_ctrl, SSI_SCK5, SSI_WS5);
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SSI_PFC_PINS(ssi5_data, RCAR_GP_PIN(3, 1));
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SSI_PFC_DATA(ssi5_data, SSI_SDATA5);
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/* - SSI 6 ------------------------------------------------------------------ */
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SSI_PFC_PINS(ssi6_ctrl, RCAR_GP_PIN(2, 28), RCAR_GP_PIN(2, 29));
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SSI_PFC_CTRL(ssi6_ctrl, SSI_SCK6, SSI_WS6);
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SSI_PFC_PINS(ssi6_data, RCAR_GP_PIN(2, 30));
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SSI_PFC_DATA(ssi6_data, SSI_SDATA6);
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/* - SSI 7/8 --------------------------------------------------------------- */
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SSI_PFC_PINS(ssi78_ctrl, RCAR_GP_PIN(2, 24), RCAR_GP_PIN(2, 25));
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SSI_PFC_CTRL(ssi78_ctrl, SSI_SCK78, SSI_WS78);
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SSI_PFC_PINS(ssi7_data, RCAR_GP_PIN(2, 27));
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SSI_PFC_DATA(ssi7_data, SSI_SDATA7);
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SSI_PFC_PINS(ssi8_data, RCAR_GP_PIN(2, 26));
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SSI_PFC_DATA(ssi8_data, SSI_SDATA8);
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/* - USB0 ------------------------------------------------------------------- */
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SH_PFC_PINS(usb0, RCAR_GP_PIN(0, 1));
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SH_PFC_MUX1(usb0, PENC0);
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@ -1624,6 +1693,11 @@ VIN_PFC_PINS(vin1_sync, RCAR_GP_PIN(3, 21), RCAR_GP_PIN(3, 22));
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VIN_PFC_SYNC(vin1_sync, VI1_HSYNC, VI1_VSYNC);
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static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(audio_clk_a),
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SH_PFC_PIN_GROUP(audio_clk_b),
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SH_PFC_PIN_GROUP(audio_clk_c),
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SH_PFC_PIN_GROUP(audio_clkout_a),
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SH_PFC_PIN_GROUP(audio_clkout_b),
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SH_PFC_PIN_GROUP(ether_rmii),
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SH_PFC_PIN_GROUP(ether_link),
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SH_PFC_PIN_GROUP(ether_magic),
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@ -1713,6 +1787,25 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(sdhi2_data4_b),
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SH_PFC_PIN_GROUP(sdhi2_wp_a),
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SH_PFC_PIN_GROUP(sdhi2_wp_b),
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SH_PFC_PIN_GROUP(ssi012_ctrl),
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SH_PFC_PIN_GROUP(ssi0_data),
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SH_PFC_PIN_GROUP(ssi1_a_ctrl),
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SH_PFC_PIN_GROUP(ssi1_b_ctrl),
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SH_PFC_PIN_GROUP(ssi1_data),
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SH_PFC_PIN_GROUP(ssi2_a_ctrl),
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SH_PFC_PIN_GROUP(ssi2_b_ctrl),
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SH_PFC_PIN_GROUP(ssi2_data),
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SH_PFC_PIN_GROUP(ssi34_ctrl),
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SH_PFC_PIN_GROUP(ssi3_data),
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SH_PFC_PIN_GROUP(ssi4_ctrl),
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SH_PFC_PIN_GROUP(ssi4_data),
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SH_PFC_PIN_GROUP(ssi5_ctrl),
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SH_PFC_PIN_GROUP(ssi5_data),
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SH_PFC_PIN_GROUP(ssi6_ctrl),
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SH_PFC_PIN_GROUP(ssi6_data),
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SH_PFC_PIN_GROUP(ssi78_ctrl),
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SH_PFC_PIN_GROUP(ssi7_data),
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SH_PFC_PIN_GROUP(ssi8_data),
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SH_PFC_PIN_GROUP(usb0),
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SH_PFC_PIN_GROUP(usb0_ovc),
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SH_PFC_PIN_GROUP(usb1),
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@ -1725,6 +1818,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(vin1_sync),
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};
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static const char * const audio_clk_groups[] = {
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"audio_clk_a",
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"audio_clk_b",
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"audio_clk_c",
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"audio_clkout_a",
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"audio_clkout_b",
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};
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static const char * const ether_groups[] = {
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"ether_rmii",
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"ether_link",
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@ -1875,6 +1976,28 @@ static const char * const sdhi2_groups[] = {
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"sdhi2_wp_b",
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};
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static const char * const ssi_groups[] = {
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"ssi012_ctrl",
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"ssi0_data",
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"ssi1_a_ctrl",
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"ssi1_b_ctrl",
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"ssi1_data",
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"ssi2_a_ctrl",
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"ssi2_b_ctrl",
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"ssi2_data",
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"ssi34_ctrl",
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"ssi3_data",
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"ssi4_ctrl",
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"ssi4_data",
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"ssi5_ctrl",
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"ssi5_data",
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"ssi6_ctrl",
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"ssi6_data",
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"ssi78_ctrl",
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"ssi7_data",
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"ssi8_data",
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};
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static const char * const usb0_groups[] = {
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"usb0",
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"usb0_ovc",
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@ -1898,6 +2021,7 @@ static const char * const vin1_groups[] = {
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};
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static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(audio_clk),
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SH_PFC_FUNCTION(ether),
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SH_PFC_FUNCTION(hscif0),
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SH_PFC_FUNCTION(hscif1),
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@ -1918,6 +2042,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(sdhi0),
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SH_PFC_FUNCTION(sdhi1),
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SH_PFC_FUNCTION(sdhi2),
|
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SH_PFC_FUNCTION(ssi),
|
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SH_PFC_FUNCTION(usb0),
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SH_PFC_FUNCTION(usb1),
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SH_PFC_FUNCTION(vin0),
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|
|
|
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|
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@ -781,6 +781,8 @@ enum {
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ADICS_SAMP_MARK, DU2_CDE_MARK, QPOLB_MARK, SCIFA2_RXD_B_MARK,
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USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK,
|
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TCLK1_B_MARK,
|
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|
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I2C3_SCL_MARK, I2C3_SDA_MARK,
|
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PINMUX_MARK_END,
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};
|
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|
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|
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@ -1719,10 +1721,22 @@ static const u16 pinmux_data[] = {
|
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PINMUX_IPSR_DATA(IP16_6, AUDIO_CLKOUT_D),
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PINMUX_IPSR_DATA(IP16_7, USB1_OVC),
|
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PINMUX_IPSR_MODSEL_DATA(IP16_7, TCLK1_B, SEL_TMU1_1),
|
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|
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PINMUX_DATA(I2C3_SCL_MARK, FN_SEL_IICDVFS_1),
|
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PINMUX_DATA(I2C3_SDA_MARK, FN_SEL_IICDVFS_1),
|
||||
};
|
||||
|
||||
/* R8A7790 has 6 banks with 32 GPIOs in each = 192 GPIOs */
|
||||
#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r))
|
||||
#define PIN_NUMBER(r, c) (((r) - 'A') * 31 + (c) + 200)
|
||||
#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c)
|
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|
||||
static struct sh_pfc_pin pinmux_pins[] = {
|
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PINMUX_GPIO_GP_ALL(),
|
||||
|
||||
/* Pins not associated with a GPIO port */
|
||||
SH_PFC_PIN_NAMED(ROW_GROUP_A('J'), 15, AJ15),
|
||||
SH_PFC_PIN_NAMED(ROW_GROUP_A('H'), 15, AH15),
|
||||
};
|
||||
|
||||
/* - DU RGB ----------------------------------------------------------------- */
|
||||
|
|
@ -1990,6 +2004,72 @@ static const unsigned int hscif1_ctrl_b_pins[] = {
|
|||
static const unsigned int hscif1_ctrl_b_mux[] = {
|
||||
HRTS1_N_B_MARK, HCTS1_N_B_MARK,
|
||||
};
|
||||
/* - I2C1 ------------------------------------------------------------------- */
|
||||
static const unsigned int i2c1_pins[] = {
|
||||
/* SCL, SDA */
|
||||
RCAR_GP_PIN(1, 16), RCAR_GP_PIN(1, 17),
|
||||
};
|
||||
static const unsigned int i2c1_mux[] = {
|
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I2C1_SCL_MARK, I2C1_SDA_MARK,
|
||||
};
|
||||
static const unsigned int i2c1_b_pins[] = {
|
||||
/* SCL, SDA */
|
||||
RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
|
||||
};
|
||||
static const unsigned int i2c1_b_mux[] = {
|
||||
I2C1_SCL_B_MARK, I2C1_SDA_B_MARK,
|
||||
};
|
||||
static const unsigned int i2c1_c_pins[] = {
|
||||
/* SCL, SDA */
|
||||
RCAR_GP_PIN(4, 30), RCAR_GP_PIN(4, 27),
|
||||
};
|
||||
static const unsigned int i2c1_c_mux[] = {
|
||||
I2C1_SCL_C_MARK, I2C1_SDA_C_MARK,
|
||||
};
|
||||
/* - I2C2 ------------------------------------------------------------------- */
|
||||
static const unsigned int i2c2_pins[] = {
|
||||
/* SCL, SDA */
|
||||
RCAR_GP_PIN(5, 5), RCAR_GP_PIN(5, 6),
|
||||
};
|
||||
static const unsigned int i2c2_mux[] = {
|
||||
I2C2_SCL_MARK, I2C2_SDA_MARK,
|
||||
};
|
||||
static const unsigned int i2c2_b_pins[] = {
|
||||
/* SCL, SDA */
|
||||
RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1),
|
||||
};
|
||||
static const unsigned int i2c2_b_mux[] = {
|
||||
I2C2_SCL_B_MARK, I2C2_SDA_B_MARK,
|
||||
};
|
||||
static const unsigned int i2c2_c_pins[] = {
|
||||
/* SCL, SDA */
|
||||
RCAR_GP_PIN(0, 6), RCAR_GP_PIN(0, 7),
|
||||
};
|
||||
static const unsigned int i2c2_c_mux[] = {
|
||||
I2C2_SCL_C_MARK, I2C2_SDA_C_MARK,
|
||||
};
|
||||
static const unsigned int i2c2_d_pins[] = {
|
||||
/* SCL, SDA */
|
||||
RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15),
|
||||
};
|
||||
static const unsigned int i2c2_d_mux[] = {
|
||||
I2C2_SCL_D_MARK, I2C2_SDA_D_MARK,
|
||||
};
|
||||
static const unsigned int i2c2_e_pins[] = {
|
||||
/* SCL, SDA */
|
||||
RCAR_GP_PIN(2, 18), RCAR_GP_PIN(2, 19),
|
||||
};
|
||||
static const unsigned int i2c2_e_mux[] = {
|
||||
I2C2_SCL_E_MARK, I2C2_SDA_E_MARK,
|
||||
};
|
||||
/* - I2C3 ------------------------------------------------------------------- */
|
||||
static const unsigned int i2c3_pins[] = {
|
||||
/* SCL, SDA */
|
||||
PIN_A_NUMBER('J', 15), PIN_A_NUMBER('H', 15),
|
||||
};
|
||||
static const unsigned int i2c3_mux[] = {
|
||||
I2C3_SCL_MARK, I2C3_SDA_MARK,
|
||||
};
|
||||
/* - INTC ------------------------------------------------------------------- */
|
||||
static const unsigned int intc_irq0_pins[] = {
|
||||
/* IRQ */
|
||||
|
|
@ -3047,6 +3127,15 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
|
|||
SH_PFC_PIN_GROUP(hscif1_data_b),
|
||||
SH_PFC_PIN_GROUP(hscif1_clk_b),
|
||||
SH_PFC_PIN_GROUP(hscif1_ctrl_b),
|
||||
SH_PFC_PIN_GROUP(i2c1),
|
||||
SH_PFC_PIN_GROUP(i2c1_b),
|
||||
SH_PFC_PIN_GROUP(i2c1_c),
|
||||
SH_PFC_PIN_GROUP(i2c2),
|
||||
SH_PFC_PIN_GROUP(i2c2_b),
|
||||
SH_PFC_PIN_GROUP(i2c2_c),
|
||||
SH_PFC_PIN_GROUP(i2c2_d),
|
||||
SH_PFC_PIN_GROUP(i2c2_e),
|
||||
SH_PFC_PIN_GROUP(i2c3),
|
||||
SH_PFC_PIN_GROUP(intc_irq0),
|
||||
SH_PFC_PIN_GROUP(intc_irq1),
|
||||
SH_PFC_PIN_GROUP(intc_irq2),
|
||||
|
|
@ -3243,6 +3332,24 @@ static const char * const hscif1_groups[] = {
|
|||
"hscif1_ctrl_b",
|
||||
};
|
||||
|
||||
static const char * const i2c1_groups[] = {
|
||||
"i2c1",
|
||||
"i2c1_b",
|
||||
"i2c1_c",
|
||||
};
|
||||
|
||||
static const char * const i2c2_groups[] = {
|
||||
"i2c2",
|
||||
"i2c2_b",
|
||||
"i2c2_c",
|
||||
"i2c2_d",
|
||||
"i2c2_e",
|
||||
};
|
||||
|
||||
static const char * const i2c3_groups[] = {
|
||||
"i2c3",
|
||||
};
|
||||
|
||||
static const char * const intc_groups[] = {
|
||||
"intc_irq0",
|
||||
"intc_irq1",
|
||||
|
|
@ -3469,6 +3576,9 @@ static const struct sh_pfc_function pinmux_functions[] = {
|
|||
SH_PFC_FUNCTION(eth),
|
||||
SH_PFC_FUNCTION(hscif0),
|
||||
SH_PFC_FUNCTION(hscif1),
|
||||
SH_PFC_FUNCTION(i2c1),
|
||||
SH_PFC_FUNCTION(i2c2),
|
||||
SH_PFC_FUNCTION(i2c3),
|
||||
SH_PFC_FUNCTION(intc),
|
||||
SH_PFC_FUNCTION(mmc0),
|
||||
SH_PFC_FUNCTION(mmc1),
|
||||
|
|
|
|||
Loading…
Reference in a new issue