drm/radeon/kms: add missing Evergreen texture formats to the CS parser
BC6 and BC7 are described in ARB_texture_compression_bptc. No idea what FMT_32_AS_32_32_32_32 is good for. Signed-off-by: Marek Olšák <maraeo@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -71,20 +71,21 @@ struct r600_cs_track {
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u64 db_bo_mc;
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};
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#define FMT_8_BIT(fmt, vc) [fmt] = { 1, 1, 1, vc }
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#define FMT_16_BIT(fmt, vc) [fmt] = { 1, 1, 2, vc }
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#define FMT_24_BIT(fmt) [fmt] = { 1, 1, 3, 0 }
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#define FMT_32_BIT(fmt, vc) [fmt] = { 1, 1, 4, vc }
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#define FMT_48_BIT(fmt) [fmt] = { 1, 1, 6, 0 }
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#define FMT_64_BIT(fmt, vc) [fmt] = { 1, 1, 8, vc }
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#define FMT_96_BIT(fmt) [fmt] = { 1, 1, 12, 0 }
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#define FMT_128_BIT(fmt, vc) [fmt] = { 1, 1, 16, vc }
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#define FMT_8_BIT(fmt, vc) [fmt] = { 1, 1, 1, vc, CHIP_R600 }
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#define FMT_16_BIT(fmt, vc) [fmt] = { 1, 1, 2, vc, CHIP_R600 }
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#define FMT_24_BIT(fmt) [fmt] = { 1, 1, 3, 0, CHIP_R600 }
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#define FMT_32_BIT(fmt, vc) [fmt] = { 1, 1, 4, vc, CHIP_R600 }
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#define FMT_48_BIT(fmt) [fmt] = { 1, 1, 6, 0, CHIP_R600 }
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#define FMT_64_BIT(fmt, vc) [fmt] = { 1, 1, 8, vc, CHIP_R600 }
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#define FMT_96_BIT(fmt) [fmt] = { 1, 1, 12, 0, CHIP_R600 }
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#define FMT_128_BIT(fmt, vc) [fmt] = { 1, 1, 16,vc, CHIP_R600 }
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struct gpu_formats {
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unsigned blockwidth;
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unsigned blockheight;
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unsigned blocksize;
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unsigned valid_color;
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enum radeon_family min_family;
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};
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static const struct gpu_formats color_formats_table[] = {
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@ -154,7 +155,11 @@ static const struct gpu_formats color_formats_table[] = {
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[V_038004_FMT_BC3] = { 4, 4, 16, 0 },
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[V_038004_FMT_BC4] = { 4, 4, 8, 0 },
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[V_038004_FMT_BC5] = { 4, 4, 16, 0},
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[V_038004_FMT_BC6] = { 4, 4, 16, 0, CHIP_CEDAR}, /* Evergreen-only */
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[V_038004_FMT_BC7] = { 4, 4, 16, 0, CHIP_CEDAR}, /* Evergreen-only */
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/* The other Evergreen formats */
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[V_038004_FMT_32_AS_32_32_32_32] = { 1, 1, 4, 0, CHIP_CEDAR},
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};
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static inline bool fmt_is_valid_color(u32 format)
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@ -168,11 +173,14 @@ static inline bool fmt_is_valid_color(u32 format)
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return false;
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}
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static inline bool fmt_is_valid_texture(u32 format)
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static inline bool fmt_is_valid_texture(u32 format, enum radeon_family family)
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{
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if (format >= ARRAY_SIZE(color_formats_table))
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return false;
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if (family < color_formats_table[format].min_family)
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return false;
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if (color_formats_table[format].blockwidth > 0)
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return true;
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@ -1325,7 +1333,7 @@ static inline int r600_check_texture_resource(struct radeon_cs_parser *p, u32 i
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return -EINVAL;
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}
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format = G_038004_DATA_FORMAT(word1);
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if (!fmt_is_valid_texture(format)) {
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if (!fmt_is_valid_texture(format, p->family)) {
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dev_warn(p->dev, "%s:%d texture invalid format %d\n",
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__func__, __LINE__, format);
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return -EINVAL;
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@ -1309,6 +1309,9 @@
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#define V_038004_FMT_BC3 0x00000033
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#define V_038004_FMT_BC4 0x00000034
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#define V_038004_FMT_BC5 0x00000035
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#define V_038004_FMT_BC6 0x00000036
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#define V_038004_FMT_BC7 0x00000037
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#define V_038004_FMT_32_AS_32_32_32_32 0x00000038
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#define R_038010_SQ_TEX_RESOURCE_WORD4_0 0x038010
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#define S_038010_FORMAT_COMP_X(x) (((x) & 0x3) << 0)
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#define G_038010_FORMAT_COMP_X(x) (((x) >> 0) & 0x3)
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