redonkable
/
alistair23-linux
1
0
Fork 0
Code Releases Activity

drm/nouveau/ibus: switch to device pri macros 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
hifive-unleashed-5.1
Ben Skeggs 2015-08-20 14:54:09 +10:00
parent 6f22749910
commit fef5cc0f25
3 changed files with 63 additions and 52 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

38
drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gf100.c
View File

@ -26,42 +26,46 @@
static void
gf100_ibus_intr_hub(struct nvkm_ibus *ibus, int i)
{
u32 addr = nv_rd32(ibus, 0x122120 + (i * 0x0400));
u32 data = nv_rd32(ibus, 0x122124 + (i * 0x0400));
u32 stat = nv_rd32(ibus, 0x122128 + (i * 0x0400));
struct nvkm_device *device = ibus->subdev.device;
u32 addr = nvkm_rd32(device, 0x122120 + (i * 0x0400));
u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0400));
u32 stat = nvkm_rd32(device, 0x122128 + (i * 0x0400));
nv_error(ibus, "HUB%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
nv_mask(ibus, 0x122128 + (i * 0x0400), 0x00000200, 0x00000000);
nvkm_mask(device, 0x122128 + (i * 0x0400), 0x00000200, 0x00000000);
}
static void
gf100_ibus_intr_rop(struct nvkm_ibus *ibus, int i)
{
u32 addr = nv_rd32(ibus, 0x124120 + (i * 0x0400));
u32 data = nv_rd32(ibus, 0x124124 + (i * 0x0400));
u32 stat = nv_rd32(ibus, 0x124128 + (i * 0x0400));
struct nvkm_device *device = ibus->subdev.device;
u32 addr = nvkm_rd32(device, 0x124120 + (i * 0x0400));
u32 data = nvkm_rd32(device, 0x124124 + (i * 0x0400));
u32 stat = nvkm_rd32(device, 0x124128 + (i * 0x0400));
nv_error(ibus, "ROP%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
nv_mask(ibus, 0x124128 + (i * 0x0400), 0x00000200, 0x00000000);
nvkm_mask(device, 0x124128 + (i * 0x0400), 0x00000200, 0x00000000);
}
static void
gf100_ibus_intr_gpc(struct nvkm_ibus *ibus, int i)
{
u32 addr = nv_rd32(ibus, 0x128120 + (i * 0x0400));
u32 data = nv_rd32(ibus, 0x128124 + (i * 0x0400));
u32 stat = nv_rd32(ibus, 0x128128 + (i * 0x0400));
struct nvkm_device *device = ibus->subdev.device;
u32 addr = nvkm_rd32(device, 0x128120 + (i * 0x0400));
u32 data = nvkm_rd32(device, 0x128124 + (i * 0x0400));
u32 stat = nvkm_rd32(device, 0x128128 + (i * 0x0400));
nv_error(ibus, "GPC%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
nv_mask(ibus, 0x128128 + (i * 0x0400), 0x00000200, 0x00000000);
nvkm_mask(device, 0x128128 + (i * 0x0400), 0x00000200, 0x00000000);
}
static void
gf100_ibus_intr(struct nvkm_subdev *subdev)
{
struct nvkm_ibus *ibus = (void *)subdev;
u32 intr0 = nv_rd32(ibus, 0x121c58);
u32 intr1 = nv_rd32(ibus, 0x121c5c);
u32 hubnr = nv_rd32(ibus, 0x121c70);
u32 ropnr = nv_rd32(ibus, 0x121c74);
u32 gpcnr = nv_rd32(ibus, 0x121c78);
struct nvkm_device *device = ibus->subdev.device;
u32 intr0 = nvkm_rd32(device, 0x121c58);
u32 intr1 = nvkm_rd32(device, 0x121c5c);
u32 hubnr = nvkm_rd32(device, 0x121c70);
u32 ropnr = nvkm_rd32(device, 0x121c74);
u32 gpcnr = nvkm_rd32(device, 0x121c78);
u32 i;
for (i = 0; (intr0 & 0x0000ff00) && i < hubnr; i++) {

53
drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk104.c
View File

@ -26,42 +26,46 @@
static void
gk104_ibus_intr_hub(struct nvkm_ibus *ibus, int i)
{
u32 addr = nv_rd32(ibus, 0x122120 + (i * 0x0800));
u32 data = nv_rd32(ibus, 0x122124 + (i * 0x0800));
u32 stat = nv_rd32(ibus, 0x122128 + (i * 0x0800));
struct nvkm_device *device = ibus->subdev.device;
u32 addr = nvkm_rd32(device, 0x122120 + (i * 0x0800));
u32 data = nvkm_rd32(device, 0x122124 + (i * 0x0800));
u32 stat = nvkm_rd32(device, 0x122128 + (i * 0x0800));
nv_error(ibus, "HUB%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
nv_mask(ibus, 0x122128 + (i * 0x0800), 0x00000200, 0x00000000);
nvkm_mask(device, 0x122128 + (i * 0x0800), 0x00000200, 0x00000000);
}
static void
gk104_ibus_intr_rop(struct nvkm_ibus *ibus, int i)
{
u32 addr = nv_rd32(ibus, 0x124120 + (i * 0x0800));
u32 data = nv_rd32(ibus, 0x124124 + (i * 0x0800));
u32 stat = nv_rd32(ibus, 0x124128 + (i * 0x0800));
struct nvkm_device *device = ibus->subdev.device;
u32 addr = nvkm_rd32(device, 0x124120 + (i * 0x0800));
u32 data = nvkm_rd32(device, 0x124124 + (i * 0x0800));
u32 stat = nvkm_rd32(device, 0x124128 + (i * 0x0800));
nv_error(ibus, "ROP%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
nv_mask(ibus, 0x124128 + (i * 0x0800), 0x00000200, 0x00000000);
nvkm_mask(device, 0x124128 + (i * 0x0800), 0x00000200, 0x00000000);
}
static void
gk104_ibus_intr_gpc(struct nvkm_ibus *ibus, int i)
{
u32 addr = nv_rd32(ibus, 0x128120 + (i * 0x0800));
u32 data = nv_rd32(ibus, 0x128124 + (i * 0x0800));
u32 stat = nv_rd32(ibus, 0x128128 + (i * 0x0800));
struct nvkm_device *device = ibus->subdev.device;
u32 addr = nvkm_rd32(device, 0x128120 + (i * 0x0800));
u32 data = nvkm_rd32(device, 0x128124 + (i * 0x0800));
u32 stat = nvkm_rd32(device, 0x128128 + (i * 0x0800));
nv_error(ibus, "GPC%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
nv_mask(ibus, 0x128128 + (i * 0x0800), 0x00000200, 0x00000000);
nvkm_mask(device, 0x128128 + (i * 0x0800), 0x00000200, 0x00000000);
}
static void
gk104_ibus_intr(struct nvkm_subdev *subdev)
{
struct nvkm_ibus *ibus = (void *)subdev;
u32 intr0 = nv_rd32(ibus, 0x120058);
u32 intr1 = nv_rd32(ibus, 0x12005c);
u32 hubnr = nv_rd32(ibus, 0x120070);
u32 ropnr = nv_rd32(ibus, 0x120074);
u32 gpcnr = nv_rd32(ibus, 0x120078);
struct nvkm_device *device = ibus->subdev.device;
u32 intr0 = nvkm_rd32(device, 0x120058);
u32 intr1 = nvkm_rd32(device, 0x12005c);
u32 hubnr = nvkm_rd32(device, 0x120070);
u32 ropnr = nvkm_rd32(device, 0x120074);
u32 gpcnr = nvkm_rd32(device, 0x120078);
u32 i;
for (i = 0; (intr0 & 0x0000ff00) && i < hubnr; i++) {
@ -93,15 +97,16 @@ static int
gk104_ibus_init(struct nvkm_object *object)
{
struct nvkm_ibus *ibus = (void *)object;
struct nvkm_device *device = ibus->subdev.device;
int ret = nvkm_ibus_init(ibus);
if (ret == 0) {
nv_mask(ibus, 0x122318, 0x0003ffff, 0x00001000);
nv_mask(ibus, 0x12231c, 0x0003ffff, 0x00000200);
nv_mask(ibus, 0x122310, 0x0003ffff, 0x00000800);
nv_mask(ibus, 0x122348, 0x0003ffff, 0x00000100);
nv_mask(ibus, 0x1223b0, 0x0003ffff, 0x00000fff);
nv_mask(ibus, 0x122348, 0x0003ffff, 0x00000200);
nv_mask(ibus, 0x122358, 0x0003ffff, 0x00002880);
nvkm_mask(device, 0x122318, 0x0003ffff, 0x00001000);
nvkm_mask(device, 0x12231c, 0x0003ffff, 0x00000200);
nvkm_mask(device, 0x122310, 0x0003ffff, 0x00000800);
nvkm_mask(device, 0x122348, 0x0003ffff, 0x00000100);
nvkm_mask(device, 0x1223b0, 0x0003ffff, 0x00000fff);
nvkm_mask(device, 0x122348, 0x0003ffff, 0x00000200);
nvkm_mask(device, 0x122358, 0x0003ffff, 0x00002880);
}
return ret;
}

24
drivers/gpu/drm/nouveau/nvkm/subdev/ibus/gk20a.c
View File

@ -25,30 +25,32 @@
static void
gk20a_ibus_init_ibus_ring(struct nvkm_ibus *ibus)
{
nv_mask(ibus, 0x137250, 0x3f, 0);
struct nvkm_device *device = ibus->subdev.device;
nvkm_mask(device, 0x137250, 0x3f, 0);
nv_mask(ibus, 0x000200, 0x20, 0);
nvkm_mask(device, 0x000200, 0x20, 0);
usleep_range(20, 30);
nv_mask(ibus, 0x000200, 0x20, 0x20);
nvkm_mask(device, 0x000200, 0x20, 0x20);
nv_wr32(ibus, 0x12004c, 0x4);
nv_wr32(ibus, 0x122204, 0x2);
nv_rd32(ibus, 0x122204);
nvkm_wr32(device, 0x12004c, 0x4);
nvkm_wr32(device, 0x122204, 0x2);
nvkm_rd32(device, 0x122204);
/*
* Bug: increase clock timeout to avoid operation failure at high
* gpcclk rate.
*/
nv_wr32(ibus, 0x122354, 0x800);
nv_wr32(ibus, 0x128328, 0x800);
nv_wr32(ibus, 0x124320, 0x800);
nvkm_wr32(device, 0x122354, 0x800);
nvkm_wr32(device, 0x128328, 0x800);
nvkm_wr32(device, 0x124320, 0x800);
}
static void
gk20a_ibus_intr(struct nvkm_subdev *subdev)
{
struct nvkm_ibus *ibus = (void *)subdev;
u32 status0 = nv_rd32(ibus, 0x120058);
struct nvkm_device *device = ibus->subdev.device;
u32 status0 = nvkm_rd32(device, 0x120058);
if (status0 & 0x7) {
nv_debug(ibus, "resetting ibus ring\n");
@ -56,7 +58,7 @@ gk20a_ibus_intr(struct nvkm_subdev *subdev)
}
/* Acknowledge interrupt */
nv_mask(ibus, 0x12004c, 0x2, 0x2);
nvkm_mask(device, 0x12004c, 0x2, 0x2);
if (!nv_wait(subdev, 0x12004c, 0x3f, 0x00))
nv_warn(ibus, "timeout waiting for ringmaster ack\n");