MLK-19115-2: ASoC: fsl_spdif: add support for enabling raw capture mode
Since i.MX8 MQ SPDIF interface is able to capture raw data. Add support in SPDIF driver for this functionality. Signed-off-by: Viorel Suman <viorel.suman@nxp.com> (cherry picked from commit e13a302391f56a6bb547ff89e3fac73941cee429)5.4-rM2-2.2.x-imx-squashed
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83fbe12324
commit
fff54ed842
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@ -826,6 +826,39 @@ static int fsl_spdif_tx_vbit_put(struct snd_kcontrol *kcontrol,
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return 0;
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}
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static int fsl_spdif_rx_rcm_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
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struct fsl_spdif_priv *spdif_priv = snd_soc_dai_get_drvdata(cpu_dai);
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struct regmap *regmap = spdif_priv->regmap;
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u32 val;
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regmap_read(regmap, REG_SPDIF_SCR, &val);
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val = (val & SCR_RAW_CAPTURE_MODE) ? 1 : 0;
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ucontrol->value.integer.value[0] = val;
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return 0;
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}
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static int fsl_spdif_rx_rcm_put(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_dai *cpu_dai = snd_kcontrol_chip(kcontrol);
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struct fsl_spdif_priv *spdif_priv = snd_soc_dai_get_drvdata(cpu_dai);
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struct regmap *regmap = spdif_priv->regmap;
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u32 val = (ucontrol->value.integer.value[0] ? SCR_RAW_CAPTURE_MODE : 0);
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if (val)
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cpu_dai->driver->capture.formats |= SNDRV_PCM_FMTBIT_S32_LE;
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else
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cpu_dai->driver->capture.formats &= ~SNDRV_PCM_FMTBIT_S32_LE;
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regmap_update_bits(regmap, REG_SPDIF_SCR, SCR_RAW_CAPTURE_MODE, val);
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return 0;
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}
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/* DPLL lock information */
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static int fsl_spdif_rxrate_info(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_info *uinfo)
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@ -1007,6 +1040,16 @@ static struct snd_kcontrol_new fsl_spdif_ctrls[] = {
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.get = fsl_spdif_usync_get,
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.put = fsl_spdif_usync_put,
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},
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{
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.iface = SNDRV_CTL_ELEM_IFACE_PCM,
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.name = "IEC958 Rx Raw Capture Mode Bit",
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.access = SNDRV_CTL_ELEM_ACCESS_READ |
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SNDRV_CTL_ELEM_ACCESS_WRITE |
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SNDRV_CTL_ELEM_ACCESS_VOLATILE,
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.info = snd_ctl_boolean_mono_info,
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.get = fsl_spdif_rx_rcm_get,
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.put = fsl_spdif_rx_rcm_put,
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},
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};
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static int fsl_spdif_dai_probe(struct snd_soc_dai *dai)
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@ -63,6 +63,7 @@
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#define SCR_TXFIFO_FSEL_IF4 (0x1 << SCR_TXFIFO_FSEL_OFFSET)
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#define SCR_TXFIFO_FSEL_IF8 (0x2 << SCR_TXFIFO_FSEL_OFFSET)
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#define SCR_TXFIFO_FSEL_IF12 (0x3 << SCR_TXFIFO_FSEL_OFFSET)
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#define SCR_RAW_CAPTURE_MODE (1 << 14)
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#define SCR_LOW_POWER (1 << 13)
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#define SCR_SOFT_RESET (1 << 12)
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#define SCR_TXFIFO_CTRL_OFFSET 10
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