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205 Commits (redonkable)

Author SHA1 Message Date
Gabor Juhos 09f5100a59 watchdog: ath79_wdt: get register base from platform device's resources
The ath79_wdt driver uses a fixed memory address
currently. Although this is working with each
currently supported SoCs, but this may change
in the future. Additionally, the driver includes
platform specific header files in order to be
able to get the memory base of the watchdog
device.

The patch adds a memory resource to the platform
device, and converts the driver to get the base
address of the watchdog device from that.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
2013-03-01 12:22:38 +01:00
Gabor Juhos 0f2ad9ed7c MIPS: ath79: use dynamically allocated watchdog device
Remove the static watchdog device variable and use
the 'platform_device_register_simple' helper to
allocate and register the device in one step.

This allows us to save a few bytes in the kernel image.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
2013-03-01 12:22:29 +01:00
Ralf Baechle 8bfc245f9a Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next 2013-02-21 12:51:33 +01:00
Gabor Juhos 27ea052acb MIPS: ath79: add support for the Qualcomm Atheros AP136-010 board
Also enable the board in the default configuration.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4953/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:34 +01:00
Gabor Juhos 82c46840ae MIPS: ath79: add USB controller registration code for the QCA955X SoCs
Register platfom devices for the built-in USB
controllers of the SoCs.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4952/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:33 +01:00
Gabor Juhos 0a5f3b1c9f MIPS: ath79: add PCI controller registration code for the QCA955X SoCs
Add SoC specific PCI IRQ map, and register platform
devices for the two built-in PCIe RCs.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4951/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:32 +01:00
Gabor Juhos e9c0d0aaa3 MIPS: ath79: add WMAC registration code for the QCA955X SoCs
The SoC has a built-in wireless MAC. Register a platform
device for that to make it usable with the ath9k driver.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4956/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:30 +01:00
Gabor Juhos 13992303fa MIPS: ath79: register UART for the QCA955X SoCs
Similarly to the preceding SoCs, the QCA955X SoCs
also have a built-in NS16650 compatible UART.
Register the platform device for that to make
it usable.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4949/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:29 +01:00
Gabor Juhos 7d4c2af9bd MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear}
The ath79_device_reset_* are causing BUG when
those are used on the QCA955x SoCs. The patch
adds the required code to avoid that.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4948/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:27 +01:00
Gabor Juhos f818ca3e68 MIPS: ath79: add GPIO setup code for the QCA955X SoCs
The existing code can handle the GPIO controller of
the QCA955x SoCs. Add a minimal glue code to make it
working.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4947/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:26 +01:00
Gabor Juhos 53330332f1 MIPS: ath79: add IRQ handling code for the QCA955X SoCs
The IRQ routing in the QCA955x SoCs is slightly
different from the routing implemented in the
already supported SoCs.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4955/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:25 +01:00
Gabor Juhos 41583c05c1 MIPS: ath79: add clock setup code for the QCA955X SoCs
The patch adds code to get various clock frequencies
from the PLLs used in the QCA955x SoCs.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4945/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:25 +01:00
Gabor Juhos 2e6c91e392 MIPS: ath79: add SoC detection code for the QCA955X SoCs
Also add 'soc_is_qca955[68x]' helper functions
and a Kconfig symbol for the SoC family.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4943/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:24 +01:00
Gabor Juhos 9089877970 MIPS: ath79: add early printk support for the QCA955X SoCs
The patch allows to see kernel messages on the
QCA955X SoCs in early boot stage.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4944/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:24 +01:00
Gabor Juhos e3b25cead4 MIPS: ath79: fix WMAC IRQ resource assignment
The '.start' field of the IRQ resource assigned twice
in ar934x_wmac_setup(). The second assignment must
set the '.end' field. Fix it.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4954/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:23 +01:00
Gabor Juhos 90a938d1ad MIPS: ath79: use dynamically allocated USB platform devices
The current code uses static resources and static platform
device instances for the possible USB controllers in the
system. These static variables contains initial values which
leads to data segment pollution.

Remove the static variables and use dynamically allocated
structures instead.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4933/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:42 +01:00
Gabor Juhos fd633cf1cf ath79: remove ATH79_MISC_IRQ_* defines
Use the ATH79_MISC_IRQ() macro instead.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4930/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:42 +01:00
Gabor Juhos 7e69c10a8e ath79: add ATH79_CPU_IRQ() macro
Remove the individual ATH79_CPU_IRQ_* constants and
use the new macro instead of those.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4929/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:41 +01:00
Gabor Juhos 42cb60d1fa MIPS: pci-ar71xx: remove static PCI IO/MEM resources
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4927/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:40 +01:00
Gabor Juhos 12401fc28d MIPS: pci-ar724x: setup command register of the PCI controller
The command register of the PCI controller is
not initialized correctly by the bootloader on
some boards and this leads to non working PCI
bus.

Add code to initialize the command register
from the Linux code to avoid this.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4916/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:39 +01:00
Gabor Juhos 34b134aebd MIPS: pci-ar724x: remove static PCI IO/MEM resources
Static resources become impractical when multiple
PCI controllers are present. Move the resources
into the platform device registration code and
change the probe routine to get those from there
platform device's resources.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4914/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:39 +01:00
Gabor Juhos 617fed41e9 MIPS: ath79: allow to specify bus number in PCI IRQ maps
This is needed for multiple PCI bus support.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4913/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:38 +01:00
Gabor Juhos 6e783865b4 MIPS: ath79: remove unused ar7{1x,24}x_pcibios_init functions
The functions are unused now, so remove them.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4909/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:36 +01:00
Gabor Juhos 9fc1ca5b73 MIPS: ath79: register platform devices for the PCI controllers
The pci-ar71xx and pci-ar724x drivers were converted
into platform drivers. Register the corresponding
platform devices for the PCI controllers instead
of using the ar7{1x,24}x_pcibios_init functions.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4908/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:36 +01:00
Gabor Juhos 9c099c4e79 MIPS: ath79: simplify MISC IRQ handling
The current code uses multiple if statements for
demultiplexing the different interrupt sources.
Additionally, the MISC interrupt controller has
32 interrupt sources and the current code does not
handles all of them.

Get rid of the if statements and process all interrupt
sources in a loop to fix these issues.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4874/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:27 +01:00
Gabor Juhos f160a289e0 MIPS: ath79: simplify ath79_gpio_function_* routines
Make ath79_gpio_function_{en,dis}able to be wrappers
around ath79_gpio_function_setup.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4871/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:27 +01:00
Gabor Juhos 8838becdf5 MIPS: ath79: fix GPIO function selection for AR934x SoCs
GPIO function selection is not working on the AR934x
SoCs because the offset of the function selection
register is different on those.

Add a helper routine which returns the correct
register address based on the SoC type, and use
that in the 'ath79_gpio_function_*' routines.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4870/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:27 +01:00
Ralf Baechle 7034228792 MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:22 +01:00
Alan Stern c73cee717e USB: EHCI: remove ehci_port_power() routine
This patch (as1623) removes the ehci_port_power() routine and all the
places that call it.  There's no reason for ehci-hcd to change the
port power settings; the hub driver takes care of all that stuff.

There is one exception: When the controller is resumed from
hibernation or following a loss of power, the ports that are supposed
to be handed over to a companion controller must be powered on first.
Otherwise the handover won't work.  This process is not visible to the
hub driver, so it has to be handled in ehci-hcd.

Signed-off-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-10-31 12:48:07 -07:00
Gabor Juhos 97541ccfb9 MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLs
Besides the CPU and DDR PLLs, the CPU and DDR frequencies
can be derived from other PLLs in the SRIF block on the
AR934x SoCs. The current code does not checks if the SRIF
PLLs are used and this can lead to incorrectly calculated
CPU/DDR frequencies.

Fix it by calculating the frequencies from SRIF PLLs if
those are used on a given board.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: <stable@vger.kernel.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4324/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-01 11:37:15 +02:00
Gabor Juhos 65fc7f9957 MIPS: ath79: use correct fractional dividers for {CPU,DDR}_PLL on AR934x
The current dividers in the code are wrong and this
leads to broken CPU frequency calculation on boards
where the fractional part is used.

For example, if the SoC is running from a 40MHz
reference clock, refdiv=1, nint=14, outdiv=0 and
nfrac=31 the real frequency is 579.375MHz but the
current code calculates 569.687MHz instead.

Because the system time is indirectly related to
the CPU frequency the broken computation causes
drift in the system time.

The correct divider is 2^6 for the CPU PLL and 2^10
for the DDR PLL. Use the correct values to fix the
issue.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: stable@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4305/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-01 11:36:34 +02:00
Gabor Juhos a0aa4577ec MIPS: ath79: register USB host controller on the DB120 board
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4173/
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-28 12:29:57 +02:00
Gabor Juhos 00ffed582f MIPS: ath79: add USB platform setup code for AR934X
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4172/
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-28 12:29:57 +02:00
Gabor Juhos 8d3e03e186 MIPS: ath79: use a helper function for USB resource initialization
This improves code readability, and ensures that
all resource fields will be initialized correctly.
Additionally, it helps to reduce the size of the
kernel image by using uninitialized resource
variables.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4171/
Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-28 12:29:57 +02:00
Gabor Juhos 5fb234560e MIPS: ath79: Use correct IRQ number for the OHCI controller on AR7240
The currently assigned IRQ number to the OHCI controller is incorrect for
the AR7240 SoC, and that leads to the following error message from the
OHCI driver:

ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
ath79-ohci ath79-ohci: Atheros built-in OHCI controller
ath79-ohci ath79-ohci: new USB bus registered, assigned bus number 1
ath79-ohci ath79-ohci: irq 14, io mem 0x1b000000
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
usb 1-1: new full-speed USB device number 2 using ath79-ohci
ath79-ohci ath79-ohci: Unlink after no-IRQ?  Controller is probably using the wrong IRQ.

Fix this by using the correct IRQ number.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4168/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-17 10:57:27 +02:00
Gabor Juhos b4da14abf2 MIPS: ath79: Fix number of GPIO lines for AR724[12]
The AR724[12] SoCs have more GPIO lines than the AR7240.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Cc: linux-mips@linux-mips.org
Patchwork: https://http://patchwork.linux-mips.org/patch/4167/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-17 10:57:26 +02:00
Gabor Juhos 9598111f49 MIPS: ath79: add initial support for the Atheros DB120 board
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3517/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:11 +02:00
Gabor Juhos ec9502599c MIPS: ath79: add PCI registration code for AR934X
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3516/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:11 +02:00
Gabor Juhos 67644c547f MIPS: ath79: add PCI_AR724X Kconfig symbol
The AR724X specific PCI code can be used for the
AR934X SoCs, however it can be selected only if
SOC_AR724X is set.

Introduce a new Kconfig symbol in order to be able
to use the code for AR934X as well.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3514/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:11 +02:00
Gabor Juhos 574d6e70ea MIPS: ath79: add WMAC registration code for AR934X
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3513/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:10 +02:00
Gabor Juhos 9800bdc797 MIPS: ath79: register UART device for AR934X SoCs
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3512/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:10 +02:00
Gabor Juhos 42184768b3 MIPS: ath79: add AR934X specific glue to ath79_device_reset_{clear,set}
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3511/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:09 +02:00
Gabor Juhos fce5cc6e0d MIPS: ath79: add IRQ handling code for AR934X
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3510/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:09 +02:00
Gabor Juhos 4dbcbdf813 MIPS: ath79: rework IP2/IP3 interrupt handling
The current implementation assumes that flushing the
DDR writeback buffer is required for IP2/IP3 interrupts,
however this is not true for all SoCs.

Use SoC specific IP2/IP3 handlers instead of flushing
the buffers in the dispatcher code.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3509/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:08 +02:00
Gabor Juhos 5b5b544ed3 MIPS: ath79: add GPIO support code for AR934X
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3508/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:08 +02:00
Gabor Juhos 8889612b3e MIPS: ath79: add clock initialization code for AR934X
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3507/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:08 +02:00
Gabor Juhos d84114660a MIPS: ath79: add SoC detection code for AR934X
Also add 'soc_is_ar934[124x]' helper functions and a Kconfig
symbol for the AR934X SoCs.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3506/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:07 +02:00
Gabor Juhos 80a7ed81a8 MIPS: ath79: sort case statements in ath79_detect_sys_type
Sort the case statements alphabetically in order to improve
readability.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3505/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:07 +02:00
Gabor Juhos 703327ddcc MIPS: ath79: add early_printk support for AR934X
The patch allows to see kernel messages on AR934X SoCs in
early boot stage.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3504/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:07 +02:00
Gabor Juhos e9b62e8ef9 MIPS: ath79: update copyright headers of PCI related files
Add copyright records according to the recent changes in
the PCI code. Also fix up the descriptions.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3503/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:07 +02:00
Gabor Juhos 1f3a92de2a MIPS: ath79: register PCI controller on the PB44 board
The PB44 reference board has two miniPCI slots. Register
the PCI controller to make those usable.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3502/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:06 +02:00
Gabor Juhos 52c28be371 MIPS: ath79: remove ar724x_pci_add_data function
The variables set by this function are not used anymore.
Remove the function and the relevant variables as well.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3501/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:06 +02:00
Gabor Juhos d22ce25f87 MIPS: ath79: allow to use SoC specific PCI IRQ maps
The PCI controllers in the AR71XX and in the
AR724X SoCs are different, and both of them
uses different IRQ wiring.

The patch modifies the 'pcibios_map_irq' function
in order to allow to use different IRQ maps for
the different SoCs. The patch also adds a function,
which lets the board setup code to override the
default IRQ map.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3500/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:06 +02:00
Gabor Juhos f8365ec4e1 MIPS: ath79: add support for the PCI host controller of the AR71XX SoCs
The Atheros AR71XX SoCs have a built-in PCI Host Controller.
This patch adds a driver for that, and modifies the relevant
files in order to allow to register the PCI controller from
board specific setup.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3498/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:05 +02:00
Gabor Juhos a68ad4d892 MIPS: ath79: allow to use board specific pci_plat_dev_init functions
Th current implementation causes NULL pointer dereference
if 'pci_data' is not set:

pci 0000:00:00.0: BAR 0: assigned [mem 0x10000000-0x1000ffff 64bit]
pci 0000:00:00.0: BAR 0: set to [mem 0x10000000-0x1000ffff 64bit] (PCI
address [0x10000000-0x1000ffff])
CPU 0 Unable to handle kernel paging request at virtual address 00000000, epc == 802daca0, ra == 802e78a4
Oops[#1]:
Cpu 0
$ 0   : 00000000 80420000 00000000 00000000
$ 4   : 00000000 00000000 00000001 00000001
$ 8   : 00000001 0000032c 81c54700 00000001
$12   : 0000032d 0000000f 00000000 ffffffff
$16   : 81c14c00 00000001 802dac74 80195f98
$20   : 802ea050 00000000 00000000 00000000
$24   : 00000003 800617f0
$28   : 81c20000 81c21e70 00000000 802e78a4
Hi    : 00000000
Lo    : 4190ab00
epc   : 802daca0 0x802daca0
    Not tainted
ra    : 802e78a4 0x802e78a4
Status: 1000c003    KERNEL EXL IE
Cause : 00800008
BadVA : 00000000
PrId  : 00019374 (MIPS 24Kc)
Modules linked in:
Process swapper (pid: 1, threadinfo=81c20000, task=81c18000, tls=00000000)
Stack : 00000000 8027d5d8 802e8ae0 00000000 01000000 802e8b5c 81c50600 00000000
        802ff290 00000000 80420000 802ea0bc 00000000 00000000 80420000 802ff290
        80420000 80060930 33390000 00000000 00002308 80140a80 00000028 802d0000
        00000000 800ba024 802ff004 802ff0c8 802ff290 00000000 00000000 00000000
        00000000 802d897c 01234567 7f827068 00000000 0045f798 00460000 00000000

This can be avoided by calling the 'ar724x_pci_add_data'
function from the board specific setup code. However it
makes no sense to use that function for every board,
especially when the board does not needs to set the
platform_data field of any PCI device.

The patch allows the board setup code to specify a board
specific function if that is required.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3499/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:05 +02:00
Gabor Juhos 881b6ef0cc MIPS: ath79: get rid of some ifdefs in mach-ubnt-xm.c
Remove a superfluous ifdef around an include. Also
reorganize the board setup code a bit, so another
ifdef can be removed.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3497/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:04 +02:00
Gabor Juhos 4c07c7dfa0 MIPS: ath79: add PCI IRQ handling code for AR724X SoCs
The PCI Host Controller of the AR724x SoC has a
built-in IRQ controller. The current code does
not supports that, so the IRQ lines wired to this
controller are not usable. This leads to failed
'request_irq' calls:

  ath9k 0000:00:00.0: request_irq failed
  ath9k: probe of 0000:00:00.0 failed with error -89

This patch adds support for the IRQ controller
in order to make PCI IRQs work.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc:  linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3496/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:04 +02:00
Gabor Juhos 93ef85b559 MIPS: ath79: fix a wrong IRQ number
The Ubiquiti XM board setup code uses an invalid
IRQ number, because it if above of NR_IRQS. This
leads to failed 'request_irq' calls:

  ath9k 0000:00:00.0: request_irq failed
  ath9k: probe of 0000:00:00.0 failed with error -22

Preserve some IRQ numbers for the built-in IRQ
controller of PCI host controllers in the
AR71XX/AR724X SoCs, and use the correct IRQ
number in the board setup code.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3495/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:03 +02:00
Gabor Juhos d624bd3cf7 MIPS: ath79: replace ath724x to ar724x
Replace the 'ath724x' to 'ar724x' in function, variable and
structure names to reflect the name of the real SoC.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: René Bolldorf <xsecute@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3490/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:02 +02:00
Gabor Juhos 6335aef59c MIPS: ath79: add a common PCI registration function
The current code unconditionally registers the AR724X
specific PCI controller, even if the kernel is running
on a different SoC.

Add a common function for PCI controller registration,
and only register the AR724X PCI controller if the kernel
is running on an AR724X SoC.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3488/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:01 +02:00
Gabor Juhos 3a6208df8e MIPS: ath79: rename pci-ath724x.h
The declared function in this header file is used by the
ath79 platform code only. Move the header to the platform
directory.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: René Bolldorf <xsecute@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3486/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:01 +02:00
Gabor Juhos e2dbdc436b MIPS: ath79: separate common PCI code
The 'pcibios_map_irq' and 'pcibios_plat_dev_init'
are common functions and only instance one of them
can be present in a single kernel.

Currently these functions can be built only if the
CONFIG_SOC_AR724X option is selected. However the
ath79 platform contain support for the AR71XX SoCs,.
The AR71XX SoCs have a differnet PCI controller,
and those will require a different code.

Move the common PCI code into a separeate file in
order to be able to use that with other SoCs as
well.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: René Bolldorf <xsecute@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3485/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:00 +02:00
Thomas Meyer 97bf7a1900 MIPS: ath79: Use kmemdup rather than duplicating its implementation
The semantic patch that makes this change is available
in scripts/coccinelle/api/memdup.cocci.

Signed-off-by: Thomas Meyer <thomas@m3y3r.de>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3483/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:00 +02:00
Gabor Juhos de14ca6ae2 MIPS: ath79: fix AR933X WMAC reset code
The current code puts the built-in WMAC device of the
AR933X SoCs into reset instead of starting it. This
causes a hard lock on AR933X based boards when the
wireless driver tries to access the device.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: stable@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3484/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-04-27 15:18:30 +01:00
Hauke Mehrtens 5d98cd4e1d USB: use generic platform driver on ath79
The ath79 usb driver doesn't do anything special and is now converted
to the generic ehci and ohci driver.
This was tested on a TP-Link TL-WR1043ND (AR9132)

Acked-by: Gabor Juhos <juhosg@openwrt.org>
CC: Imre Kaloz <kaloz@openwrt.org>
CC: linux-mips@linux-mips.org
CC: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-03-15 12:45:43 -07:00
Gabor Juhos 87b43457f8 MIPS: ATH79: Avoid a kernel bug on AR913X
Wireless mac registration causes a BUG on AR913X SoCs due to
a missing 'else'.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3182/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-02-20 18:33:19 +01:00
Ralf Baechle 7bf6612e8a Merge branches 'next/ar7', 'next/ath79', 'next/bcm63xx', 'next/bmips', 'next/cavium', 'next/generic', 'next/kprobes', 'next/lantiq', 'next/perf' and 'next/raza' into mips-for-linux-next 2012-01-11 15:42:31 +01:00
Gabor Juhos b606d5ae90 MIPS: ath79: Rename dev-ar913x-wmac.c to dev-wmac.c
Rename the file as a last step of the 'ar913x' removal changes.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3034/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:48 +00:00
Gabor Juhos 009b9d52e5 MIPS: ath79: Rename dev-ar913x-wmac.h to dev-wmac.h
The 'ar913x' part was removed from the common variable and function names,
so remove that from the relevant header file name as well.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3033/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:48 +00:00
Gabor Juhos 0b0db270b8 MIPS: ath79: Register the wireless MAC device on the AP121 board
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3032/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:48 +00:00
Gabor Juhos 3ae4002231 MIPS: ath79: Rename ATH79_DEV_AR913X_WMAC option to ATH79_DEV_WMAC
The ATH79_DEV_AR913X_WMAC option was used to select the AR913x specific
wireless MAC registration code.  The registration code now supports the
AR933X SoCs as well. Rename the option to reflect the changes.

Also make the new option depends on SOC_AR933X.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3031/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:48 +00:00
Gabor Juhos 34cfcd26bd MIPS: ath79: Add AR933x specific WMAC setup code
The wireless MAC of the AR933x SoCs uses different base address, and
requires different setup code.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3030/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:48 +00:00
Gabor Juhos 6903bb49da MIPS: ath79: Separate AR913x SoC specific WMAC setup code
The device registration code can be shared between the different SoCs, but
the required setup code varies Move AR913x specific setup code into a
separate function in order to make adding support for another SoCs easier.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3029/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:47 +00:00
Gabor Juhos 67b0f0f1b3 MIPS: ath79: Remove 'ar913x' from common variable and function names
The wireless MAC specific variables and the registration code can be shared
between multiple SoCs. Remove the 'ar913x' part from the function and
variable names to avoid confusions.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3028/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:47 +00:00
Gabor Juhos be5f362320 MIPS: ath79: Store the SoC revision in a global variable
Knowing the exact revision of the SoC is required to make runtime decisions
in various code paths.  We have determined the SoC revision already, so we
only need to store that in a global variable.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3027/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:47 +00:00
Rene Bolldorf 2dc7b4a197 Initial support for the Ubiquiti Networks XM board (rev 1.0).
Signed-off-by: Rene Bolldorf <xsecute@googlemail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/3020/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:47 +00:00
Gabor Juhos 7e0dde175e MIPS: ath79: Add initial support for the Atheros AP121 reference board
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2531/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:47 +00:00
Gabor Juhos 13051c5cc3 MIPS: ath79: register UART device for the AR933X SoCs
The AR933X SoCs does not have a 8250 compatible UART, they
are using a different UART core. Register a different platform
device for the different UART.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2528/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:46 +00:00
Gabor Juhos c279b77596 MIPS: ath79: add AR933X specific USB platform device registration
Also select the USB_ARCH_HAS_EHCI symbol in order to make the
EHCI driver available.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2527/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:46 +00:00
Gabor Juhos 2c048303d6 MIPS: ath79: Add config symbol for the AR933X SoCs
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2525/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:46 +00:00
Gabor Juhos fdfbcf4705 MIPS: ath79: add AR933X specific GPIO initialization
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2524/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:46 +00:00
Gabor Juhos 54eed4c77c MIPS: ath79: Add AR933X specific IRQ initialization
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2530/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:45 +00:00
Gabor Juhos 7ee15d8a28 MIPS: ath79: Add AR933X specific glue for ath79_device_reset_{set,clear}
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2523/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:45 +00:00
Gabor Juhos 04225e1d22 MIPS: ath79: add AR933X specific clock init
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2522/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:45 +00:00
Gabor Juhos 0bd3acdf7d MIPS: ath79: Add early printk support for the AR933X SoCs
The AR933X SoCs are using a different UART, thus require
different code for early printk support.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2521/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:45 +00:00
Gabor Juhos 6d1c8fde2d MIPS: ath79: add revision id for the AR933X SoCs
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2538/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:45 +00:00
Gabor Juhos 8bed1288d4 MIPS: ath79: Remove superfluous parentheses
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2519/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:44 +00:00
Gabor Juhos 7e98aa4639 MIPS: ath79: add common USB Host Controller device
Add common platform_device and helper code to make the registration of
the built-in USB controllers easier on the board which are using them.
Also register the USB controller on the AP81 and PB44 boards.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2442/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:44 +00:00
Gabor Juhos d2b4ac1e5d MIPS: ath79: Handle more MISC IRQs
The AR724X SoCs have more IRQ sources hooked into the MISC IRQ controller.
The patch adds support for them.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2440/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:44 +00:00
Ralf Baechle ab75dc02c1 MIPS: Fix up inconsistency in panic() string argument.
Panic() invokes printk() to add a \n internally, so panic arguments should
not themselves end in \n.  Panic invocations in arch/mips and elsewhere
are inconsistently sometimes terminating in \n, sometimes not.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:01:45 +00:00
Gabor Juhos 90e6ca5cda USB: ohci: add bus glue for the Atheros AR71XX/AR7240 SoCs
The Atheros AR71XX/AR7240 SoCs have a built-in OHCI controller.
This patch adds the necessary glue code to make the generic OHCI
driver usable for them.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-04-13 16:58:19 -07:00
Gabor Juhos 502fa84195 USB: ehci: add bus glue for the Atheros AR71XX/AR724X/AR91XX SoCs
The Atheros AR71XX/AR91XX SoCs have a built-in EHCI controller.
This patch adds the necessary glue code to make the generic EHCI
driver usable for them.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-04-13 16:57:44 -07:00
Thomas Gleixner e4ec7989b4 MIPS: Convert the irq functions to the new names
Scripted with coccinelle.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29 14:48:07 +02:00
Thomas Gleixner 3fb8818bd2 MIPS: ath79: Convert to new irq_chip functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2175/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-25 18:45:15 +01:00
Ralf Baechle f9b08d9c60 MIPS: Remove useless initialization.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-25 18:45:13 +01:00
Gabor Juhos f5b35d0b16 MIPS: ath79: add common WMAC device for AR913X based boards
Add common platform_device and helper code to make the registration
of the built-in wireless MAC easier on the Atheros AR9130/AR9132
based boards. Also register the WMAC device on the AR81 board.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Imre Kaloz <kaloz@openwrt.org>,
Cc: Luis R. Rodriguez <lrodriguez@atheros.com>
Cc: Cliff Holden <Cliff.Holden@Atheros.com>
Cc: Kathy Giori <Kathy.Giori@Atheros.com>
Patchwork: https://patchwork.linux-mips.org/patch/1962/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-01-18 19:30:28 +01:00
Gabor Juhos aa6695ec8b MIPS: ath79: Add initial support for the Atheros AP81 reference board
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez <lrodriguez@atheros.com>
Cc: Cliff Holden <Cliff.Holden@Atheros.com>
Cc: Kathy Giori <Kathy.Giori@Atheros.com>
Patchwork: https://patchwork.linux-mips.org/patch/1952/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-01-18 19:30:27 +01:00
Gabor Juhos 68a1d31636 MIPS: ath79: add common SPI controller device
Several boards are using the built-in SPI controller of the
AR71XX/AR724X/AR913X SoCs. This patch adds common platform_device
and helper code to register it. Additionally, the patch registers
the SPI bus on the PB44 board.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Luis R. Rodriguez <lrodriguez@atheros.com>
Cc: Cliff Holden <Cliff.Holden@Atheros.com>
Cc: Kathy Giori <Kathy.Giori@Atheros.com>
Patchwork: https://patchwork.linux-mips.org/patch/1956/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-01-18 19:30:27 +01:00
Gabor Juhos 3f348c5d1a MIPS: ath79: add common GPIO buttons device
Almost all boards have one or more push buttons connected to GPIO lines.
This patch adds common code to register a platform_device for them.

The patch also adds support for the buttons on the PB44 board.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez <lrodriguez@atheros.com>
Cc: Cliff Holden <Cliff.Holden@Atheros.com>
Cc: Kathy Giori <Kathy.Giori@Atheros.com>
Patchwork: https://patchwork.linux-mips.org/patch/1954/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-01-18 19:30:27 +01:00
Gabor Juhos 858f763c1c MIPS: ath79: add common watchdog device
All supported SoCs have a built-in hardware watchdog driver. This patch
registers a platform_device for that to make it usable.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez <lrodriguez@atheros.com>
Cc: Cliff Holden <Cliff.Holden@Atheros.com>
Cc: Kathy Giori <Kathy.Giori@Atheros.com>
Patchwork: https://patchwork.linux-mips.org/patch/1955/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-01-18 19:30:26 +01:00
Gabor Juhos d8fec1fc80 MIPS: ath79: add common GPIO LEDs device
Almost all boards have one or more LEDs connected to GPIO lines. This
patch adds common code to register a platform_device for them.

The patch also adds support for the LEDs on the PB44 board.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez <lrodriguez@atheros.com>
Cc: Cliff Holden <Cliff.Holden@Atheros.com>
Cc: Kathy Giori <Kathy.Giori@Atheros.com>
Patchwork: https://patchwork.linux-mips.org/patch/1953/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-01-18 19:30:26 +01:00
Gabor Juhos 0cde72284c MIPS: ath79: add initial support for the Atheros PB44 reference board
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez <lrodriguez@atheros.com>
Cc: Cliff Holden <Cliff.Holden@Atheros.com>
Cc: Kathy Giori <Kathy.Giori@Atheros.com>
Patchwork: https://patchwork.linux-mips.org/patch/1950/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-01-18 19:30:26 +01:00
Gabor Juhos 0aabf1a4d9 MIPS: ath79: utilize the MIPS multi-machine support
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez <lrodriguez@atheros.com>
Cc: Cliff Holden <Cliff.Holden@Atheros.com>
Cc: Kathy Giori <Kathy.Giori@Atheros.com>
Patchwork: https://patchwork.linux-mips.org/patch/1949/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-01-18 19:30:25 +01:00
Gabor Juhos 6eae43c57e MIPS: ath79: add GPIOLIB support
This patch implements generic GPIO routines for the built-in
GPIO controllers of the Atheros AR71XX/AR724X/AR913X SoCs.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez <lrodriguez@atheros.com>
Cc: Cliff Holden <Cliff.Holden@Atheros.com>
Cc: Kathy Giori <Kathy.Giori@Atheros.com>
Patchwork: https://patchwork.linux-mips.org/patch/1948/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-01-18 19:30:25 +01:00
Gabor Juhos d4a67d9dc8 MIPS: Add initial support for the Atheros AR71XX/AR724X/AR931X SoCs
This patch adds initial support for various Atheros SoCs based on the
MIPS 24Kc core. The following models are supported at the moment:

  - AR7130
  - AR7141
  - AR7161
  - AR9130
  - AR9132
  - AR7240
  - AR7241
  - AR7242

The current patch contains minimal support only, but the resulting
kernel can boot into user-space with using of an initramfs image on
various boards which are using these SoCs. Support for more built-in
devices and individual boards will be implemented in further patches.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez <lrodriguez@atheros.com>
Cc: Cliff Holden <Cliff.Holden@Atheros.com>
Cc: Kathy Giori <Kathy.Giori@Atheros.com>
Patchwork: https://patchwork.linux-mips.org/patch/1947/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-01-18 19:30:24 +01:00