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5 Commits (redonkable)

Author SHA1 Message Date
Lori Hikichi becf123772 clk: iproc: Allow iproc pll to runtime calculate vco parameters
Add the ability for the iproc pll to calculate the pll parameters at
runtime instead of only using predefined tables. This ability allows
the clock users to select from the full range of vco frequencies.
The old method of table based programming is retained so that existing
users will retain expected behavior. The flag IPROC_CLK_PLL_CALC_PARAM
will need to be set to enable the new runtime calculation method.
Currently, this is only being enabled for the audio pll.

This feature also revealed a problem with the driver using the
round_rate api.  The round_rate api does not allow for frequencies larger
than 2^31 to be returned.  Those large frequencies are interpreted as an
error code. Therefore, we are moving to the determine_rate api which
solves this problem.

Signed-off-by: Simran Rai <ssimran@broadcom.com>
Signed-off-by: Lori Hikichi <lori.hikichi@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-28 14:53:33 -08:00
Simran Rai bcd8be1398 clk: iproc: Add support for Cygnus audio clocks
This patch adds support for Broadcom Cygnus audio PLL and leaf
clocks

Signed-off-by: Simran Rai <ssimran@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-01-29 16:31:38 -08:00
Jon Mason f713c6bf32 clk: iproc: Split off dig_filter
The PLL loop filter/gain can be located in a separate register on some
SoCs.  Split these off into a separate variable, so that an offset can
be added if necessary.  Also, make the necessary modifications to the
Cygnus and NSP drivers for this change.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-10-21 17:02:57 -07:00
Jon Mason 2dfc8a27ec clk: cygnus: Convert all macros to all caps
The macros that are being used to initialize the values of the clk
structures should be all caps.  Find and replace all of them with their
relevant counterparts.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-10-21 16:53:10 -07:00
Ray Jui 61ca7b0c7f clk: cygnus: add clock support for Broadcom Cygnus
The Broadcom Cygnus SoC is architected under the iProc architecture. It
has the following PLLs: ARMPLL, GENPLL, LCPLL0, MIPIPLL, all dervied
from an onboard crystal. Cygnus also has various ASIU clocks that are
derived directly from the onboard crystal.

Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-06-18 12:36:39 -07:00