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6 Commits (redonkable)

Author SHA1 Message Date
Thomas Gleixner 9c92ab6191 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282
Based on 1 normalized pattern(s):

  this software is licensed under the terms of the gnu general public
  license version 2 as published by the free software foundation and
  may be copied distributed and modified under those terms this
  program is distributed in the hope that it will be useful but
  without any warranty without even the implied warranty of
  merchantability or fitness for a particular purpose see the gnu
  general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 285 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.642774971@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:36:37 +02:00
Jeffrey Hugo 760be6586f clk: qcom: Make common clk_hw registrations
Several clock controller drivers define a list of clk_hw devices, and then
register those devices in probe() before using common code to process the
rest of initialization.  Extend the common code to accept a list of clk_hw
devices to process, thus eliminating many duplicate implementations.

Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
Suggested-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Tested-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-22 00:06:57 -08:00
Jerome Brunet 04cdd5af51 clk: qcom: drop CLK_SET_RATE_GATE from sdc clocks
the mmci driver (drivers/mmc/host/mmci.c) does the following sequence:
* clk_prepare_enable()
* clk_set_rate()

on SDCx_clk which is a children of SDCx_src. SDCx_src has
CLK_SET_RATE_GATE so this sequence should not be allowed but this was not
enforced. IOW, the flag is ignored. Dropping the flag won't change
anything to the current behaviour of the platform.

CLK_SET_RATE_GATE is being fixed and enforced now. If the flag was kept,
the mmci driver would receive -EBUSY when calling clk_set_rate()

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20180619134051.16726-2-jbrunet@baylibre.com
2018-06-19 10:02:28 -07:00
Zoran Markovic 8e18d06589 clk: mdm9615: Add EBI2 clock
Add definition of EBI2 clock used by MDM9615 NAND controller.

Cc: Andy Gross <andy.gross@linaro.org>
Cc: David Brown <david.brown@linaro.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-soc@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Zoran Markovic <zmarkovic@sierrawireless.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
[sboyd@codeaurora.org: ebi2_clk halt bit is 24 not 23]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-09 16:33:26 -08:00
Stephen Boyd 120c155283 clk: qcom: Migrate to clk_hw based registration and OF APIs
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers in this driver, allowing us to
move closer to a clear split of consumer and provider clk APIs.

Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-08-24 17:37:06 -07:00
Neil Armstrong 7792a8d671 clk: mdm9615: Add support for MDM9615 Clock Controllers
In order to support the Qualcomm MDM9615 SoC, add support for
the Global and LPASS Clock Controllers.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-08-15 15:51:21 -07:00