Keep the internal framework, just use the UDC driver from
upstream version which supports multiple TD.
Reviewed-by: Jun Li <jun.li@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
Add Cadence USB3 IP driver, this is the 1st version for this driver,
so wrapper layer and PHY layer are still IP core file (core.c).
Below functions are supported:
- Basic host function
- Limited gadget function, only ACM (old g_seiral) are supported, and
mass_storage support is not very well.
- Role switch between host and device through extcon design
(Eg, Type-C application NXP PTN5150).
Below functions are missing:
- Multi-queue support at gadget function, without this feature, many
gadget function are missing.
- Low power mode support, including system PM and runtime PM
- Wakeup support
Signed-off-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit ef808bfac1ca34311d5dd49e847b5e45a69e75ee)
Upstream version is an initial version, it can't be used directly.
We will use downstream version for v5.4 instead.
Signed-off-by: Peter Chen <peter.chen@nxp.com>
This patch introduce new Cadence USBSS DRD driver to Linux kernel.
The Cadence USBSS DRD Controller is a highly configurable IP Core which
can be instantiated as Dual-Role Device (DRD), Peripheral Only and
Host Only (XHCI)configurations.
The current driver has been validated with FPGA platform. We have
support for PCIe bus, which is used on FPGA prototyping.
The host side of USBSS-DRD controller is compliant with XHCI
specification, so it works with standard XHCI Linux driver.
Signed-off-by: Pawel Laszczak <pawell@cadence.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Peter Chen