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3 Commits (redonkable)

Author SHA1 Message Date
Shengjiu Wang 7cdd916faa MLK-23906-2: ASoC: fsl_aud2htx: Switch to imx-pcm-dma-v2
With imx-pcm-dma, the dma channel is created in probe, when
there is power domain attached with dma device, the power
domain will be enabled when channel is created, then the
power of the domain will be always enabled from beginning.

So switch to imx-pcm-dma-v2, then the dma channel will be
created when playback or capture really started.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-05-07 17:17:42 +08:00
Shengjiu Wang 4ac1cd1136 MLK-23906-1: ASoC: fsl_aud2htx: Don't bind clock with regmap
The call flow:
devm_regmap_init_mmio_clk
   - clk_prepare()
      - clk_pm_runtime_get()

Cause the power domain of bus clock always be enabled.
which impact the power consumption.

So we can't bind clock with regmap, then explicitly enable
clock when using.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-05-07 17:17:27 +08:00
Shengjiu Wang 7fcdf7d7e3 MLK-23287-1: ASoC: fsl_aud2htx: Add aud2htx module driver
The AUD2HTX is a digital module that provides a bridge between
the Audio Subsystem and the HDMI RTX Subsystem. This module
includes intermediate storage to queue SDMA transactions prior
to being synchronized and passed to the HDMI RTX Subsystem over
the Audio Link.

The AUD2HTX contains a DMA request routed to the SDMA module.
This DMA request is controlled based on the watermark level in
the 32-entry sample buffer.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
2020-02-11 18:07:02 +08:00