Commit graph

2 commits

Author SHA1 Message Date
Nishanth Menon cafc8cb5b9 ARM: OMAP: DRA7: powerdomain data: fix powerdomain powerstate
DRA7 supports only CSWR for CPU, MPU power domains. Core power domain
supports upto INA.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2014-09-08 11:22:31 -05:00
Ambresh K 97dd16b190 ARM: OMAP: DRA7: powerdomain: Add DRA7XX data and update header
Add the data file to describe all power domains inside the DRA7XX SoC.

Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: added generation notation to comments]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23 04:28:36 -06:00