Commit graph

62 commits

Author SHA1 Message Date
Ben Skeggs e432d48f87 drm/nvd0: lets not attempt to dereference a nv50_display pointer
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:08:02 +10:00
Ben Skeggs 1575b3646c drm/nouveau: fixup init/fini sequence to deal with no CRTCs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:05:09 +10:00
Ben Skeggs 2e9733ff7d drm/nvd0: add a card_type for 0xdX chipsets
These are different enough from 0xcX to justify it, half fermi, half
kepler(??)..

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:04:45 +10:00
Ben Skeggs 9a11dd6587 drm/nouveau: fix off-by-one
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 16:04:53 +10:00
Ben Skeggs bf08bcc6b7 drm/nouveau: fix null pointer deref on pre-nv50 chipsets
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 16:04:03 +10:00
Ben Skeggs 5de8037ab4 drm/nvc0: enable per-client address spaces
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 16:01:41 +10:00
Ben Skeggs 3d483d575b drm/nvc0: explicitly map PDISP semaphore buffer into each channel's vm
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 16:00:27 +10:00
Ben Skeggs 180cc30637 drm/nouveau: convert bo.mem.start usage to bo.offset
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 15:59:44 +10:00
Ben Skeggs 6e32fedc8b drm/nouveau: will need to specify channel for vm-ful gpuobj allocations
Abuses existing gpuobj_new() chan argument for this, which in turn forces
all NVOBJ_FLAG_VM allocations to be done from the global heap, not
suballocated from the channel's private heap.  Not a problem though in
practise.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 15:59:18 +10:00
Ben Skeggs b7cb6c01ee drm/nouveau: modify gpuobj/ntfy takedown ordering
gpuobj really needs splitting into channel/gpuobj code instead...

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 15:59:07 +10:00
Ben Skeggs 0320d7910b drm/nv50-nvc0/chan: inherit vm from fpriv, rather than chan_vm directly
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 15:58:52 +10:00
Ben Skeggs e8a863c10f drm/nouveau: store a per-client channel list
Removes the need to disable IRQs to lookup channel struct on every pushbuf
ioctl, among others.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-06-23 15:58:25 +10:00
Ben Skeggs a82dd49f14 drm/nouveau: remove remnants of nouveau_pgraph_engine
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:45 +10:00
Ben Skeggs 2703c21a82 drm/nv50/gr: move to exec engine interfaces
This needs a massive cleanup, but to catch bugs from the interface changes
vs the engine code cleanup, this will be done later.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:06 +10:00
Ben Skeggs 6dfdd7a61e drm/nouveau: working towards a common way to represent engines
There's lots of more-or-less independant engines present on NVIDIA GPUs
these days, and we generally want to perform the same operations on them.
Implementing new ones requires hooking into lots of different places,
the aim of this work is to make this simpler and cleaner.

NV84:NV98 PCRYPT moved over as a test.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:48:01 +10:00
Ben Skeggs 4ea52f8974 drm/nouveau: move engine object creation into per-engine hooks
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-05-16 10:47:52 +10:00
Ben Skeggs 04eb34a43c drm/nouveau: split ramin_lock into two locks, one hardirq safe
Fixes a possible lock ordering reversal between context_switch_lock
and ramin_lock.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2011-04-20 08:50:14 +10:00
Ben Skeggs cdccc70eff drm/nv50-nvc0: initialise display sync channels
Also imports a couple of helper functions that'll be used to implement
page flipping in the following commits..

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-02-25 06:45:11 +10:00
Ben Skeggs 58e6c7a918 drm/nouveau: introduce new gart type, and name _SGDMA more appropriately
In preparation for the addition of a new nv40 backend, we'll need to be
able to distinguish between a paged dma object and the on-chip GART.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-02-25 06:30:15 +10:00
Daniel Vetter 31a5b8ce8f drm/nouveau: don't munge in drm_mm internals
Nouveau was checking drm_mm internals on teardown to see whether the
memory manager was initialized. Hide these internals in a small
inline helper function.

Acked-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-23 10:18:20 +10:00
Ben Skeggs e457acaed4 drm/nouveau: create grctx on the fly on all chipsets
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-01-07 14:03:58 +10:00
Ben Skeggs effd6e066f drm/nvc0: implement channel structure initialisation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-21 17:17:28 +10:00
Ben Skeggs 7460d70355 drm/nvc0: gpuobj_new need only check validity and init the relevant engine
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-21 17:17:26 +10:00
Francisco Jerez fd70b6cd78 drm/nv04-nv40: Fix up PCI(E) GART DMA object bus address calculation.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 15:53:04 +10:00
Ben Skeggs b571fe21f5 drm/nv50: tidy up PCIEGART implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 13:48:17 +10:00
Ben Skeggs 4c13614298 drm/nv50: implement global channel address space on new VM code
As of this commit, it's guaranteed that if an object is in VRAM that its
GPU virtual address will be constant.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 13:48:13 +10:00
Ben Skeggs a11c3198c9 drm/nv50: import new vm code
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 13:48:10 +10:00
Ben Skeggs a0fd9b9f68 drm/nouveau: no need to zero dma objects, we fill them completely anyway
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 03:00:37 +01:00
Ben Skeggs ceac30999d drm/nouveau: implicitly insert non-DMA objects into RAMHT
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 03:00:35 +01:00
Francisco Jerez 6dccd311dd drm/nouveau: Synchronize with the user channel before GPU object destruction.
There have been reports of PFIFO cache errors during context take down
(fdo bug 31637). They are caused by some GPU objects being taken out
while the channel is still potentially processing commands. Make sure
that all the previous rendering has landed before releasing a GPU
object.

Reported-by: Grzesiek Sójka <pld@pfu.pl>
Reported-by: Patrice Mandin <patmandin@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Acked-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 03:00:23 +01:00
Francisco Jerez ca130c2267 drm/nv04-nv40: Give "gpuobj->cinst" the same meaning as on nv50.
No functional changes, just simplify some code paths a bit.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-08 03:00:09 +01:00
Ben Skeggs 7f4a195fcb drm/nouveau: tidy up and extend dma object creation interfaces
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:59 +10:00
Ben Skeggs e41115d0ad drm/nouveau: rework gpu-specific instmem interfaces
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:48 +10:00
Ben Skeggs dc1e5c0dbf drm/nouveau: simplify gpuobj suspend/resume
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:47 +10:00
Ben Skeggs 274fec93cd drm/nouveau: tidy+move PGRAPH ISRs to their respective *_graph.c files
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:41 +10:00
Ben Skeggs f4512e6579 drm/nv50: create graph and crypt contexts on demand
This really needs cleaning up somehow, and probably investigate what's
needed to do this on earlier generations.  NVIDIA do something similar
there too.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:10:44 +10:00
Ben Skeggs bd2e597de8 drm/nv84: add support for the PCRYPT engine
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:06:58 +10:00
Ben Skeggs b8c157d3a9 drm/nouveau: only expose the object classes that are supported by the chipset
We previously added all the available classes for the entire generation,
even though the objects wouldn't work on the hardware.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:06:56 +10:00
Ben Skeggs a6a1a38075 drm/nouveau: use object class structs more extensively
The structs themselves, as well as the non-sw object creation function are
probably very misnamed now.  That's a problem for later :)

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:06:54 +10:00
Ben Skeggs 50536946fa drm/nouveau: store engine type in gpuobj class structs
We will eventually want to address hw engines other than PGRAPH.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:06:52 +10:00
Ben Skeggs 9100468d1b drm/nouveau: pass gpuobj alignment request down into backing allocator
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:06:51 +10:00
Ben Skeggs 18a16a768c drm/nouveau: return error from nouveau_ramht_remove() if not found
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:05:27 +10:00
Ben Skeggs cff5c13324 drm/nouveau: add more fine-grained locking to channel list + structures
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:05:18 +10:00
Francisco Jerez dd661e5f4e drm/nouveau: Return error from nouveau_gpuobj_new if we're out of RAMIN.
Reported-by: Tomas Miljenovic <tomasmiljenovic@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-11-18 14:38:54 +10:00
Ben Skeggs 185abeccab drm/nouveau: remove nouveau_gpuobj_late_takedown
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24 16:23:46 +10:00
Ben Skeggs e05d7eaeba drm/nouveau: protect gpuobj list + global instmem heap with spinlock
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24 16:23:41 +10:00
Ben Skeggs eb9bcbdc45 drm/nouveau: fix gpuobj refcount to use atomics
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24 16:23:34 +10:00
Ben Skeggs e05c5a317e drm/nouveau: tidy ram{ht,fc,ro} a bit
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24 16:23:22 +10:00
Ben Skeggs fbd2895e45 drm/nouveau: rework init ordering so nv50_instmem.c can be less bad
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24 16:22:42 +10:00
Ben Skeggs 5125bfd886 drm/nv50: allow gpuobjs that aren't mapped into aperture
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24 16:20:28 +10:00