Commit graph

6 commits

Author SHA1 Message Date
Martin Peres f3f2f54e11 drm/nv04/pm: recalibrate timer on nvclk changes
Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:04:42 +10:00
Francisco Jerez 63d6fd3288 drm/nv10-nv20: Fix instability after MPLL changes.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-11-18 14:38:47 +10:00
Ben Skeggs 5c6dc65754 drm/nouveau: pass perflvl struct to clock_pre()
On certain boards, there's BIOS scripts and memory timings that need to
be modified with the memclk.  Just pass in the entire perflvl struct and
let the chipset-specific code decide what to do.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-10-05 09:57:41 +10:00
Francisco Jerez 5c4abd09bd drm/nouveau: Misc cleanup of the PM code.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24 16:29:41 +10:00
Ben Skeggs 6f876986be drm/nouveau: allow static performance level setting
Guarded by a module parameter for the moment, read the code for the
magic value which enables it.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24 16:27:20 +10:00
Ben Skeggs 442b626ece drm/nv04-nv40: import initial pm backend
Currently just hooked up to the already-existing nouveau_hw, which should
handle all relevant chipsets as well as we currently can.

This will likely be eventually split out and improved into chipset specific
code at a later point.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-09-24 16:27:13 +10:00