Many portions of Tegra ASoC machine drivers will be similar or identical.
To avoid cut/paste, this file will act as a repository for all that common
code. For now, it solely includes code to reprogram the audio PLL for
44.1KHz- vs. 48KHz-based sample rates.
Signed-Off-By: Stephen Warren <swarren@nvidia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This provides an ASoC DAI interface for Tegra's I2S controller.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This provides an ASoC platform driver that manages Tegra's APB DMA
controller.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
The DAS (Digital Audio Switch) is a mux/crossbar which sits between
the DACs (Digital Audio Controllers) and the DAPs (Digital Audio
Ports). Audio data may be routed between DACs and DAPs in various
combinations as required by board design/application.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
