Commit graph

5 commits

Author SHA1 Message Date
Paul Mackerras ff2e6d7e27 powerpc: Fix goof in 6xx and POWER4 idle power-save functions
This fixes a mistake I made when editing these functions - when I
took out the interrupt disabling code (because interrupts are now
disabled by the caller) I left the register that is used for the MSR
value to be used during doze/nap uninitialized.  This fixes it.

Also updated some of the comments in idle_power4.S and removed some
code that was copied over from idle_6xx.S but is no longer relevant
(we don't ever clear the CPU_FTR_CAN_NAP bit at runtime for POWER4).

Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-03-28 09:28:14 +11:00
Paul Mackerras a0652fc9a2 powerpc: Unify the 32 and 64 bit idle loops
This unifies the 32-bit (ARCH=ppc and ARCH=powerpc) and 64-bit idle
loops.  It brings over the concept of having a ppc_md.power_save
function from 32-bit to ARCH=powerpc, which lets us get rid of
native_idle().  With this we will also be able to simplify the idle
handling for pSeries and cell.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-03-27 15:03:03 +11:00
David Gibson e58c3495e6 [PATCH] powerpc: Cleanup LOADADDR etc. asm macros
This patch consolidates the variety of macros used for loading 32 or
64-bit constants in assembler (LOADADDR, LOADBASE, SET_REG_TO_*).  The
idea is to make the set of macros consistent across 32 and 64 bit and
to make it more obvious which is the appropriate one to use in a given
situation.  The new macros and their semantics are described in the
comments in ppc_asm.h.

In the process, we change several places that were unnecessarily using
immediate loads on ppc64 to use the GOT/TOC.  Likewise we cleanup a
couple of places where we were clumsily subtracting PAGE_OFFSET with
asm instructions to use assemble-time arithmetic or the toreal() macro
instead.

Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-01-13 21:16:23 +11:00
David Gibson 61f684ec07 [PATCH] powerpc: Fix use of LOADBASE in merge tree
The merge-tree version of LOADBASE actually loads the whole given
address from the toc for ppc64.  The matching OFF macro adjust for
this, using an offset of 0 for ppc64, but we weren't using that in
power4_idle.

Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-10-17 21:43:12 +10:00
Stephen Rothwell dc1c1ca3dc powerpc: merge idle_power4.S and trapc.s
Use idle_power4.S from ppc64 as we are not going to support
32 bit power4 in the merged tree.

Merge ppc64 traps.c into powerpc traps.c:
	use ppc64 versions of exception routine names
		(as they don't have StudlyCaps)
	make all the versions if die() have the same
		prototype

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
2005-10-01 18:43:42 +10:00
Renamed from arch/ppc64/kernel/idle_power4.S (Browse further)