1
0
Fork 0
Commit Graph

180 Commits (32471f6e1983922473573da62cbee58699574aa4)

Author SHA1 Message Date
Nobuhiro Iwamatsu 9ca04434bb sh: pci: Add pci_fixup_pcic to pci of landisk
This adds a pci setting revision for landisk.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-01-11 12:47:17 +09:00
Paul Mundt 37b7a97884 sh: machvec IO death.
This takes a bit of a sledgehammer to the machvec I/O routines. The
iomem case requires no special casing and so can just be dropped
outright. This only leaves the ioport casing for PCI and SuperIO
mangling. With the SuperIO case going through the standard ioport
mapping, it's possible to replace everything with generic routines.

With this done the standard I/O routines are tidied up and NO_IOPORT
now gets default-enabled for the vast majority of boards.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-11-01 09:49:04 -04:00
Paul Mundt a80be16805 sh: pci: Convert to upper/lower_32_bits() helpers.
Instead of hand-rolling our own, just use the generic ones instead.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-10-15 06:15:56 +09:00
Paul Mundt b6b77b2d5f sh: pci: Support secondary FPGA-driven PCIe clocks on SDK7786.
The SDK7786 FPGA has secondary control over the PCIe clocks, specifically
relating to the slots and oscillator. This ties the FPGA clocks in to the
clock framework and balances the refcounting similar to how the primary
on-chip clocks are managed. While the on-chip clocks are per-port, the
FPGA clock enable/disable is global for the entire block.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-10-14 08:44:55 +09:00
Paul Mundt 61a46766c9 sh: pci: Support slot 4 routing on SDK7786.
SDK7786 supports connecting either slot3 or 4 to the same PCIe port by
way of FPGA muxing. By default the vertical slot 3 on the baseboard is
enabled, so this adds in a command line option for forcibly enabling the
slot 4 edge connector.

If nothing has been specified on the command line, we fall back to
reading the resistor values for card presence to figure out where to
route the port to.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-10-14 07:37:01 +09:00
Paul Mundt 39a90865f0 sh: pci: Use a generic raw spinlock for PCI config access locking.
This copies the pci_config_lock idea from x86 over, allowing us to kill
off a couple of existing private locks. At the same time, these need to
be converted to raw spinlocks for -rt kernels, so we make that change at
the same time. This should make it easier for future parts to get the
locking right instead of inevitable ending up with lock type mismatches.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-20 18:56:13 +09:00
Paul Mundt c524ebf5a6 sh: pci: clock framework support for SH7786 PCIe.
This gets each port handling its MSTP bit, as well as moving the PHY
clock management in to the clock framework.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-20 18:45:11 +09:00
Paul Mundt cecf48e23f sh: pci: Use I/O accessors consistently in SH7786 PCIe init code.
Some of the existing code is flipping between __raw_xxx() and
pci_{read,write}_reg(). As the latter are just wrappers for the former,
flip over to using them consistently.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-20 17:10:02 +09:00
Paul Mundt bd792aea44 sh: pci: Support ports with disabled links on SH7786 PCIe.
Presently we error out if a link is disabled and simply drop the port
registration outright. This follows the PPC changes and simply reports on
the link state on boot, leaving the port registered, in order to more
easily deal with hotplug on future parts.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-20 16:12:58 +09:00
Paul Mundt beb54ad9c6 sh: pci: Discard initial PCICONF4/5 settings for SH7786 PCIe.
These settings are properly propagated by the hardware already, so
there's no need to bother with them manually.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-20 16:00:42 +09:00
Paul Mundt 2c65d75ec4 sh: pci: Support root complex config accesses on SH7786 PCIe.
The SH7786 PCIe is presently unable to enumerate itself in root complex
mode, and has no visibility through either type 0 or type 1 accesses,
despite having a mostly sensible extended config space for each port.
Attempts to generate type 0 or type 1 config cycles result in completer
aborts, so we're ultimately forced to use SuperHyway transactions
instead.

As each port has a single port <-> device mapping that resolves for any
PCI_SLOT definition, we simply hijack devfn 0 for the SuperHyway
transaction and bump up the devfn limit.

With enumeration of the root complex now possible, we also need to insert
an early fixup to hide the BARs from the kernel. With all of that done,
it's now possible to use the pcieport services with all of the PCIe
ports, which is the first step to power management support.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-20 15:39:54 +09:00
Paul Mundt cabdf8bf48 sh: pci: Move Renesas PCI IDs to a better place.
Previously these IDs were only used by one driver, so there was not much
need for having them generically defined. Now that this will no longer
hold true, move them over.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-20 15:37:25 +09:00
Paul Mundt 81df84f406 sh: pci: Give SH7786 PHY some time to settle.
The spec suggests waiting up to 500ms for the PHY to settle before
testing link state, but practice shows that 100ms is sufficient (this is
the delay value we also use on the other SH-4A PCI controllers, too).
This makes device detection much more reliable, although in the future it
should be a bit faster to simply serialize with a TLP IRQ.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-19 13:57:51 +09:00
Paul Mundt bdf7499081 sh: pci: Toggle configuration accesses on SH7786.
After configuration accesses have been completed deassert the
configuration access enable cleanly.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-19 13:54:50 +09:00
Paul Mundt c62e3fae58 sh: pci: Use generic pci_enable_resources() for pcibios_enable_device().
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-19 13:51:15 +09:00
Paul Mundt 52204705b2 Merge branch 'sh/pci-express-integration' 2010-09-07 17:56:27 +09:00
Paul Mundt 1c3bb3871a sh: Hook up 3rd memory window for all SH7786 PCIe channels.
Now that the resource assignment issues are resolved, we can finally wire
up the small third memory window -- in the future we may reclaim this for
MSI.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-07 17:07:05 +09:00
Paul Mundt f048519309 sh: Properly wire up channel 2's I/O window on SH7786 PCIe.
An IORESOURCE_IO was missing here, which meant that we weren't properly
establishing the I/O window for this particular slot. With this
corrected, cards with I/O BARs have them actually assigned and
accessible.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-07 17:05:08 +09:00
Paul Mundt da03a63ac8 sh: Ignore 32-bit windows in 29-bit mode for SH7786 PCIe.
Certain memory windows are only available for 32-bit space, so skip over
these in 29-bit mode. This will severely restrict the amount of memory
that can be mapped, but since a boot loader bug makes booting in 29-bit
mode close to impossible anyways, everything is ok.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-07 17:03:10 +09:00
Paul Mundt 2c5f674339 sh: Establish a SuperHyway<->PCIe window mapping on SH7786 PCIe.
This bumps up the low address to match the physical memory windows for
SHway<->PCIe transfers. The previous implementation was banking on a 1:1
virt<->phys SHway mapping, which doesn't apply here.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-07 16:12:26 +09:00
Paul Mundt 2dbfa1e37d sh: Make SH7786 PCIe port reset logic more aggressive.
This attempts a more complete port reset, building on top of the existing
approach.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-07 16:11:04 +09:00
Matt Fleming 9ec1651668 sh: Additional register definitions for SH7786 PCIe.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-09-07 16:09:14 +09:00
Paul Mundt 144c749423 Merge branch 'sh/pci-express-integration' 2010-08-20 20:39:22 +09:00
Paul Mundt 65c23f54c0 sh: Relax devfn constraints for SH7786 PCIe.
SH7786 PCIe has 1 slot per port, but no specific restriction on function.
Relax the devfn restriction and look to the slot number instead when
configured as a root complex.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-08-20 20:26:41 +09:00
Paul Mundt 53178d71b9 sh: Fix up SH7786 PCIe PHY initialization.
This brings the clocking and register setting in line with the somewhat
factually ambiguous specification.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-08-20 16:04:59 +09:00
Paul Mundt 7656e2486c sh: Support type 1 accesses for SH7786 PCI.
This enables support for type 1 config space accesses on the SH7786
PCI controller. At the same time, add in some extra sanity checks for
controller asserted errors.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-08-20 15:59:40 +09:00
Matt Fleming 3b554c33dc sh: Fix typos in PCI initialization message
This typo seems to have been copy and pasted in the PCI initialization
code. Replace 'intialization' with 'initialization'.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
2010-06-23 09:09:56 +01:00
Paul Mundt 9973e38575 sh: Fix up IORESOURCE_PCI_FIXED usage in pcibios_fixup_device_resources().
pcibios_fixup_device_resources() presently skips over resources flagged
with IORESOURCE_PCI_FIXED, which is a remnant of the old PCI-auto code.
The only user for this at present is the Dreamast GAPSPCI code which
can't tolerate any adjustments to the BARs, but a combination of the
IORESOURCE_PCI_FIXED and zeroed out hose offsets does the right thing for
this case already, so we simply kill off the special casing.

Reported-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-06-07 11:42:01 +09:00
Magnus Damm e3a4317e1d sh: sh7751 pci controller io port fix
This patch updates the sh7751 pci code to handle io ports
correctly. The code is based on the sh7788x implementation.

Tested on a R2D-1 board with CONFIG_8139TOO_PIO=y.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-04-26 16:02:25 +09:00
Tejun Heo 5a0e3ad6af include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files.  percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.

percpu.h -> slab.h dependency is about to be removed.  Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability.  As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.

  http://userweb.kernel.org/~tj/misc/slabh-sweep.py

The script does the followings.

* Scan files for gfp and slab usages and update includes such that
  only the necessary includes are there.  ie. if only gfp is used,
  gfp.h, if slab is used, slab.h.

* When the script inserts a new include, it looks at the include
  blocks and try to put the new include such that its order conforms
  to its surrounding.  It's put in the include block which contains
  core kernel includes, in the same order that the rest are ordered -
  alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
  doesn't seem to be any matching order.

* If the script can't find a place to put a new include (mostly
  because the file doesn't have fitting include block), it prints out
  an error message indicating which .h file needs to be added to the
  file.

The conversion was done in the following steps.

1. The initial automatic conversion of all .c files updated slightly
   over 4000 files, deleting around 700 includes and adding ~480 gfp.h
   and ~3000 slab.h inclusions.  The script emitted errors for ~400
   files.

2. Each error was manually checked.  Some didn't need the inclusion,
   some needed manual addition while adding it to implementation .h or
   embedding .c file was more appropriate for others.  This step added
   inclusions to around 150 files.

3. The script was run again and the output was compared to the edits
   from #2 to make sure no file was left behind.

4. Several build tests were done and a couple of problems were fixed.
   e.g. lib/decompress_*.c used malloc/free() wrappers around slab
   APIs requiring slab.h to be added manually.

5. The script was run on all .h files but without automatically
   editing them as sprinkling gfp.h and slab.h inclusions around .h
   files could easily lead to inclusion dependency hell.  Most gfp.h
   inclusion directives were ignored as stuff from gfp.h was usually
   wildly available and often used in preprocessor macros.  Each
   slab.h inclusion directive was examined and added manually as
   necessary.

6. percpu.h was updated not to include slab.h.

7. Build test were done on the following configurations and failures
   were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
   distributed build env didn't work with gcov compiles) and a few
   more options had to be turned off depending on archs to make things
   build (like ipr on powerpc/64 which failed due to missing writeq).

   * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
   * powerpc and powerpc64 SMP allmodconfig
   * sparc and sparc64 SMP allmodconfig
   * ia64 SMP allmodconfig
   * s390 SMP allmodconfig
   * alpha SMP allmodconfig
   * um on x86_64 SMP allmodconfig

8. percpu.h modifications were reverted so that it could be applied as
   a separate patch and serve as bisection point.

Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.

Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-30 22:02:32 +09:00
Linus Torvalds 64d497f553 Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (187 commits)
  sh: remove dead LED code for migo-r and ms7724se
  sh: ecovec build fix for CONFIG_I2C=n
  sh: ecovec r-standby support
  sh: ms7724se r-standby support
  sh: SH-Mobile R-standby register save/restore
  clocksource: Fix up a registration/IRQ race in the sh drivers.
  sh: ms7724: modify scan_timing for KEYSC
  sh: ms7724: Add sh_sir support
  sh: mach-ecovec24: Add sh_sir support
  sh: wire up SET/GET_UNALIGN_CTL.
  sh: allow alignment fault mode to be configured at kernel boot.
  sh: sh7724: Update FSI/SPU2 clock
  sh: always enable sh7724 vpu_clk and set to 166MHz on Ecovec
  sh: add sh7724 kick callback to clk_div4_table
  sh: introduce struct clk_div4_table
  sh: clock-cpg div4 set_rate() shift fix
  sh: Turn on speculative return for SH7785 and SH7786
  sh: Merge legacy and dynamic PMB modes.
  sh: Use uncached I/O helpers in PMB setup.
  sh: Provide uncached I/O helpers.
  ...
2010-02-26 16:54:27 -08:00
Dominik Brodowski 3b7a17fcda resource/PCI: mark struct resource as const
Now that we return the new resource start position, there is no
need to update "struct resource" inside the align function.
Therefore, mark the struct resource as const.

Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-02-22 16:16:57 -08:00
Dominik Brodowski b26b2d494b resource/PCI: align functions now return start of resource
As suggested by Linus, align functions should return the start
of a resource, not void. An update of "res->start" is no longer
necessary.

Cc: Bjorn Helgaas <bjorn.helgaas@hp.com>
Cc: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-02-22 16:16:56 -08:00
Paul Mundt 7578a4c625 sh: Fix up multi-resource mapping for SH7786 PCIe.
This reworks some of the SH7786 PCIe initialization code to dynamically
setup and size the various resource windows, as opposed to the original
code that simply wired in a couple of them statically.

At the same time, we tidy up the initialization code a bit, kill off some
read-only register twiddling that was gleaned from the bus analyzer, and
also propagate the physical slot/channel mapping.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-10 16:00:58 +09:00
Paul Mundt 7561f2dd39 sh: Fix up SH7786 PCI resource definitions.
This adds in some of the missing memory resources for channels 1/2 and
gets the code building again for the recent changes.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-08 16:36:56 +09:00
Paul Mundt 3b0be1a4f2 sh: Fix an off-by-1 in SH7780 PCIC memory resource mapping.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-05 16:11:25 +09:00
Paul Mundt 9ad62ec4f7 sh: Fix up early PCI PERR/SERR IRQ handling.
This adds support for handling early PERR/SERR triggering in between
controller registration and the initial bus scan. Buggy cards end up
asserting these as soon as the M66EN scan is undertaken, resulting in
an early crash.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-03 16:46:20 +09:00
Paul Mundt b6c58b1d98 sh: Improved multi-resource handling for SH7780 PCI.
The SH7780 PCI controller supports 3 different ranges of PCI memory in
addition to its PCI I/O window. In the case of 29-bit mode, only 2 memory
windows are supported, while in 32-bit mode all 3 are visible. This
attempts to make the resource handling completely dynamic and to permit
platforms to map in as many apertures as they can handle.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-01 20:01:50 +09:00
Paul Mundt ef407beefb sh: Hook up ERR/PERR/SERR detection for SH7780 PCI host controllers.
These were never handled before, so implement some common infrastructure
to support them, then make use of that in the SH7780-specific code. In
practice there is little here that can not be generalized for SH4 parts,
which will be an incremental change as the 7780/7751 code is gradually
unified.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-01 16:39:46 +09:00
Paul Mundt bcf39352eb sh: Handle PCI controller resource conflicts.
register_pci_controller() can fail, but presently is a void function.
Change this over to an int so that we can bail early before continuing on
with post-registration initialization (such as throwing the controller in
to 66MHz mode in the case of the SH7780 host controller).

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-01 13:11:25 +09:00
Paul Mundt 85b59f5bb2 sh: Enable PCI66 support for SH7780 host controller.
This adds some helper glue for scanning the bus and determining if all
of the devices are 66MHz capable or not before flipping on 66MHz mode.
This isn't quite to spec, but it's fairly consistent with what other
embedded controllers end up having to do.

Scanning code cribbed from the MIPS txx9 PCI code.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-01 13:01:42 +09:00
Paul Mundt aee4467b5c sh: Fix up large system memory handling for SH7780 PCI.
For systems that have more than 512MB we need to set up an additional
mapping, this fixes up the rounding to the next power of two and splits
out the mapping accordingly between the two local bus mapping windows.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-02-01 11:33:22 +09:00
Paul Mundt 396c56a9c6 sh: Kill off broken type 1 PCI config access checks.
The host controllers only support type 1, so there's not much else to
test for. Some of the older controllers also supported type 2 accesses,
but we've never supported those, and likely never will. Beyond that, the
P1SEG test is meaningless for 32-bit mode, so rather than refactoring it,
just kill the type 1 test off completely.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-30 01:41:21 +09:00
Paul Mundt 320e68da59 sh: support PCI domains.
Newer SH parts are now commonly shipping with multiple controllers, so
we wire up PCI domain support to deal with them. Shamelessly cloned from
the MIPS implementation.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-29 22:38:13 +09:00
Paul Mundt ac8ab54a8e sh: Bail out early on PCI resource conflicts.
Presently we just call in to request_resource() for the ioport and iomem
resources without checking for errors. This has already hidden a couple
of bugs, so add some error handling in for good measure.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-29 22:22:27 +09:00
Paul Mundt a45635dfb0 sh: Reworked SH7780 PCI initialization.
This consolidates the PCI initialization code for all of the pci-sh7780
users, and sets up the memory window dynamically as opposed to using
hardcoded window positions.

A number of bugs were fixed at the same time, including the PIO handling
and master abort timeout settings being incorrect.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-29 22:19:04 +09:00
Paul Mundt 849593591c sh: Fix up read-only variable assignment in pcibios_align_resource().
arch/sh/drivers/pci/pci.c:167: error: assignment of read-only location '*res'

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-28 18:15:05 +09:00
Paul Mundt 9d56dd3b08 sh: Mass ctrl_in/outX to __raw_read/writeX conversion.
The old ctrl in/out routines are non-portable and unsuitable for
cross-platform use. While drivers/sh has already been sanitized, there
is still quite a lot of code that is not. This converts the arch/sh/ bits
over, which permits us to flag the routines as deprecated whilst still
building with -Werror for the architecture code, and to ensure that
future users are not added.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-26 12:58:40 +09:00
Paul Mundt 7dcaa8e8e6 sh: Generalize SH7786 PCIe support.
Previously this was only built in for Urquell boards, but the same
approach can be used on SDK7786 now that the mode pin reading is
supported, so make it generic to SH7786.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-01-15 19:13:56 +09:00
Sam Ravnborg 3252b11fc4 sh: move machtypes.h to include/generated
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Michal Marek <mmarek@suse.cz>
2009-12-12 13:08:14 +01:00