Currently the 'big-endian' property is listed as required, which is
not correct. i.MX SoCs do not need such property, so move it under
'Optional properties' entry instead.
Also, fsl-sai.txt incorrectly referenced 'FTM_PWM registers', so
change it to 'SAI registers', which is the intended description.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Improve the binding example by removing all the leading zeros to fix the
following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading 0s
Converted using the following command:
perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find ./Documentation/devicetree/bindings "*.txt"`
Some unnecessary changes were manually fixed.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Pretty much any node can have a status property, so it doesn't need to
be in examples.
Converted with the following command and removed examples with SoC and
board specific splits:
git grep -l -E 'status.*=.*' Documentation/devicetree/ | xargs sed -i -E '/\sstatus.*=.*"(disabled|ok|okay)/d'
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
ESAI need to enable the spba clock, when sdma is using share peripheral
script. In this case, there is two spba master port is used, if don't
enable the clock, the spba bus will have arbitration issue, which may
cause read/write wrong data from/to ESAI registers.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This patch simply adds indentations for DT binding doc to increase readability
without changing any contents.
Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Since commit b21cc2f5fd ("ASoC: esai: Add VF610+ compatibles support.")
the fsl_esai driver also accepts the "fsl,vf610-esai" compatible string.
Update the documentation accordingly.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
For most platforms, the CPU and ESAI device is in the same endianess
mode. While for the LS1 platform, the CPU is in LE mode and the ESAI
is in BE mode.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Acked-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This patch implements a device-tree-only CPU DAI driver for Freescale ESAI
controller that supports:
- 12 channels playback and 8 channels record.
[ Some of the inner transmitters and receivers are sharing same group of
pins. So the maxmium 12 output or 8 input channels are only valid if
there is no pin conflict occurring to it. ]
- Independent (asynchronous mode) or shared (synchronous mode) transmit and
receive sections with separate or shared internal/external clocks and frame
syncs, operating in Master or Slave mode.
[ Current ALSA seems not to allow CPU DAI drivers to configure DAI format
separately for PLAYBACK and CAPTURE. So this first version only supports
the case that uses the same DAI format for both directions. ]
- Various DAI formats: I2S, Left-Justified, Right-Justified, DSP-A and DSP-B.
- Programmable word length (8, 16, 20 or 24bits)
- Flexible selection between system clock or external oscillator as input
clock source, programmable internal clock divider and frame sync generation.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Shengjiu Wang