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Author	SHA1	Message	Date
Axel Lin	1ec93b9b17	mfd: rdc321x: Fix off-by-one for ngpio setting The valid gpio is GPIO0 ~ GPIO58, so ngpio should be 59. This patch also renames RDC321X_MAX_GPIO to RDC321X_NUM_GPIO because it actually means the number of available GPIOs. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>	2014-06-03 08:11:17 +01:00
Florian Fainelli	e090d506c3	mfd: Add support for the RDC321x southbridge This patch adds a new MFD driver for the RDC321x southbridge. This southbridge is always present in the RDC321x System-on-a-Chip and provides access to some GPIOs as well as a watchdog. Access to these two functions is done using the southbridge PCI device configuration space. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>	2010-05-28 01:37:28 +02:00

Author

SHA1

Message

Date

Axel Lin

1ec93b9b17

mfd: rdc321x: Fix off-by-one for ngpio setting

The valid gpio is GPIO0 ~ GPIO58, so ngpio should be 59.
This patch also renames RDC321X_MAX_GPIO to RDC321X_NUM_GPIO because it
actually means the number of available GPIOs.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

2014-06-03 08:11:17 +01:00

Florian Fainelli

e090d506c3

mfd: Add support for the RDC321x southbridge

This patch adds a new MFD driver for the RDC321x southbridge. This southbridge
is always present in the RDC321x System-on-a-Chip and provides access to some
GPIOs as well as a watchdog. Access to these two functions is done using the
southbridge PCI device configuration space.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

2010-05-28 01:37:28 +02:00

2 Commits (37d74841b9d42b105cba053e70e9db0e395949da)