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120 Commits (395d1fb948d98e613ba58a90a28a3049404ec7d4)

Author SHA1 Message Date
Tom St Denis 7894745abb drm/amdgpu/gfx8: Add serdes wait for idle in CGCG en/disable
Must wait for SERDES idle before exiting RLC SAFEMODE

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:58 -04:00
Alex Deucher 7ba0eb6df9 drm/amdgpu/gfx8: clean up polaris11 PG enable
Fix the logic for enabling/disabling.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:46 -04:00
Alex Deucher 2c54716563 drm/amdgpu/gfx8: add powergating support for CZ/ST
This implements powergating support for CZ/ST asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:45 -04:00
Alex Deucher c2546f55dd drm/amdgpu/gfx8: rename some pg functions
So they can be shared with other asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:44 -04:00
Alex Deucher fb16007bf0 drm/amdgpu/gfx8: add state setup for CZ/ST GFX power gating
This sets up the CP jump table and GDS buffer and sets the
PG state registers.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07 14:50:44 -04:00
Rex Zhu 92d1576859 drm/amdgpu/gfx8: update golden setting for polaris10
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-21 10:22:42 -04:00
Monk Liu 13331ac384 drm/amdgpu: fix gfx8 ucode mem leak
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:49:06 -04:00
Ken Wang d1a7f7aadc drm/amdgpu/iceland: Set SC_PA_RASTER_CONFIG according to different RB enabled
fix the raster config setting for different iceland configs.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-09 10:48:52 -04:00
Flora Cui b9934878fd drm/amdgpu: update Polaris11 golden setting
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-18 09:22:29 -04:00
Flora Cui d4ab989fc3 drm/amdgpu: update Polaris10 golden setting
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-18 09:22:28 -04:00
Marek Olšák f84e63f2ff drm/amdgpu: fix TC cache flushing
TC_WB_ACTION must be set according to the docs

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:51:15 -04:00
Christian König d88bf583bd drm/amdgpu: move VM fields into job
They are the same for all IBs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:31 -04:00
Christian König f153d2867b drm/amdgpu: move context switch handling into common code v2
It was a source of bugs to repeat that in each IP version.

v2: rename parameter

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:30 -04:00
Christian König 9f8fb5a2b3 drm/amdgpu: move preamble IB handling into common code
This fixes the handling which was completely broken when you
ad more than one preamble IB.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 13:30:30 -04:00
Tom St Denis 88a907d67c drm/amd/amdgpu: Add name field to amd_ip_funcs (v2)
Add name that we can print out in kernel messages
to aid in debugging.

v2: drop DAL changes for upstream

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:26 -04:00
Alex Deucher 7dae69a290 drm/amdgpu: fetch cu_info once at init
Fetch this info once at init and just store the results
for future requests.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:21 -04:00
Christian König edf600dac6 drm/amd: cleanup remaining spaces and tabs v2
This is the result of running the following commands:
find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/[ \t]\+$//' {} \;
find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/[ \t]\+$//' {} \;
find drivers/gpu/drm/amd/ -name "*.h" -exec sed -i 's/ \+\t/\t/' {} \;
find drivers/gpu/drm/amd/ -name "*.c" -exec sed -i 's/ \+\t/\t/' {} \;

v2: drop changes to DAL and internal headers

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:20 -04:00
Monk Liu c5637837ba drm/amdgpu: keep vm in job instead of ib (v2)
ib.vm is a legacy way to get vm, after scheduler
implemented vm should be get from job, and all ibs
from one job share the same vm, no need to keep ib.vm
just move vm field to job.

this patch as well add job as paramter to ib_schedule
so it can get vm from job->vm.

v2: agd: sqaush in:
drm/amdgpu: check if ring emit_vm_flush exists in vm flush

No vm flush on engines that don't support VM.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=95195

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-11 12:31:16 -04:00
Tom St Denis 16a7989ac6 drm/amd/amdgpu: Drop print_status callbacks.
First patch in series to move to user mode
debug tools we're removing the print_status callbacks.

These functions were unused at the moment anyway.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:30:06 -04:00
Slava Grigorev ae17c999f0 drm/amd/amdgpu: fix 64-bit division
Signed-off-by: Slava Grigorev <slava.grigorev@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:28:37 -04:00
Flora Cui 2cc0c0b5cd drm/amdgpu: change ELM/BAF to Polaris10/Polaris11
Adjust to preferred code names.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:57 -04:00
Eric Huang f4bfffddd7 drm/amd/amdgpu: add power gating init for Baffin
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:34 -04:00
Eric Huang 2b6cd97797 drm/amd/amdgpu: add power gating initialization support for GFX8.0
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:28 -04:00
Eric Huang 62a86fc234 drm/amd/amdgpu: add medium grain powergating support for Baffin
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:27:16 -04:00
Flora Cui 68182d909b drm/amdgpu: add GFX support for ELM/BAF
V2: use gfx_8_0_*.h instead of gfx_8_1_*.h
v3: agd: integrate support for gfx info table

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:25:11 -04:00
Alex Deucher dbff57bc7b drm/amdgpu/gfx: rework fiji cg functions so they can be shared
They can be shared with other asics with minor modifications.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:22:17 -04:00
Alex Deucher 146f256fae drm/amdgpu/gfx: adjust gfx_v8_0_send_serdes_cmd for ST
Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:22:05 -04:00
Alex Deucher 79deaaf4a9 drm/amdgpu/gfx8: rename send_serdes_cmd
So it can be shared with CZ/ST.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:22:02 -04:00
Alex Deucher 14698b6c79 drm/amdgpu/gfx: add proper CG flags for fiji
We were already enabling these CG features, this uses
the standard interface for doing so.

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:21:48 -04:00
Christian König 771c8ec177 drm/amdgpu: use the ring name for debugfs (v2)
Instead of hard coding just another name in the ring code.

v2: squash in Tom's rebase fix

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:21:03 -04:00
Christian König 2800de2e9e drm/amdgpu: reduce the ring size for GFX
Those are way too large.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:20:54 -04:00
Christian König a3f1cf355e drm/amdgpu: use max_dw in ring_init
Instead of specifying the total ring size calculate that from the maximum
number of dw a submission can have and the number of concurrent submissions.

This fixes UVD with 8 concurrent submissions or more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04 20:20:50 -04:00
Dave Airlie 902d02db1f Merge branch 'drm-next-4.6' of git://people.freedesktop.org/~agd5f/linux into drm-next
A few other misc cleanups and bug fixes for 4.6.  Highlights:
- unify endian handling in powerplay
- powerplay fixes
- fix a regression in 4.5 on boards with no display connectors
- fence cleanups and locking fixes
- whitespace cleanups and code refactoring in radeon

* 'drm-next-4.6' of git://people.freedesktop.org/~agd5f/linux: (35 commits)
  drm/amdgpu/gfx7: add MTYPE definition
  drm/amdgpu: removing BO_VAs shouldn't be interruptible
  drm/amd/powerplay: show uvd/vce power gate enablement for tonga.
  drm/amd/powerplay: show uvd/vce power gate info for fiji
  drm/amdgpu: use sched fence if possible
  drm/amdgpu: move ib.fence to job.fence
  drm/amdgpu: give a fence param to ib_free
  drm/amdgpu: include the right version of gmc header files for iceland
  drm/radeon: fix indentation.
  drm/amd/powerplay: add uvd/vce dpm enabling flag to fix the performance issue for CZ
  drm/amdgpu: switch back to 32bit hw fences v2
  drm/amdgpu: remove amdgpu_fence_is_signaled
  drm/amdgpu: drop the extra fence range check v2
  drm/amdgpu: signal fences directly in amdgpu_fence_process
  drm/amdgpu: cleanup amdgpu_fence_wait_empty v2
  drm/amdgpu: keep all fences in an RCU protected array v2
  drm/amdgpu: add number of hardware submissions to amdgpu_fence_driver_init_ring
  drm/amdgpu: RCU protected amd_sched_fence_release
  drm/amdgpu: RCU protected amdgpu_fence_release
  drm/amdgpu: merge amdgpu_fence_process and _activity
  ...
2016-03-18 07:16:25 +10:00
Monk Liu 73cfa5f5ce drm/amdgpu: move ib.fence to job.fence
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-17 11:54:11 -04:00
Monk Liu cc55c45db5 drm/amdgpu: give a fence param to ib_free
thus amdgpu_ib_free() can hook sched fence to SA manager
in later patches.

BTW:
for amdgpu_free_job(), it should only fence_put() the
fence of the last ib once, so fix it as well in this patch.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-17 11:53:34 -04:00
Dave Airlie 9f443bf53b Merge branch 'drm-next-4.6' of git://people.freedesktop.org/~agd5f/linux into drm-next
A few more fixes and cleanups for 4.6:
- DCE code cleanups
- HDP flush/invalidation fixes
- GPUVM fixes
- switch to drm_vblank_[on|off]
- PX fixes
- misc bug fixes

* 'drm-next-4.6' of git://people.freedesktop.org/~agd5f/linux: (50 commits)
  drm/amdgpu: split pipeline sync out of SDMA vm_flush() as well
  drm/amdgpu: Revert "add mutex for ba_va->valids/invalids"
  drm/amdgpu: Revert "add lock for interval tree in vm"
  drm/amdgpu: Revert "add spin lock to protect freed list in vm (v3)"
  drm/amdgpu: reserve the PD during unmap and remove
  drm/amdgpu: Fix two bugs in amdgpu_vm_bo_split_mapping
  drm/radeon: Don't drop DP 2.7 Ghz link setup on some cards.
  MAINTAINERS: update radeon entry to include amdgpu as well
  drm/amdgpu: disable runtime pm on PX laptops without dGPU power control
  drm/radeon: disable runtime pm on PX laptops without dGPU power control
  drm/amd/amdgpu: Fix indentation in do_set_base() (DCEv8)
  drm/amd/amdgpu: make afmt_init cleanup if alloc fails (DCEv8)
  drm/amd/amdgpu: Move config init flag to bottom of sw_init (DCEv8)
  drm/amd/amdgpu: Don't proceed into audio_fini if audio is disabled (DCEv8)
  drm/amd/amdgpu: Fix identation in do_set_base() (DCEv10)
  drm/amd/amdgpu: Make afmt_init cleanup if alloc fails (DCEv10)
  drm/amd/amdgpu: Move initialized flag to bottom of sw_init (DCEv10)
  drm/amd/amdgpu: Don't proceed in audio_fini if disabled (DCEv10)
  drm/amd/amdgpu: Fix indentation in dce_v11_0_crtc_do_set_base()
  drm/amd/amdgpu: Make afmt_init() cleanup if alloc fails (DCEv11)
  ...
2016-03-17 08:25:04 +10:00
Dave Airlie 9b61c0fcdf Merge drm-fixes into drm-next.
Nouveau wanted this to avoid some worse conflicts when I merge that.
2016-03-14 09:46:02 +10:00
Christian König b8c7b39ec1 drm/amdgpu: split pipeline sync and vm flush
This allows us to use the pipeline sync for other tasks as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2016-03-08 11:01:49 -05:00
Christian König 336d1f5efe drm/amdgpu: remove HW fence owner
Not used any more since we now always use the sheduler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2016-03-08 11:01:47 -05:00
Chunming Zhou d35db5617a drm/amdgpu: add hdp invalidation for gfx8
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-08 11:01:42 -05:00
Flora Cui 6157bd7a10 drm/amdgpu: fix rb bitmap & cu bitmap calculation
Fix some copy paste typos.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-03 01:00:20 -05:00
Chunming Zhou 9cac537332 drm/amdgpu/gfx8: specify which engine to wait before vm flush
Select between me and pfp properly.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-02 11:01:23 -05:00
Christian König 4ff37a83f1 drm/amdgpu: fix VM faults caused by vm_grab_id() v4
The owner must be per ring as long as we don't
support sharing VMIDs per process. Also move the
assigned VMID and page directory address into the
IB structure.

v3: assign the VMID to all IBs, not just the first one.
v4: use correct pointer for owner

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-29 11:33:46 -05:00
Alex Deucher aac1e3caac drm/amdgpu/gfx: fix off by one in rb rework (v2)
When I reworked this code, I messed up num rb count.

v2: use hweight32

Reviewed-by: Ken Wang <Qingquing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-25 17:44:57 -05:00
Alex Deucher 04ab3b7622 drm/amdgpu/gfx8: fix priv reg interrupt enable
Looks like a copy/paste typo.

Reviewed-by: Christian König <christian.koenig@amd.com>
Noticed-by: David Panariti <David.Panariti@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-22 11:30:35 -05:00
Alex Deucher 549300ceae drm/amdgpu/vi: move uvd tiling config setup into uvd code
Split uvd and gfx programming.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:53:14 -05:00
Alex Deucher c458fe9425 drm/amdgpu/vi: move sdma tiling config setup into sdma code
Split sdma and gfx programming.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:53:04 -05:00
Alex Deucher 8f8e00c17e drm/amdgpu/gfx: clean up harvest configuration (v2)
Read back harvest configuration from registers and simplify
calculations.  No need to program the raster config registers.
These are programmed as golden registers and the user mode
drivers program them as well.

v2: rebase on Tom's patches

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-12 15:47:18 -05:00
Christian König e86f9ceee1 drm/amdgpu: move sync into job object
No need to keep that for every IB.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:24 -05:00
Christian König a0332b56f6 drm/amdgpu: send SDMA/GFX IB tests directly to the ring again
There is no point in sending them through the scheduler.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-10 14:17:22 -05:00