Commit graph

8 commits

Author SHA1 Message Date
Chris Metcalf 49cf78ef7b tile: support FRAME_POINTER
Allow enabling frame pointer support; this makes it easier to hook
into the various kernel features that claim they require it without
having to add Kconfig conditionals everywhere (a la mips, ppc, s390,
and microblaze).  When enabled, it basically eliminates leaf functions
as such, and stops optimizing tail and sibling calls.  It adds around
3% to the size of the kernel when enabled.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-09-03 14:52:09 -04:00
Chris Metcalf dd78bc11fb tile: convert uses of "inv" to "finv"
The "inv" (invalidate) instruction is generally less safe than "finv"
(flush and invalidate), as it will drop dirty data from the cache.
It turns out we have almost no need for "inv" (other than for the
older 32-bit architecture in some limited cases), so convert to
"finv" where possible and delete the extra "inv" infrastructure.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-07-31 11:51:19 -04:00
Chris Metcalf 7c63e1ee0a tile: export a handful of symbols appropriately
This was shown up by running with "allmodconfig".  I used
EXPORT_SYMBOL() to match existing conventions in files that
were already exporting symbols, or that were exported that way
by other architectures, and otherwise EXPORT_SYMBOL_GPL().

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-02-08 13:20:36 -05:00
Chris Metcalf 54229ff359 arch/tile: fix finv_buffer_remote() for tilegx
There were some correctness issues with this code that are now fixed
with this change.  The change is likely less performant than it could
be, but it should no longer be vulnerable to any races with memory
operations on the memory network while invalidating a range of memory.
This code is run infrequently so performance isn't critical, but
correctness definitely is.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-04-02 12:13:53 -04:00
Chris Metcalf 918cbd38ae arch/tile: fix pointer cast in cacheflush.c
Pragmatically it couldn't be wrong to cast pointers to long to compare
them (since all kernel addresses are in the top half of VA space),
but it's more correct to cast to unsigned long.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-04-02 12:13:39 -04:00
Chris Metcalf dbb434214e arch/tile: disable GX prefetcher during cache flush
Otherwise, it's possible to end up with the prefetcher pulling
data into cache that the code believes has been flushed.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2011-05-04 14:40:46 -04:00
Chris Metcalf 63b7ca6b04 arch/tile: enhance existing finv_buffer_remote() routine
It now takes an additional argument so it can be used to
flush-and-invalidate pages that are cached using hash-for-home
as well those that are cached with coherence point on a single cpu.

This allows it to be used more widely for changing the coherence
point of arbitrary pages when necessary.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2011-03-01 16:21:06 -05:00
Chris Metcalf c78095bd8c arch/tile: Split the icache flush code off to a generic <arch> header.
This code is used in other places in our system than in Linux, so
to share it we now implement it as an inline function in our low-level
<arch> headers, and instantiate it in one file in Linux's arch/tile/lib.
The file is now cacheflush.c and is C code rather than the strangely-named
and assembler-implemented __invalidate_icache.S.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2010-07-06 13:41:46 -04:00