1 Commits (3f3c278c94dd994fe0d9f21679ae19b9c0a55292)

Author	SHA1	Message	Date
Shunli Wang	e986211827	clk: mediatek: Add MT2701 clock support ... Add MT2701 clock support, include topckgen, apmixedsys, infracfg, pericfg and subsystem clocks. Signed-off-by: Shunli Wang <shunli.wang@mediatek.com> Signed-off-by: James Liao <jamesjj.liao@mediatek.com> Signed-off-by: Erin Lo <erin.lo@mediatek.com> Tested-by: John Crispin <blogic@openwrt.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>	2016-11-08 15:59:49 -08:00