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7 Commits (4ba66a9760722ccbb691b8f7116cad2f791cca7b)

Author SHA1 Message Date
Chris Metcalf dd78bc11fb tile: convert uses of "inv" to "finv"
The "inv" (invalidate) instruction is generally less safe than "finv"
(flush and invalidate), as it will drop dirty data from the cache.
It turns out we have almost no need for "inv" (other than for the
older 32-bit architecture in some limited cases), so convert to
"finv" where possible and delete the extra "inv" infrastructure.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2013-07-31 11:51:19 -04:00
David Howells bd119c6923 Disintegrate asm/system.h for Tile
Disintegrate asm/system.h for Tile.

Signed-off-by: David Howells <dhowells@redhat.com>
Acked-by: Chris Metcalf <cmetcalf@tilera.com>
2012-03-28 18:30:03 +01:00
Chris Metcalf d07bd86d82 arch/tile: clarify flush_buffer()/finv_buffer() function names
They are only applicable for locally-homecached memory ranges, so
change their names to {flush,finv}_buffer_local().  Change inv_buffer()
to just do an mf instead of any kind of fancier barrier, since you're
obviously not going to be waiting for anything once the local homecache
is invalidated.

Fix tilepro.c network driver not to bother calling finv_buffer when
stopping the EPP, but just mf after memset to ensure that it will not
see any packet data after we finish stopping; use finv_buffer_remote()
when doing exit-time cleanup.

This also fixes a (not very interesting) generic Linux build failure
where drivers/scsi/st.c declares its own flush_buffer().

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2011-05-04 14:41:20 -04:00
Chris Metcalf 63b7ca6b04 arch/tile: enhance existing finv_buffer_remote() routine
It now takes an additional argument so it can be used to
flush-and-invalidate pages that are cached using hash-for-home
as well those that are cached with coherence point on a single cpu.

This allows it to be used more widely for changing the coherence
point of arbitrary pages when necessary.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2011-03-01 16:21:06 -05:00
Chris Metcalf e5a0693973 drivers/net/tile/: on-chip network drivers for the tile architecture
This change adds the first network driver for the tile architecture,
supporting the on-chip XGBE and GBE shims.

The infrastructure is present for the TILE-Gx networking drivers (another
three source files in the new directory) but for now the the actual
tilegx sources are waiting on releasing hardware to initial customers.

Note that arch/tile/include/hv/* are "upstream" headers from the
Tilera hypervisor and will probably benefit less from LKML review.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2010-11-24 13:11:18 -05:00
Chris Metcalf c78095bd8c arch/tile: Split the icache flush code off to a generic <arch> header.
This code is used in other places in our system than in Linux, so
to share it we now implement it as an inline function in our low-level
<arch> headers, and instantiate it in one file in Linux's arch/tile/lib.
The file is now cacheflush.c and is C code rather than the strangely-named
and assembler-implemented __invalidate_icache.S.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2010-07-06 13:41:46 -04:00
Chris Metcalf 867e359b97 arch/tile: core support for Tilera 32-bit chips.
This change is the core kernel support for TILEPro and TILE64 chips.
No driver support (except the console driver) is included yet.

This includes the relevant Linux headers in asm/; the low-level
low-level "Tile architecture" headers in arch/, which are
shared with the hypervisor, etc., and are build-system agnostic;
and the relevant hypervisor headers in hv/.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Reviewed-by: Paul Mundt <lethal@linux-sh.org>
2010-06-04 17:11:18 -04:00