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4 Commits (58608082e66ddf9643cf6b98fe81c216a410ced1)

Author SHA1 Message Date
Mylène Josserand 46ebbfcb9f ARM: sunxi: Add initialization of CNTVOFF
Add the initialization of CNTVOFF for sun8i-a83t.

For boot CPU, create a new machine that handles this
function's call in an "init_early" callback. We need to initialize
CNTVOFF before the arch timer's initialization otherwise, it will
not be taken into account and fails to boot correctly.
Because of that, this function can't be called in SMP's early_initcall
function which is called after timer's init.

For secondary CPUs, add this function into secondary_startup
assembly entry.

Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-05-08 14:52:41 +02:00
Mylène Josserand dff052ccf3 ARM: sunxi: smp: Move assembly code into a file
Move the assembly code for cluster cache enabling and resuming
into an assembly file instead of having it directly in C code.

Remove the CFLAGS because we are using the ARM directive "arch"
instead.

Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-05-08 14:47:36 +02:00
Arnd Bergmann 1146b60004 ARM: sunxi: fix build for THUMB2_KERNEL
Building an SMP kernel for the sunxi platform with THUMB2 instructions
fails with this error at the moment:

headsmp.S:7: Error: Thumb encoding does not support an immediate here -- `msr cpsr_fsxc,#0xd3'

Since the generic secondary_startup function already does
the same thing in a safe way, we can just drop the private
sunxi implementation and jump straight to secondary_startup.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-03-22 01:04:28 +01:00
Maxime Ripard 73346794b4 ARM: sun6i: Add SMP support for the Allwinner A31
The A31 is a quad Cortex-A7. Add the logic to use the IPs used to
control the CPU configuration and the CPU power so that we can bring up
secondary CPUs at boot.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2013-12-16 21:33:41 +01:00