Commit graph

101 commits

Author SHA1 Message Date
Tero Kristo 59245ce01a clk: ti: move OMAP4+ DPLL implementation under drivers/clk
With the legacy clock support gone, the OMAP4 specific DPLL implementations
can be moved under the clock driver. Change some of the function prototypes
to be static at the same time, and remove some exports from the global TI
clock driver header.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-06-02 12:30:58 +03:00
Tero Kristo f3b19aa5ca ARM: OMAP2+: clock: export driver API to setup/get clock features
As most of the clock driver support code is going to be moved under
drivers/clk/ti, an API for setting / getting the SoC specific clock
features is needed. This patch provides this API and changes the
existing code to use it.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-06-02 12:30:58 +03:00
Tero Kristo 80cbb224b7 ARM: OMAP2+: clock: add low-level support for regmap
Some of the TI clock providers will be converted to use syscon, thus
low-level regmap support is needed for the clock drivers also. This
patch adds this support, which can be enabled for individual drivers
in later patches.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-31 21:26:55 +03:00
Tero Kristo 9f029b1579 ARM: OMAP2+: clock: move clock provider infrastructure to clock driver
Splits the clock provider init out of the PRM driver and moves it to
clock driver. This is needed so that once the PRCM drivers are separated,
they can logically just access the clock driver not needing to go through
common PRM code. This would be wrong in the case of control module for
example.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2015-03-27 10:53:30 +02:00
Linus Torvalds 18a8d49973 The clock framework changes for 3.20 contain the usual driver additions,
enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based
 devices. Additionaly the framework core underwent a bit of surgery with
 two major changes. The boundary between the clock core and clock
 providers (e.g clock drivers) is now more well defined with dedicated
 provider helper functions. struct clk no longer maps 1:1 with the
 hardware clock but is a true per-user cookie which helps us tracker
 users of hardware clocks and debug bad behavior. The second major change
 is the addition of rate constraints for clocks. Rate ranges are now
 supported which are analogous to the voltage ranges in the regulator
 framework. Unfortunately these changes to the core created some
 breakeage. We think we fixed it all up but for this reason there are
 lots of last minute commits trying to undo the damage.
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Merge tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux

Pull clock framework updates from Mike Turquette:
 "The clock framework changes contain the usual driver additions,
  enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based
  devices.

  Additionally the framework core underwent a bit of surgery with two
  major changes:

   - The boundary between the clock core and clock providers (e.g clock
     drivers) is now more well defined with dedicated provider helper
     functions.  struct clk no longer maps 1:1 with the hardware clock
     but is a true per-user cookie which helps us tracker users of
     hardware clocks and debug bad behavior.

   - The addition of rate constraints for clocks.  Rate ranges are now
     supported which are analogous to the voltage ranges in the
     regulator framework.

  Unfortunately these changes to the core created some breakeage.  We
  think we fixed it all up but for this reason there are lots of last
  minute commits trying to undo the damage"

* tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux: (113 commits)
  clk: Only recalculate the rate if needed
  Revert "clk: mxs: Fix invalid 32-bit access to frac registers"
  clk: qoriq: Add support for the platform PLL
  powerpc/corenet: Enable CLK_QORIQ
  clk: Replace explicit clk assignment with __clk_hw_set_clk
  clk: Add __clk_hw_set_clk helper function
  clk: Don't dereference parent clock if is NULL
  MIPS: Alchemy: Remove bogus args from alchemy_clk_fgcs_detr
  clkdev: Always allocate a struct clk and call __clk_get() w/ CCF
  clk: shmobile: div6: Avoid division by zero in .round_rate()
  clk: mxs: Fix invalid 32-bit access to frac registers
  clk: omap: compile legacy omap3 clocks conditionally
  clkdev: Export clk_register_clkdev
  clk: Add rate constraints to clocks
  clk: remove clk-private.h
  pci: xgene: do not use clk-private.h
  arm: omap2+ remove dead clock code
  clk: Make clk API return per-user struct clk instances
  clk: tegra: Define PLLD_DSI and remove dsia(b)_mux
  clk: tegra: Add support for the Tegra132 CAR IP block
  ...
2015-02-21 12:30:30 -08:00
Michael Turquette 42ed83f516 arm: omap2+ remove dead clock code
Remove omap_clocks_register and dummy_ck. The former is not used anymore
now that the statically defined clk stuctures are replaced with proper
descriptors and registered with the framework.

The dummy clock in arch/arm/mach-omap2 is made redundant by the OMAP3+
clock data that migrated to drivers/clk.

An additional benefit to this clean-up is removing the references to
clk-private.h which will be removed.

Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
2015-02-02 14:23:39 -08:00
Tomeu Vizoso 035a61c314 clk: Make clk API return per-user struct clk instances
Moves clock state to struct clk_core, but takes care to change as little API as
possible.

struct clk_hw still has a pointer to a struct clk, which is the
implementation's per-user clk instance, for backwards compatibility.

The struct clk that clk_get_parent() returns isn't owned by the caller, but by
the clock implementation, so the former shouldn't call clk_put() on it.

Because some boards in mach-omap2 still register clocks statically, their clock
registration had to be updated to take into account that the clock information
is stored in struct clk_core now.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
[mturquette@linaro.org: adapted clk_has_parent to struct clk_core
                        applied OMAP3+ DPLL fix from Tero & Tony]
2015-02-02 14:22:19 -08:00
Rickard Strandqvist cecec93df8 ARM: OMAP2+: dpll44xx.c: Remove unused function
Remove the function omap4_dpllmx_gatectrl_read() that is not used anywhere.

This was partially found by using a static code analysis program called cppcheck.

Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-07 09:53:51 -08:00
Tony Lindgren f577fc52a6 Merge branch 'omap-for-v3.19/fixes-not-urgent' into omap-for-v3.19/fixes 2014-12-10 08:25:50 -08:00
Tero Kristo f0d2f68a63 ARM: OMAP3: clock: use clk_features flags for omap3 DPLL4 checks
DPLL4 can't be reprogrammed on OMAP3430 ES1.0 due to hardware limitation.
Currently, the code does runtime omap_rev() check to see the chip it is
being executed on, instead, change this to use clk_features flags.
This avoids need for runtime omap_rev() checks.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2014-11-13 09:25:06 -07:00
Johan Hovold f7b79c98b8 ARM: OMAP2+: clock: remove unused function prototype
Remove unused function prototype that was left by commit 149c09d3a6
("ARM: AM33xx: remove old clock data and link in new clock init code")
which removed the definition.

Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-12 07:21:11 -08:00
Linus Torvalds d4e1f5a14e ARM: SoC device-tree changes for 3.17
Unlike the board branch, this keeps having large sets of changes for
 every release, but that's quite expected and is so far working well.
 
 Most of this is plumbing for various device bindings and new platforms,
 but there's also a bit of cleanup and code removal for things that
 are moved from platform code to DT contents (some OMAP clock code in
 particular).
 
 There's also a pinctrl driver for tegra here (appropriately acked),
 that's introduced this way to make it more bisectable.
 
 I'm happy to say that there were no conflicts at all with this branch
 this release, which means that changes are flowing through our tree as
 expected instead of merged through driver maintainers (or at least not
 done with conflicts).
 
 There are several new boards added, and a couple of SoCs. In no particular
 order:
 
 * Rockchip RK3288 SoC support, including DTS for a dev board that they
   have seeded with some community developers.
 * Better support for Hardkernel Exynos4-based ODROID boards.
 * CCF conversions (and dtsi contents) for several Renesas platforms.
 * Gumstix Pepper (TI AM335x) board support
 * TI eval board support for AM437x
 * Allwinner A23 SoC, very similar to existing ones which mostly has
   resulted in DT changes for support. Also includes support for an Ippo
   tablet with the chipset.
 * Allwinner A31 Hummingbird board support, not to be confused with the
   SolidRun i.MX-based Hummingboard.
 * Tegra30 Apalis board support
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Merge tag 'dt-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC device-tree changes from Olof Johansson:
 "Unlike the board branch, this keeps having large sets of changes for
  every release, but that's quite expected and is so far working well.

  Most of this is plumbing for various device bindings and new
  platforms, but there's also a bit of cleanup and code removal for
  things that are moved from platform code to DT contents (some OMAP
  clock code in particular).

  There's also a pinctrl driver for tegra here (appropriately acked),
  that's introduced this way to make it more bisectable.

  I'm happy to say that there were no conflicts at all with this branch
  this release, which means that changes are flowing through our tree as
  expected instead of merged through driver maintainers (or at least not
  done with conflicts).

  There are several new boards added, and a couple of SoCs.  In no
  particular order:

   - Rockchip RK3288 SoC support, including DTS for a dev board that
     they have seeded with some community developers.
   - Better support for Hardkernel Exynos4-based ODROID boards.
   - CCF conversions (and dtsi contents) for several Renesas platforms.
   - Gumstix Pepper (TI AM335x) board support
   - TI eval board support for AM437x
   - Allwinner A23 SoC, very similar to existing ones which mostly has
     resulted in DT changes for support.  Also includes support for an
     Ippo tablet with the chipset.
   - Allwinner A31 Hummingbird board support, not to be confused with
     the SolidRun i.MX-based Hummingboard.
   - Tegra30 Apalis board support"

* tag 'dt-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (334 commits)
  ARM: dts: Enable USB host0 (EHCI) on rk3288-evb
  ARM: dts: add rk3288 ehci usb devices
  ARM: dts: Turn on USB host vbus on rk3288-evb
  ARM: tegra: apalis t30: fix device tree compatible node
  ARM: tegra: paz00: Fix some indentation inconsistencies
  ARM: zynq: DT: Clarify Xilinx Zynq platform
  ARM: dts: rockchip: add watchdog node
  ARM: dts: rockchip: remove pinctrl setting from radxarock uart2
  ARM: dts: Add missing pinctrl for uart0/1 for exynos3250
  ARM: dts: Remove duplicate 'interrput-parent' property for exynos3250
  ARM: dts: Add TMU dt node to monitor the temperature for exynos3250
  ARM: dts: Specify MAX77686 pmic interrupt for exynos5250-smdk5250
  ARM: dts: cypress,cyapa trackpad is exynos5250-Snow only
  ARM: dts: max77686 is exynos5250-snow only
  ARM: zynq: DT: Remove DMA from board DTs
  ARM: zynq: DT: Add CAN node
  ARM: EXYNOS: Add exynos5260 PMU compatible string to DT match table
  ARM: dts: Add PMU DT node for exynos5260 SoC
  ARM: EXYNOS: Add support for Exynos5410 PMU
  ARM: dts: Add PMU to exynos5410
  ...
2014-08-08 11:16:58 -07:00
Tero Kristo 066edb2d57 ARM: OMAP2+: clock/interface: add a clk_features definition for idlest value
Helps to get rid of some runtime cpu_is_x checks. This also allows eventual
migration of the code under clock driver.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2014-07-15 14:09:13 -06:00
Tero Kristo 2337c5b58b ARM: OMAP2+: clock/dpll: add jitter correction behind clk_features
Currently DPLL code uses runtime cpu_is_343x checks to see if the DPLL
has freqsel fields in its control register or not. Instead, add a new
flag to the clk_features.flags and use this during runtime. Allows
eventual move of the DPLL code under clock driver.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2014-07-15 14:09:10 -06:00
Tero Kristo 512d91cbd9 ARM: OMAP2+: clock/dpll: convert bypass check to use clk_features
OMAP2 DPLL code for checking whether DPLL is in bypass mode now uses
clk_features data provided during boot. This avoids the need to use
cpu_is_X type checks runtime, and allows us to eventually move the
clock code under the clock driver.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2014-07-15 14:09:06 -06:00
Tero Kristo a24886e263 ARM: OMAP2+: clock: add fint values to the ti_clk_features struct
These are SoC specific and get their init values based on the SoC type.
Previously the values were hard coded within the DPLL clock code, but
having them inside the clock features avoids runtime cpu_is_X type checks.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2014-07-15 14:08:59 -06:00
Tero Kristo 8111e01045 ARM: OMAP2+: clock: introduce ti_clk_features flags
This shall be used to replace the cpu type checks around the clock code.
Actual bit values will be introduced in patches later.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2014-07-15 14:08:55 -06:00
Tero Kristo 0b6fbd68b2 ARM: OMAP4+: clock: remove DEFINE_CLK_OMAP_HSDIVIDER macro
This clock type declaration is no longer used as all omap4+ SoC clock
data has been moved to DT, thus remove it.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2014-07-11 03:51:16 -06:00
Tero Kristo a37f05ac09 ARM: OMAP2420: clock: get rid of fixed-div property use
Cleans up the code a bit and is useful for clock data DT conversion.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-07-02 15:06:31 +03:00
Tero Kristo de74257074 CLK: TI: interface: add support for omap2430 specific interface clock
OMAP2430 I2CHS modules require specific hardware ops to be used, so added
a new compatible string for this.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-05-28 12:30:12 +03:00
Tero Kristo 4d008589e2 CLK: TI: APLL: add support for omap2 aplls
This patch adds support for omap2 type aplls, which have gating and
autoidle functionality.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-05-28 12:30:02 +03:00
Tero Kristo aa76fcf473 CLK: TI: DPLL: add support for omap2 core dpll
OMAP2 has slightly different DPLL compared to later OMAP generations.
This patch adds support for the ti,omap2-dpll-core-clock and also adds
the bindings documentation.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-05-28 12:28:20 +03:00
Tero Kristo 3ada6b10aa ARM: OMAP2+: clock: add support for indexed memmaps
Using indexed memmaps is required for isolating the actual memory access
from the clock code. Now, the driver providing the support for the clock IP
block provides the low level routines for reading/writing clock registers
also.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17 12:36:57 -08:00
Tero Kristo 24582b3407 CLK: TI: add interface clock support for OMAP3
OMAP3 has interface clocks in addition to functional clocks, which
require special handling for the autoidle and idle status register
offsets mainly.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17 12:35:45 -08:00
Tero Kristo 45622e2162 CLK: TI: add am33xx clock init file
clk-33xx.c now contains the clock init functionality for am33xx, including
DT clock registration and adding of static clkdev entries.

This patch also moves the omap2_clk_enable_init_clocks declaration to
the driver include, as this is needed by the am33xx clock init code.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17 12:35:41 -08:00
Tero Kristo 21876ea566 CLK: TI: add omap4 clock init file
clk-44xx.c now contains the clock init functionality for omap4, including
DT clock registration and adding of static clkdev entries.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17 12:35:20 -08:00
Tero Kristo 975e15487d clk: ti: add composite clock support
This is a multipurpose clock node, which contains support for multiple
sub-clocks. Uses basic composite clock type to implement the actual
functionality, and TI specific gate, mux and divider clocks.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17 12:35:01 -08:00
Tero Kristo f38b0dd63f CLK: TI: Add DPLL clock support
The OMAP clock driver now supports DPLL clock type. This patch also
adds support for DT DPLL nodes.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-17 12:34:55 -08:00
Tero Kristo 818b40e500 ARM: OMAP3: clock: add API to enable/disable autoidle for a single clock
Some drivers require direct access to the autoidle functionality of the
interface clocks. Added clock APIs for these, so that the drivers do not
need to access CM registers directly.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-10-19 10:11:51 -06:00
J Keerthy 78e52e026d ARM: OMAP2+: clock data: Remove CK_* flags
The patch removes all the CK_* which were used to identify the family of
processors for which the individual clocks belonged to. Instead now separate
lists are created based on the family of processors.

Boot Tested on: OMAP4430, OMAP4460, Beagle-board, AM33X boards, OMAP2 boards.

Signed-off-by: J Keerthy <j-keerthy@ti.com>
Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Tested-by: Jon Hunter <jon-hunter@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
[paul@pwsan.com: changed omap_clock_register_links() to omap_clocks_register();
 updated to apply]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-03-18 09:57:39 -06:00
Afzal Mohammed 601155b04c ARM: OMAP2+: clock data: add DEFINE_STRUCT_CLK_FLAGS helper
DEFINE_STRUCT_CLK does not have the capability to set flags, define
DEFINE_STRUCT_CLK_FLAGS to handle flags. This is needed to add
SET_RATE_PARENT flag in statically defined lcd clock in am335x.

Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-01-31 09:27:49 -07:00
Jon Hunter 3ff51ed828 ARM: OMAP4: Enhance support for DPLLs with 4X multiplier
On OMAP4 devices, the ABE DPLL has an internal 4X multiplier that can
be enabled or disabled in addition to the standard configurable
multiplier (M) for OMAP DPLLs. When configuring the ABE DPLL the 4X
multiplier is accounted for by checking to see whether it is enabled or
not. However, when calculating a new rate we only check to see if the
rate can be achieved with the current setting for the 4X multiplier.
Enhance the round_rate() function for such DPLLs to see if the rate
can be achieved with the 4X multiplier if it cannot be achieved without
the 4X multiplier.

This change is necessary, because when using the 32kHz clock as the
source clock for the ABE DPLL, the default DPLL frequency for the ABE
DPLL cannot be achieved without enabling the 4X multiplier.

When using the 32kHz clock as the source clock for the ABE DPLL and
attempting to lock the DPLL to 98.304MHz (default frequency), it was
found that the DPLL would fail to lock if the low-power mode for the DPLL
was not enabled. From reviewing boot-loader settings that configure the
ABE DPLL it was found that the low-power mode is enabled when using the
32kHz clock source, however, the documentation for OMAP does not state
that this is a requirement. Therefore, introduce a new function for
OMAP4 devices to see if low-power mode can be enabled when calculating a
new rate to ensure the DPLL will lock.

New variables for the last calculated 4X multiplier and low-power
setting have been added to the dpll data structure as well as variables
defining the bit mask for enabling these features via the DPLL's
control_reg. It is possible that we could eliminate these bit masks from
the dpll data structure as these bit masks are not unique to OMAP4, if
it is preferred.

The function omap3_noncore_program_dpll() has been updated to avoid
passing the calculated values for the multiplier (M) and divider (N) as
these are stored in the clk structure.

Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-12-15 01:35:46 -07:00
Mike Turquette f9ae32a74f ARM: OMAP2+: clock: Cleanup !CONFIG_COMMON_CLK parts
Clean all #ifdef's added to common clock code.  This code is no longer
needed due to migration to the common clock framework.

Signed-off-by: Mike Turquette <mturquette@ti.com>
[paul@pwsan.com: clean up new ifdefs added in clockdomain.c]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-11-12 19:18:51 -07:00
Rajendra Nayak 25f4214e38 ARM: OMAP3: clock: Cleanup !CONFIG_COMMON_CLK parts
Clean all #ifdef's added to OMAP3 clock code to make it COMMON clk
ready, not that CONFIG_COMMON_CLK is enabled.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Mike Turquette <mturquette@ti.com>
[paul@pwsan.com: remove some ifdefs in mach-omap2/io.c]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-11-12 19:18:50 -07:00
Rajendra Nayak cb26867ee2 ARM: OMAP4: clock: Add 44xx data using common struct clk
This patch is output from updated omap hw data autogeneration scripts
mostly contributed by Mike Turquette, with some later fixes from me.
All data is added into a new cclock44xx_data.c file which will be
switched with clock44xx_data.c file in a later patch.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: replace omap2_init_clksel_parent() with
 omap2_clksel_find_parent_index(); reflowed macros; updated
 DEFINE_STRUCT_CLK_HW_OMAP macro to include clkdm_name;
 use macros for clksel mux+gate clocks; many other fixes]
[mturquette@ti.com: converted DPLL outputs to HSDIVIDER macro; trace_clk_div_ck
 has clkdm ops]
Signed-off-by: Mike Turquette <mturquette@ti.com>
[paul@pwsan.com: fixed the omap-gpmc.fck alias per commit a2e5b90b; fixed
 several checkpatch issues; moved the dpll3xxx.c clockdomain modifications to
 another patch]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-11-12 19:10:20 -07:00
Paul Walmsley 8c725dcd22 ARM: OMAP2+: clock: add OMAP CCF convenience macros to mach-omap2/clock.h
Define four convenience macros to be used in the upcoming OMAP2+
common clock framework port.  Although the use of these macros will
make the data somewhat more difficult to read, they significantly reduce
the number of lines in the output patch data.

Most of these were created by Rajendra Nayak and Mike Turquette, as
far as I know.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
[mturquette@ti.com: added DEFINE_CLK_OMAP_HSDIVIDER macro]
Signed-off-by: Mike Turquette <mturquette@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-11-12 19:10:20 -07:00
Rajendra Nayak 8577413c0a ARM: OMAP: clock: Define a function to enable clocks at init
Platform code can use omap2_clk_enable_init_clocks() to enable a
list of clocks that are needed to be enabled at init.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Mike Turquette <mturquette@ti.com>
[paul@pwsan.com: added kerneldoc to non-trivial new function]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-11-12 19:10:19 -07:00
Rajendra Nayak 23fb8ba3a8 ARM: OMAP: clock: list all clk_hw_omap clks to enable/disable autoidle
Platforms can call omap2_init_clk_hw_omap_clocks() to register a clock
using clk_hw_omap. omap2_clk_enable_autoidle_all() and
omap2_clk_disable_autoidle_all() can then be used to run through
all the clocks which support autoidle to enable/disable them.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Mike Turquette <mturquette@ti.com>
[paul@pwsan.com: added kerneldoc on non-trivial new functions]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-11-12 19:10:18 -07:00
Rajendra Nayak b4777a2138 ARM: OMAP3: clock: Convert to common clk
Convert all OMAP3 specific platform files to use COMMON clk
and keep all the changes under the CONFIG_COMMON_CLK macro check
so it does not break any existing code. At a later point switch
to COMMON clk and get rid of all old/legacy code.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Mike Turquette <mturquette@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-11-12 19:10:18 -07:00
Mike Turquette 32cc002116 ARM: OMAP4: clock: Convert to common clk
Convert all OMAP4 specific platform files to use COMMON clk
and keep all the changes under the CONFIG_COMMON_CLK macro check
so it does not break any existing code. At a later point switch
to COMMON clk and get rid of all old/legacy code.

This converts all apis which will be called directly from COMMON
clk to take a struct clk_hw parameter, and all the internal platform
apis to take a struct clk_hw_omap parameter.

Changes are based off the original patch from Mike Turquette.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: created new omap2_clksel_find_parent_index() rather than
 modifying omap2_init_clksel_parent(); moved clkhwops_iclk_wait to
 clkt_iclk.c to fix OMAP4-only builds; added clk-provider.h include to clock.h
 to try to fix some 3430-builds]
[mturquette@ti.com: squash patch for omap2_clkops_{en,dis}able_clkdm;
 omap2_dflt_clk_is_enabled should not enable clocks]
Signed-off-by: Mike Turquette <mturquette@ti.com>
[paul@pwsan.com: fix compiler warning; update to apply; added kerneldoc on
 non-trivial new functions; added the dpll3xxx clockdomain modifications]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-11-12 13:55:50 -07:00
Rajendra Nayak b5a2366c18 ARM: OMAP: clock: Nuke plat/clock.c & reuse struct clk as clk_hw_omap
plat/clock.c which has most of usecounting/locking infrastructure will
be used only for OMAP1 until that is moved to use COMMON clk.

reuse most of what plat/clock.h has while we move to common clk, and
move most of what 'struct clk' was as 'struct clk_hw_omap' which
will then be used to define platform specific parameters.
All usecounting/locking related variables from 'struct clk' are
dropped as they will not be used with 'struct clk_hw_omap'.

Based on the original changes from Mike Turquette.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Mike Turquette <mturquette@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-11-12 13:55:49 -07:00
Paul Walmsley 187e3e06e8 ARM: OMAP2+: board files: use SoC-specific system restart functions
Modify the board files to use the SoC-specific system restart
functions.  At this point it's possible to remove omap_prcm_restart()
from mach-omap2/prcm.c.

While removing the prototypes for the now-unused restart functions, clean
up a few more obsolete prototypes in mach-omap2/clock.h.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Vaibhav Hiremath <hvaibhav@ti.com>
2012-11-08 12:33:08 -07:00
Paul Walmsley e10dd62ffc ARM: OMAP: clock: split plat/clkdev_omap.h into OMAP1/2 files
To facilitate the ARM single image work, split
arch/arm/plat-omap/include/plat/clkdev_omap.h into the
arch/arm/mach-omap1/clock.h and arch/arm/mach-omap2/clock.h files.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-10-18 16:23:30 -07:00
Paul Walmsley a135eaae52 ARM: OMAP: remove plat/clock.h
Remove arch/arm/plat-omap/include/plat/clock.h by merging it into
arch/arm/mach-omap1/clock.h and arch/arm/mach-omap2/clock.h.
The goal here is to facilitate ARM single image kernels by removing
includes via the "plat/" symlink.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
[tony@atomide.com: fixed to remove duplicate clock.h includes]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-10-18 16:23:20 -07:00
Vaibhav Hiremath e30384abd6 ARM: OMAP3+: clock33xx: Add AM33XX clock tree data
AM33XX clock implementation is different than any existing OMAP
family of devices. Although DPLL module is similar to OMAP4
device, but the usage is very much different than OMAP4.
AM33XX has different peripheral set and each module gets
integrated to the clock framework differently than OMAP
family of devices.

This patch adds full Clock tree data for AM33XX family
of devices and also integrates it into existing OMAP framework.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
CC: Tony Lindgren <tony@atomide.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
[paul@pwsan.com: updated to apply; changed 'soc_is_am33xx' to
 'cpu_is_am33xx' to match usage in Tony's current am33xx branch]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-06-29 16:16:40 -06:00
Paul Walmsley 571efa0d3b ARM: OMAP3+: clock: Move common clksel_rate & clock data to common file
OMAP3, OMAP4 and AM33xx share some common data like, clksel_rate
oscillator clock input (Virtual clock nodes), required for
clock tree; so move common data to common data file so that it
can be reused.

[hvaibhav@ti.com: Created separate commit from Paul's developement
  branch]
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-06-26 20:57:22 -06:00
Kevin Hilman 47d9e44d1d ARM: OMAP: clock: cleanup CPUfreq leftovers, fix build errors
Now that we have OPP layer, and OMAP CPUfreq driver is using it, we no
longer need/use the clock framework code for filling up CPUfreq
tables.  Remove it.

Removing this code also eliminates build errors when CPU_FREQ_TABLE
support is not enabled.

Thanks to Russell King for pointing out the parts I missed under
plat-omap in the original version and also pointing out the build
errors when CPUFREQ_TABLE support was not enabled.

Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-04-14 17:49:07 -07:00
Afzal Mohammed 9954119536 ARM: OMAP: am33xx: Update common omap platform files
This patch updates the common platform files with AM335X device
support (AM33XX family).

The approach taken in this patch is,
AM33XX device will be considered as OMAP3 variant, and a separate
SoC class created for AM33XX family of devices with a subclass type
for AM335X device, which is newly added device in the family.

This means, cpu_is_omap34xx(), cpu_is_am33xx() and cpu_is_am335x()
checks will return success on AM335X device.
A kernel config option CONFIG_SOC_OMAPAM33XX is added under OMAP3
to include support for AM33XX build.

Also, cpu_mask and RATE_IN_XXX flags have crossed 8 bit hence
struct clksel_rate.flags, struct prcm_config.flags and cpu_mask
are changed to u16 from u8.

Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Hemant Pedanekar <hemantp@ti.com>
[tony@atomide.com: left out CK_AM33XX for now]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-12-13 10:46:43 -08:00
Mike Turquette a1900f2efe ARM: OMAP4: clock: round_rate and recalc functions for DPLL_ABE
OMAP4 DPLL_ABE can enable a 4X multipler on top of the normal MN multipler
and divider. This is achieved by setting CM_CLKMODE_DPLL_ABE.DPLL_REGM4XEN
bit in CKGEN module of CM1. From the OMAP4 TRM:

Fdpll = Fref x 2 x (4 x M/(N+1)) in case REGM4XEN bit field is set (only
applicable to DPLL_ABE).

Add new round_rate() and recalc() functions for OMAP4, that check the
setting of REGM4XEN bit and handle this appropriately. The new functions
are a simple wrapper on top of the existing omap2_dpll_round_rate() and
omap2_dpll_get_rate() functions to handle the REGM4XEN bit.

The REGM4XEN bit is only implemented for the ABE DPLL on OMAP4 and so
only dpll_abe_ck uses omap4_dpll_regm4xen_round_rate() and
omap4_dpll_regm4xen_recalc() functions.

Signed-off-by: Mike Turquette <mturquette@ti.com>
Tested-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
[paul@pwsan.com: fixed attempt to return a negative from a fn returning
		 unsigned; pass along errors from omap2_dpll_round_rate();
		 added documentation; added Jon's S-o-b]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2011-10-07 00:52:58 -06:00
Paul Walmsley 12706c5425 OMAP2+: clock: allow per-SoC clock init code to prevent clockdomain calls from clock code
The OMAP2/3 clock code was written to notify the clockdomain code when
the first clock in a clockdomain is enabled and when the last enabled
clock in a clockdomain is disabled.  OMAP4 requires a different
approach: the hwmod code needs to signal the clockdomain code when to
force-enable and auto-idle a clockdomain during the IP block enable
process.  The current conjecture is that once that hwmod sequence is
implemented, it will no longer be necessary for the clock code to call
into the clockdomain code for "optional clocks" on OMAP4.

Add a static flag to the OMAP2+ clock code, clkdm_control, that by
default preserves the OMAP2/3 behavior.  Also add a function,
omap2_clk_disable_clkdm_control(), intended to be called from OMAP4
and beyond clock initcalls, that disables the old behavior.

Part of this patch was originally based on a patch by Rajendra Nayak
<rnayak@ti.com>.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: BenoƮt Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
2011-07-10 05:57:06 -06:00