62e59c4e69
clk: Remove io.h from clk-provider.h
...
Now that we've gotten rid of clk_readl() we can remove io.h from the
clk-provider header and push out the io.h include to any code that isn't
already including the io.h header but using things like readl/writel,
etc.
Found with this grep:
git grep -l clk-provider.h | grep '.c$' | xargs git grep -L 'linux/io.h' | \
xargs git grep -l \
-e '\<__iowrite32_copy\>' --or \
-e '\<__ioread32_copy\>' --or \
-e '\<__iowrite64_copy\>' --or \
-e '\<ioremap_page_range\>' --or \
-e '\<ioremap_huge_init\>' --or \
-e '\<arch_ioremap_pud_supported\>' --or \
-e '\<arch_ioremap_pmd_supported\>' --or \
-e '\<devm_ioport_map\>' --or \
-e '\<devm_ioport_unmap\>' --or \
-e '\<IOMEM_ERR_PTR\>' --or \
-e '\<devm_ioremap\>' --or \
-e '\<devm_ioremap_nocache\>' --or \
-e '\<devm_ioremap_wc\>' --or \
-e '\<devm_iounmap\>' --or \
-e '\<devm_ioremap_release\>' --or \
-e '\<devm_memremap\>' --or \
-e '\<devm_memunmap\>' --or \
-e '\<__devm_memremap_pages\>' --or \
-e '\<pci_remap_cfgspace\>' --or \
-e '\<arch_has_dev_port\>' --or \
-e '\<arch_phys_wc_add\>' --or \
-e '\<arch_phys_wc_del\>' --or \
-e '\<memremap\>' --or \
-e '\<memunmap\>' --or \
-e '\<arch_io_reserve_memtype_wc\>' --or \
-e '\<arch_io_free_memtype_wc\>' --or \
-e '\<__io_aw\>' --or \
-e '\<__io_pbw\>' --or \
-e '\<__io_paw\>' --or \
-e '\<__io_pbr\>' --or \
-e '\<__io_par\>' --or \
-e '\<__raw_readb\>' --or \
-e '\<__raw_readw\>' --or \
-e '\<__raw_readl\>' --or \
-e '\<__raw_readq\>' --or \
-e '\<__raw_writeb\>' --or \
-e '\<__raw_writew\>' --or \
-e '\<__raw_writel\>' --or \
-e '\<__raw_writeq\>' --or \
-e '\<readb\>' --or \
-e '\<readw\>' --or \
-e '\<readl\>' --or \
-e '\<readq\>' --or \
-e '\<writeb\>' --or \
-e '\<writew\>' --or \
-e '\<writel\>' --or \
-e '\<writeq\>' --or \
-e '\<readb_relaxed\>' --or \
-e '\<readw_relaxed\>' --or \
-e '\<readl_relaxed\>' --or \
-e '\<readq_relaxed\>' --or \
-e '\<writeb_relaxed\>' --or \
-e '\<writew_relaxed\>' --or \
-e '\<writel_relaxed\>' --or \
-e '\<writeq_relaxed\>' --or \
-e '\<readsb\>' --or \
-e '\<readsw\>' --or \
-e '\<readsl\>' --or \
-e '\<readsq\>' --or \
-e '\<writesb\>' --or \
-e '\<writesw\>' --or \
-e '\<writesl\>' --or \
-e '\<writesq\>' --or \
-e '\<inb\>' --or \
-e '\<inw\>' --or \
-e '\<inl\>' --or \
-e '\<outb\>' --or \
-e '\<outw\>' --or \
-e '\<outl\>' --or \
-e '\<inb_p\>' --or \
-e '\<inw_p\>' --or \
-e '\<inl_p\>' --or \
-e '\<outb_p\>' --or \
-e '\<outw_p\>' --or \
-e '\<outl_p\>' --or \
-e '\<insb\>' --or \
-e '\<insw\>' --or \
-e '\<insl\>' --or \
-e '\<outsb\>' --or \
-e '\<outsw\>' --or \
-e '\<outsl\>' --or \
-e '\<insb_p\>' --or \
-e '\<insw_p\>' --or \
-e '\<insl_p\>' --or \
-e '\<outsb_p\>' --or \
-e '\<outsw_p\>' --or \
-e '\<outsl_p\>' --or \
-e '\<ioread8\>' --or \
-e '\<ioread16\>' --or \
-e '\<ioread32\>' --or \
-e '\<ioread64\>' --or \
-e '\<iowrite8\>' --or \
-e '\<iowrite16\>' --or \
-e '\<iowrite32\>' --or \
-e '\<iowrite64\>' --or \
-e '\<ioread16be\>' --or \
-e '\<ioread32be\>' --or \
-e '\<ioread64be\>' --or \
-e '\<iowrite16be\>' --or \
-e '\<iowrite32be\>' --or \
-e '\<iowrite64be\>' --or \
-e '\<ioread8_rep\>' --or \
-e '\<ioread16_rep\>' --or \
-e '\<ioread32_rep\>' --or \
-e '\<ioread64_rep\>' --or \
-e '\<iowrite8_rep\>' --or \
-e '\<iowrite16_rep\>' --or \
-e '\<iowrite32_rep\>' --or \
-e '\<iowrite64_rep\>' --or \
-e '\<__io_virt\>' --or \
-e '\<pci_iounmap\>' --or \
-e '\<virt_to_phys\>' --or \
-e '\<phys_to_virt\>' --or \
-e '\<ioremap_uc\>' --or \
-e '\<ioremap\>' --or \
-e '\<__ioremap\>' --or \
-e '\<iounmap\>' --or \
-e '\<ioremap\>' --or \
-e '\<ioremap_nocache\>' --or \
-e '\<ioremap_uc\>' --or \
-e '\<ioremap_wc\>' --or \
-e '\<ioremap_wc\>' --or \
-e '\<ioremap_wt\>' --or \
-e '\<ioport_map\>' --or \
-e '\<ioport_unmap\>' --or \
-e '\<ioport_map\>' --or \
-e '\<ioport_unmap\>' --or \
-e '\<xlate_dev_kmem_ptr\>' --or \
-e '\<xlate_dev_mem_ptr\>' --or \
-e '\<unxlate_dev_mem_ptr\>' --or \
-e '\<virt_to_bus\>' --or \
-e '\<bus_to_virt\>' --or \
-e '\<memset_io\>' --or \
-e '\<memcpy_fromio\>' --or \
-e '\<memcpy_toio\>'
I also reordered a couple includes when they weren't alphabetical and
removed clk.h from kona, replacing it with clk-provider.h because
that driver doesn't use clk consumer APIs.
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Mark Brown <broonie@kernel.org>
Cc: Chris Zankel <chris@zankel.net>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: John Crispin <john@phrozen.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-05-15 13:21:37 -07:00
00e6751ffc
clk: rockchip: add sclk_timer5 as critical clock on rk3128
...
sclk_timer5 is for arm arch counter, so need always on.
but no dts node to handle this clk, so make it as critical clock
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-09-17 01:55:36 +02:00
a4eb286565
clk: rockchip: fix up rk3128 pvtm and mipi_24m gate regs error
...
A copy-paste error made them use the wrong bits in the register.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-09-17 01:55:36 +02:00
e8620acc90
clk: rockchip: add pclk_pmu as critical clock on rk3128
...
pclk_pmu need always on, and no dts node to handle this clk,
so make it as critical clock
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-09-17 01:55:36 +02:00
3346140588
clk: rockchip: modify rk3128 clk driver to also support rk3126
...
rk3128 and rk3126 have some gate registers describe differences.
So need to make some distinctions.
The RK3126 and RK3128 Same clock description we move it to
the common clock branches.
And the different clks description use the own clock branches.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-08-08 17:30:29 +02:00
f6022e88fa
clk: rockchip: add clock controller for rk3128
...
Add the clock tree definition for the new rk3128 SoC.
And it also applies to the RK3126 SoC.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2017-06-02 14:49:35 +02:00
Stephen Boyd