Commit graph

4 commits

Author SHA1 Message Date
Jerome Brunet de3c1e71d4 clk: meson: expose GEN_CLK clkid
Expose GEN_CLK clock id

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2018-07-09 13:37:31 +02:00
Yixun Lan 6c0ad1df17 clk: meson-axg: add pcie and mipi clock bindings
Add the pcie and mipi clock dt-bindings for the pcie driver.

Since the mipi clock isalso used by the pcie driver,
we add it together in this patch.

Tested-by: Jianxin Qin <jianxin.qin@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2018-07-03 10:55:10 +02:00
Jerome Brunet a4fb7df25d clk: meson: axg: add hifi clock bindings
Add the new HIFI pll to axg clock bindings

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2018-03-13 10:09:52 +01:00
Qiufang Dai 7e5c90e0ed clk: meson-axg: add clocks dt-bindings required header
Add the required header for the clocks ID dt-bindings
exported from various subsystem in the Meson-AXG SoC.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2017-12-14 10:14:20 +01:00