Commit graph

7 commits

Author SHA1 Message Date
Paul Walmsley d41ad52040 [ARM] OMAP3: update ES level flags to discriminate between post-ES2 revisions
Some OMAP3 chip behaviors change in ES levels after ES2.  Modify the
existing omap_chip flags to add options for ES3.0 and ES3.1.

Add a new macro, CHIP_GE_OMAP3430ES2, to cover ES levels from ES2
onwards - a common pattern for OMAP3 features.  Update all current
users of the omap_chip macros to use this new macro.

Also add CHIP_GE_OMAP3430ES3_1 to cover the USBTLL SAR errata case
(described and fixed in the following patch)

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-02-23 14:52:51 +00:00
Jouni Hogander f266950d02 [ARM] OMAP3: PM: Emu_pwrdm is switched off by hardware even when sdti is in use
Using sdti doesn't keep emu_pwrdm on if hardware supervised pwrdm
transitions are used. This causes sdti stop to work when power
management is initialized and hardware supervised pwrdm control is
enabled. This patch disables hardware supervised pwrdm control for
emu_pwrdm. Now emu_pwrdm is switched off on boot by software when it
is not used.

Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-02-08 17:50:32 +00:00
Paul Walmsley 46e0ccf8ae [ARM] OMAP3 PRCM: add DPLL1-5 powerdomains, clockdomains; mark clocks
Each DPLL exists in its own powerdomain (cf 34xx TRM figure 4-18) and
clockdomain; so, create powerdomain and clockdomain structures for them.
Mark each DPLL clock as belonging to their respective DPLL clockdomain.
cf. 34xx TRM Table 4-27 (among other references).

linux-omap source commits are acdb615850b9b4f7d1ab68133a16be8c8c0e7419 and
a8798a48f33e9268dcc7f30a4b4a3ce4220fe0c9.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-02-08 17:50:30 +00:00
Paul Walmsley d37f1a1367 [ARM] OMAP2/3 clockdomains: add CM and PRM clkdms
Add clockdomains for the CM and PRM.  These will ultimately replace the
"wkup_clkdm", which appears to not actually exist on the hardware.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-02-08 17:50:29 +00:00
Paul Walmsley 5b74c67660 [ARM] OMAP2/3 clockdomains: combine pwrdm, pwrdm_name into union in struct clockdomain
struct clockdomain contains a struct powerdomain *pwrdm and const char
*pwrdm_name.  The pwrdm_name is only used at initialization to look up
the appropriate pwrdm pointer.  Combining these into a union saves
about 100 bytes on 3430SDP.  This patch should not cause any change in
kernel function.

Updated to gracefully handle autodeps that contain invalid powerdomains,
per Russell King's review comments.

Boot-tested on BeagleBoard ES2.1.

linux-omap source commit is 718fc6cd4db902aa2242a736cc3feb8744a4c71a.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-02-08 17:50:28 +00:00
Paul Walmsley 333943ba9e ARM: OMAP2: Clockdomain: Integrate OMAP3 clocks with clockdomain code
This patch integrates the OMAP3 clock tree with the clockdomain code.
This patch:

- marks OMAP34xx clocks with their corresponding clockdomain.

- adds code to convert the clockdomain name to a clockdomain pointer in the
  struct clk during clk_register().

- modifies OMAP2 clock usecounting to call into the clockdomain code
  when clocks are enabled or disabled.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-08-19 11:08:45 +03:00
Paul Walmsley 801954d3de ARM: OMAP2: Clockdomain: Encode OMAP2/3 clockdomains
Add clockdomain definitions for OMAP24xx and OMAP34xx chips.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2008-08-19 11:08:44 +03:00