The here used irq and threaded irq handler is a complete non-sense. After
the status register is read and the source disabled it schedules a thread
(the irq thread) to read the status from the variable, invoke complete()
and then renable the interrupt. Again: schedule a thread which invokes
_only_ complete().
This patch removes this non-sense and we remain with one handler which
invokes complete() if needed.
The device remove path should now disable the interupts.
This has been compile time tested.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Tested-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Add dual/quad read mode bit flag for the master controller.
These check will be used in the spi framework to determine
whether the master controller can do dual/quad read respectively.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Use devm_spi_register_master() to make cleanup paths simpler,
and remove unnecessary remove().
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Add the missing unlock before return from function ti_qspi_start_transfer_one()
in the error handling case.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mark Brown <broonie@linaro.org>
Fix module device table entry. Without this, there will
be a build failure while trying to build qspi as a module.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Support for multiple lines in SPI framework has been picked[1].
[1]: http://comments.gmane.org/gmane.linux.kernel.spi.devel/14420
Hence, adapting ti qspi driver to support multiple data lines for read.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The patch add basic support for the quad spi controller.
QSPI is a kind of spi module that allows single,
dual and quad read access to external spi devices. The module
has a memory mapped interface which provide direct interface
for accessing data form external spi devices.
The patch will configure controller clocks, device control
register and for defining low level transfer apis which
will be used by the spi framework to transfer data to
the slave spi device(flash in this case).
Test details:
-------------
Tested this on dra7 board.
Test1: Ran mtd_stesstest for 40000 iterations.
- All iterations went through without failure.
Test2: Use mtd utilities:
- flash_erase to erase the flash device
- mtd_debug read to read data back.
- mtd_debug write to write to the data flash.
diff between the write and read data shows zero.
Acked-by: Felipe Balbi<balbi@ti.com>
Reviewed-by: Felipe Balbi<balbi@ti.com>
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
