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4 Commits (75b7329a4f08b3d2566afa25cfaddc8ddfb6dfa1)

Author SHA1 Message Date
Thomas Gleixner 9c92ab6191 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282
Based on 1 normalized pattern(s):

  this software is licensed under the terms of the gnu general public
  license version 2 as published by the free software foundation and
  may be copied distributed and modified under those terms this
  program is distributed in the hope that it will be useful but
  without any warranty without even the implied warranty of
  merchantability or fitness for a particular purpose see the gnu
  general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 285 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.642774971@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:36:37 +02:00
Abhishek Sahu e1f34e4f27 dt-bindings: clock: qcom: add misc resets for PCIE and NSS
PCIE and NSS has MISC reset register in which single register has
multiple reset bit. The patch adds the DT bindings for these MISC
resets.

Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-21 16:03:38 -08:00
Abhishek Sahu 8c1c2c5a96 dt-bindings: clock: qcom: add remaining clocks for IPQ8074
This patch adds the DT bindings for following IPQ8074 clocks

 - General PLL’s, NSS UBI PLL and NSS Crypto PLL.
 - 2 instances of PCIE, USB, SDCC.
 - 2 NSS UBI core and common NSS clocks. NSS is network switching
   system which accelerates the ethernet traffic. IPQ8074
   NSS has two UBI cores. Some clocks are separate for each UBI core
   and remaining NSS clocks are common.
 - NSS ethernet port clocks. IPQ8074 has 6 ethernet ports and
   each port uses different TX and RX clocks.
 - Crypto engine clocks.
 - General purpose clocks which comes over GPIO.

Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-21 16:03:28 -08:00
Abhishek Sahu bcb486f026 clk: qcom: Add DT bindings for ipq8074 gcc clock controller
Add the compatible strings and the include file for ipq8074 gcc
clock controller.

Acked-by: Rob Herring <robh@kernel.org> (bindings)
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-06-19 17:29:39 -07:00