The bit DIV0 of register STORE9_STATIC is used as a control bit
to fix the unsynchronization issue bewteen two display streams
in FrameGen side-by-side mode, which is introduced from an ECO
operation for the display controller. The bit has to be one
when the side-by-side mode is enabled. And, it has to be zero
when the mode is disabled, otherwise, a single display stream
cannot startup correctly. Since the DPU common driver initializes
the register for us at the driver probe stage and system resume
stage, we may remove the same initialization logic of our own.
Without this patch, as the DPU blit engine DRM driver is resumed
relatively late, the bit would be overwritten to be zero at the
driver's ->resume() callback, which causes the display controller
cannot be correctly resumed from FrameGen side-by-side mode and
content ExtDst shadow load done event from the slave stream won't
come.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
video playback cause system hang with Wayland g2d compositor,
this also can be reproduced with Android G2D HWComposer.
the problem is second prg not handled between GPU and video.
need re-enable dprc & prg pipes when modifier changed.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit 8ca7df522719ac94d126d34618cc9d25a2798660)
auto-trigger cause dpr hang in inital blitter implementation,
the problem is dpr repeat mode has conflict with command sequencer.
as proposed by design, blitter need do manual trigger for each process:
dpr register -> dpr run -> seeris register -> seeris trigger -> sync
frstly this patch removed dprc first frame handler from dpu blitter,
then removed dpr repeat, and enable dpr run for each blit processing.
also add sync flag to avoid the duplicated calling to dpu_be_wait.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit 04eb0533d5008ab20aae1e0acb9e4d8b910d82e5)
chrome browser hang is reproduced with mouse connected,
the first frame handler trigger the problem in below scenario:
tile (dprc-enable) --> linear (dprc->disable) --> tile (handle first frame wrongly).
need_handle_start is set following dprc_enable, need reset it with dprc_disable.
fix event trigger as previous implementation does not flush command sequence,
that will cause the obvious flicker when run glmark2 in full-screen.
also reduce bitter delay to 30us to improve blitter performance.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit 9b5700a98e9b12b9d0119a67e45251a8d2405628)
resume will increase unlock counter, max allowed value is 15.
suspend need decrease unlock counter to avoid overflow panic.
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
(cherry picked from commit 0582cd50ed70f932158fe20d6caf2f4ad68eabf0)
(cherry picked from commit a9b740f91b05398564bf776e4f1959e44c876938)
Add struct drm_imx_dpu_frame_info.
Configure dprc to enable prefetch for dpu blit.
Configure prefetch with source frame info for dpu blit.
Signed-off-by: Meng Mingming <mingming.meng@nxp.com>
Liu Ying