The WM8731 codec on sam9x5ek board is on i2c, address 1A
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Acked-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The PQFP version have only 3 gpio banks (A, B & C).
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
[nicolas.ferre@atmel.com: correct typo in "status" property]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Correct pin number of gpio-key for at91sam9n12ek board.
The pioB4 is connect to LED, the pioB3 use as gpio-key.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
ARM Performance Monitor Units are available on the sama5d3, add the support in
the dtsi.
Tested with perf and oprofile on the sama5d31ek.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
pinctrl-names was missing causing mmc pinctrl to never be requested.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
[nicolas.ferre@atmel.com: added a commit message taken from Ludovic]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add DT property to tell the regulator to register pm_power_off to make
"shutdown" work.
Signed-off-by: Bill Huang <bilhuang@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
This branch contains all *.dts (device tree) changes for Tegra.
New features enabled are:
* PMICs on Dalmore
* CPU power-gating on Dalmore
* HDMI output on Beaver
* LP1 system suspend mode on almost all boards
* PCIe support on numerous Tegra20/30 boards
* USB support on Tegra30/114 boards
* Audio capture on Beaver and Dalmore
* Temperature sensor on Cardhu.
... along with a few DT cleanups.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSDl1bAAoJEMzrak5tbycx9N0P/RJ+R5z65hOQTDXn7fZ03o0P
BZEhClVNyzo+K0SDLM/fwT4g8HfvNKOW34N53dknT9jKRH/bfEbAGFUl5KJl0l6g
KsDLWXGOVWms7OYmCxykUH8xkHjkVO6tefQb0xJiqdt7wuRWupV3zgrA7aLaohnB
5FzA4mCcW+Mlyi3796uU8Ko5/QwsE8wpOBPK6phuE9+REL5bSWaxiGKg+oSBHLnF
0rF+7NxIQMLVZ1nXbZzZP8BrItufzcBYQTN95VPD023qCZIAQANApm8Aotr31FzF
XmtEyt5rP20+8NFGhVlGv/RMV70QgQzE1IRJlHRwLYw3CLA1X5o81c5LV2IBdlcY
TOR4QndOH8cUohVNnkcapHFEary8IAEA6C+eEReAPbARXcg6Oh4oMDMQ1RJEdulj
YdNraC0VEzlrByJ/ZAhrF9DeDmSnlOYcooEHq/lWgq3nYOWDjiJEoAozFAQV5zS6
1X+cpPwwCA4S9sVcVpnTrCMq1KG9wrSNFmHT6x2N1bf/1BxhmgaMXSSTQ8EpJY0I
9iPZAOd2g04ownHd8hJWBmzwT8hZ0wbPhtC/0E9O1n6zh8YAArUKZkK23Bv4aemN
qUbjOR2mjEyWNG0MN2h7CqFuU4NtAgc3kXrbPPAl9CYxJZJ2kdNmHvDkl0Y2QJ7S
iPPJS7F8r60QQI+1LNqP
=RGgU
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.12-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt
From: Stephen Warren:
ARM: tegra: device tree changes for 3.12
This branch contains all *.dts (device tree) changes for Tegra.
New features enabled are:
* PMICs on Dalmore
* CPU power-gating on Dalmore
* HDMI output on Beaver
* LP1 system suspend mode on almost all boards
* PCIe support on numerous Tegra20/30 boards
* USB support on Tegra30/114 boards
* Audio capture on Beaver and Dalmore
* Temperature sensor on Cardhu.
... along with a few DT cleanups.
* tag 'tegra-for-3.12-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (25 commits)
ARM: tegra: add Mic Jack to Dalmore device tree
ARM: tegra: add Mic Jack to Beaver device tree
ARM: tegra: add USB DT entries for Tegra114, Dalmore
ARM: tegra: add USB DT entries for Tegra30
ARM: dts: tegra: Increase prefetchable PCI memory space
ARM: tegra: Fix Beaver's PCIe lane configuration
ARM: tegra: Enable PCIe controller on Beaver
ARM: tegra: Enable PCIe controller on Cardhu
ARM: tegra: Add Tegra30 PCIe support
ARM: tegra: trimslice: Initialize PCIe from DT
ARM: tegra: harmony: Initialize PCIe from DT
ARM: tegra: tec: Add PCIe support
ARM: tegra: tamonten: Add PCIe support
ARM: tegra: Add Tegra20 PCIe support to DT
ARM: tegra: enable LP1 suspend mode
ARM: tegra: beaver: Enable HDMI output
ARM: tegra: use TEGRA_GPIO() in a couple more places
ARM: tegra: dalmore: fix the irq trigger type of Palmas MFD device
ARM: tegra: define valid function names in DT document
ARM: tegra: dalmore: add PM configurations for PMC
...
development cycle:
- Various cleanups like remove non-existant hardware from
the Snowball device tree, prefix all files with "ste-*"
- External regulators
- Documentation updates
- Delete some minor dangling platform data
- Pin control settings for U8540 through DT
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.13 (GNU/Linux)
iQIcBAABAgAGBQJSDfMsAAoJEEEQszewGV1zg+cQAJBUM8IRpck+wgYyhEL9TsfO
Lt98kq8fw2iiC3wYbC6VtGVTocOuaum6wchwuOPjK2bylPggrzCwjD3cLaNTUymD
8wy/fZtWF0KEWa81pkpDDVFqWa6gc9H5UIPVFknf4wDaxb+vvw12o3wApKh/ThC/
8j0zE5gXQMmRehLRaM/cXqK1QBcFPZxL060e8s5N4CE47JeaLHn1GAlbYCi0QXmg
rV0trMaZhRQvj+FCJe1vHaf32rjjE071feFnqq3Q519puQulVQI/ULIP4zE584UO
Vu4Wys5SAiqJuj2IbnTxYJRvP1Xbr/rHTOhXIoh2Zy52JXm9fvCASTJ4GvUxHHeR
UXnwiaiyp03qDiwB/EKb5dpINqiwAY64I+jkN9sj2LULTwtVR6wsV4jMuIAHAPfz
w1ZU8Ea4U4dgF9XzWIs5nYNDxoHaBK8m/uj6qETcCjTKuGGixP6ziNgobH8g3DMZ
KxklRVFozyZwrC7MMk8vgEqhNtFUrnl3sQw/SUCUSMRk4PzWOCSaAvPFicpRXT8D
FmmG8h4jf95GaA+ndF3i92NCk2R6PO04SUlMGlBNEjc+okyGHkLnL7v1MkIom6EB
nM1+DaY4urYSeKdA72I4VG/RJBjToAdk2qysJ9xQtWOqAx1C3diL/57QKkltC+d7
7tETJOTTm42QtgmTQmQq
=Wm2y
-----END PGP SIGNATURE-----
Merge tag 'ux500-devicetree-for-v3.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt
From: Linus Walleij:
Ux500 device tree enablement base for the v3.12
development cycle:
- Various cleanups like remove non-existant hardware from
the Snowball device tree, prefix all files with "ste-*"
- External regulators
- Documentation updates
- Delete some minor dangling platform data
- Pin control settings for U8540 through DT
* tag 'ux500-devicetree-for-v3.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (22 commits)
ARM: ux500: fix devicetree builds
ARM: ux500: Remove u9540.dts as it's been replaced
ARM: ux500: Apply a ste-* prefix onto dbx5x0.dtsi
ARM: ux500: Apply a ste-* prefix onto stuib.dtsi
ARM: ux500: Apply a ste-* prefix onto hrefv60plus.dts
ARM: ux500: Apply a ste-* prefix onto hrefprev60.dts Signed-off-by: Lee Jones <lee.jones@linaro.org>
ARM: ux500: Apply a ste-* prefix onto href.dtsi
ARM: ux500: Apply a ste-* prefix onto ccu9540.dts
ARM: ux500: Apply a ste-* prefix onto ccu8540.dts
ARM: ux500: Apply a ste-* prefix onto snowball.dts
ARM: ux500: Remove Snowball DTS entry for ROHM BH1780GLI ambient light sensor
ARM: ux500: Remove Snowball DTS entry for TPS61052 chip
ARM: ux500: Remove Snowball DTS entry for National Semiconductor LP5521 LED chip
ARM: ux500: Remove Toshiba TC35892 I/O Expander's DT entry from Snowball's DTS
ARM: u8540: DT: Set pinctrl mapping to i2c0,1,2,4 & 5
ARM: u8540: Add Pinctrl Device Tree settings for uart0, uart2
ARM: ux500: Stop passing MMC's platform data for Device Tree boots
Documentation: Update binding for Nomadik and DBx5x based platforms
ARM: ux500: Supply external regulator names for Snowball's DT
ARM: ux500: Provide a supply name for the AB8500 AUX regulators to use
...
[ this is a follow-up to this discussion:
http://archive.arm.linux.org.uk/lurker/message/20130730.230827.a1ceb12a.en.html ]
This patchset renames all uses of "bcm," name bindings to
"brcm," as they were done prior to knowing that brcm had
already been standardized as Broadcom vendor prefix
(in Documentation/devicetree/bindings/vendor-prefixes.txt).
This will not cause any churn on devices because none of
these bindings have made it into production yet.
Also rename the the following dt binding docs that had "bcm,"
in their name for consistency:
- bcm,kona-sdhci.txt -> kona-sdhci.txt
- bcm,kona-timer.txt -> kona-timer.txt
Signed-off-by: Christian Daudt <csd@broadcom.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Enable sdio for bcm28155 AP board
Signed-off-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Alex Elder <elder@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Clean up the sdio numbering to be 1-base as defined in HW spec,
instead of the current 0-base
Signed-off-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Alex Elder <elder@linaro.org>
The Olimex A20-Olinuxino is an open-hardware board based on the
Allwinner A20 SoC, with most of the pins exported on headers, a 10/100M
ethernet port, SATA, SD and uSD slots, etc.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Allwinner A20 SoC is based on 2 Cortex A7, an ARM Mali GPU, and is
built to be pin-compatible with the older Allwinner A10.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJSDcbOAAoJEBvUPslcq6VzeGAQAI040uoCSQ7C5w2o/0+Kuo3n
sftR1NyXDnMIHMO+B/SVZF+vayQxtnygq1Nk07BQjl9o9MgPBdY4/Ded4xAvuMQq
zM0dke8xm5+/QCqtH/6vlJnZGo4yzvwtMXNix2r50Ld+f3Vt7yyl4K9z54jWk1cl
qrPoG2HbhzDH7qbDnygxvyPCdbHh0J1FD2vdBY6/Hj1j/F/Wn0InGvkywauBckVb
XZm8UIpdJ8qSSQEqtdBrZzJ84XOElC5iDAgrO0lISqxnt1cmD9bkEByJEK09IJAC
7EkMqgtd1l4fVKPkM8THXkvUcRAp8vz/6H7pc0n48Ew6QTtaQOkSTLy1f8+AVBwq
50cJwARrtWoIlji1Ur6H6G1rvqUzp1xw9qrIJPZNsEGAlROS7xNCOKurKnMRDd15
tiO2uPRN44E+6m6ChfdrtfiZCoV47bXXGI2O7L2qGImw8mr7FcbLdYzweMIWN13d
5dNXMyzw6H/X6qzNSHEv/4tY16YIUxS+01cPxmHbyXUJrizptRYupUIGGhu3EbVH
DVZPn+Lm0HFEiiAeFH+jLvegxxx+gRK0b70O+tOqRwkQ08mMIq/6YAy7tggQH8BI
wVZe6ADwg/mo4rb9Bv+z7R+ECNR6XBTH440++BJPBN8GW7IW/jjsTyKL61b25pKR
JQM7CZ2YprQTDz7Z6kPY
=BR17
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.12/dra7xx' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
From Tony Lindgren:
Minimal DRA7xx based SoC core support via Rajendra Nayak <rnayak@ti.com>
* tag 'omap-for-v3.12/dra7xx' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (849 commits)
ARM: DRA7: Add the build support in omap2plus
ARM: DRA7: hwmod: Reuse the soc_ops used for OMAP4/5
ARM: DRA7: id: Add cpu detection support for DRA7xx based SoCs'
ARM: DRA7: Kconfig: Make ARCH_NR_GPIO default to 512
ARM: DRA7: board-generic: Add basic DT support
ARM: DRA7: Resue the clocksource, clockevent support
ARM: DRA7: Reuse io tables and add a new .init_early
ARM: DRA7: Reuse all of PRCM and MPUSS SMP infra
Linux 3.11-rc5
btrfs: don't loop on large offsets in readdir
Btrfs: check to see if root_list is empty before adding it to dead roots
Btrfs: release both paths before logging dir/changed extents
Btrfs: allow splitting of hole em's when dropping extent cache
Btrfs: make sure the backref walker catches all refs to our extent
Btrfs: fix backref walking when we hit a compressed extent
Btrfs: do not offset physical if we're compressed
Btrfs: fix extent buffer leak after backref walking
Btrfs: fix a bug of snapshot-aware defrag to make it work on partial extents
btrfs: fix file truncation if FALLOC_FL_KEEP_SIZE is specified
dlm: kill the unnecessary and wrong device_close()->recalc_sigpending()
...
Signed-off-by: Kevin Hilman <khilman@linaro.org>
From Jason Cooper, mvebu fixes-non-critical for v3.12 (round 2):
- fix the memory node (2 by 2) in skeleton64.dtsi
* tag 'fixes-non-3.12-2' of git://git.infradead.org/linux-mvebu:
ARM: dts: Fix memory node in skeleton64.dtsi
This patch adds EHCI and OHCI host device nodes for Exynos4.
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This adds device-tree bindings for the audio subsystem clock controller
on Exynos 5420.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/57712
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch corrects the /include to #include on exynos5420
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The patch adds the MFC clock entry for the 5250 SoC.
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Removes the unused sclk_mfc from exynos4 dtsi file.
Signed-off-by: Arun Kumar K <arun.kk@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
While the Linux driver stack is capable of figuring this out for itself
document the fact that we really do use the internal PHY even with the
directly wired hub on the board to save anyone else having to work this
out for themselves.
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The Arndale has a SMSC USB3503 connected in hardware only mode like a PHY,
support it using the usb-nop-xceiv binding.
Note that due to a regrettable decision to use a regulator to represent
the reset signal this uses a fixed voltage regulator to do that, there
is a plan to use the reset controller binding once that is merged so it
does not seem worthwhile to fix the usb-nop-xceiv driver at this point.
Signed-off-by: Mark Brown <broonie@linaro.org>
Tested-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
OrigenQuad board boots with secure firmware support. Enable support for
reading smc commands.
The binding has been updated as per the documentation provided in
Documentation/devicetree/bindings/arm/samsung-boards.txt.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add pin state information for DP HPD support that requires pin configuration
support using pinctrl interface.
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Moves the properties of DP controller to exynos5.dtsi which are common
across exynos5 SoCs like Exynos5250 and Exynos5420.
The PHY DP Node is based on Jingoo Han's <jg1.han@samsung.com> patch
at https://patchwork.linuxtv.org/patch/19189/
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Adds FIMD DT node to exynos5420 based SMDK. Also adds display-timimg
information node.
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Moves the properties of FIMD DT node which are common across Exynos5 based
SoCs like Exynos5250 and Exynos5420 to exynos5.dtsi
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
As the display-timing information is parsed by FIMD driver, it makes
sense to move the display-timing DT node inside FIMD DT node for exynos5250
Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This platform from WITS is the evaluation board for the Allwinner A31.
It features a quad-Cortex A7, 2048MB of RAM, NAND, USB, MMC, several
UART, HDMI, a 2048 x 1536 10" screen, powered by a PowerVR, etc.
Of course, most of these peripherals aren't supported yet, but support
for those will come eventually.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The "marvell,armada-370-xp-timer" compatible string, together with
the "marvell,timer-25Mhz" property are deprecated and should be
removed from current DT.
Instead, the timer DT nodes are now required to have an appropriate
compatible string, which should be either "marvell,armada-370-timer"
or "marvell,armada-xp-timer", depending on SoC.
The clock property is now required only for Armada 370 so move it accordingly.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Device Tree information for the GPIO banks of the Armada 370 and
Armada XP SOCs was incorrectly using #interrupts-cells instead of
controller when using GPIO interrupts, since the GPIO bank DT node
wasn't recognized as a valid interrupt controller by the OF code.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch removes quirks from i2s node and change the i2s
compatible names.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
After providing spi alias, we can get the following message during probe:
m25p80 spi1.0: sst25vf016b (2048 Kbytes)
,which looks better than the original one:
m25p80 spi32766.0: sst25vf016b (2048 Kbytes)
While at it, keep the alias entries in alphabetical order.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The i.MX23 has a internal Low Resolution ADC; this enables the support
for this device.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The i.MX23 has a internal Low Resolution ADC; this enables the support
for this device.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The i.MX23EVK board provides a USB port so the USB PHY and controller
need to be enabled for it to be usable.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
After mxs-dma driver adopts generic DMA device tree binding, channel
interrupt number is defined in DMA controller node, and channel ID is
listed in "dmas" property. So the DMA channel interrupt number in
client nodes' "interrupts" property and fsl,<module>-dma-channel which
are used by old customized DMA binding can be removed now.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Necessary pins are now grabbed by respective drivers. Unecessary hogpins are
simply removed.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The CFA-10058 is a breakout board for the CFA-10036 that has Ethernet, USB and a
5" LCD screen on it.
Signed-off-by: Brian Lilly <brian@crystalfontz.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The CFA-10056 is a breakout board for the CFA-10036, and is
basically a CFA-10037, with a 4.3" screen.
Signed-off-by: Brian Lilly <brian@crystalfontz.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
- kirkwood
- convert Dockstar, Guruplug, mv88f6281gtw_ge to DT
- remove legacy boards (which have DT support) sheevaplug, lacie boards
- ARRAY_AND_SIZE() cleanup
- dove
- some DT node updates (depends on irqchip/clocksource DT changes earlier)
- add the D2Plug board
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.20 (GNU/Linux)
iQEcBAABAgAGBQJSC9u1AAoJEAi3KVZQDZAeakMH/31M/fzEIhREgJyS1paFx9Ed
8q9ZHQSc2RK4s7mdHCRlvxFbtN3Jas3B+iLGz6iFKsxg+5VNo5aeLPRpjB6dHBek
/WzvXn+PvGEWGmESk1ZBDmifGfu8y+0cvIiFa93diam4DNCWckD5JtZwl2BXjTDl
ueCzKohhuTl5pv88tmAR8TWwCYQGM5u0Lqbchxo5AQ51DSqE+U3/agc3p1JVhokF
Spsh8qGv3VLh15b1r1ZoLMbmnduXthoDbyXy2yq0/JQejx0UMOIoz9WEHA34aFG5
r6lkb34EfXqPBWwyyTaCvM/1qVKXVuN99nIsM1HQjzjBXYZGNOb9gsnjWVjLQbg=
=T4jJ
-----END PGP SIGNATURE-----
Merge tag 'boards-3.12-2' of git://git.infradead.org/linux-mvebu into next/boards
From Jason Cooper, mvebu boards changes for v3.12:
- kirkwood
- convert Dockstar, Guruplug, mv88f6281gtw_ge to DT
- remove legacy boards (which have DT support) sheevaplug, lacie boards
- ARRAY_AND_SIZE() cleanup
- dove
- some DT node updates (depends on irqchip/clocksource DT changes earlier)
- add the D2Plug board
* tag 'boards-3.12-2' of git://git.infradead.org/linux-mvebu:
ARM: dove: add initial DT file for Globalscale D2Plug
ARM: dove: add GPIO IR receiver node to SolidRun CuBox
ARM: dove: add common pinmux functions to DT
ARM: dove: add cpu device tree node
arch/arm/mach-kirkwood: Avoid using ARRAY_AND_SIZE(e) as a function argument
ARM: kirkwood: fix DT building and update defconfig
ARM: kirkwood: Remove all remaining trace of DNS-320/325 platform code
ARM: kirkwood: use dts pre-processor for mv88f6281gtw-ge
ARM: kirkwood: convert the mv88f6281gtw_ge board to DT
ARM: kirkwood: remove LaCie boards that are supported through DT
ARM: kirkwood: remove support for legacy booting of Sheevaplug
ARM: kirkwood: remove support for legacy booting of Guruplug
ARM: kirkwood: remove support for legacy booting of Dockstar
Signed-off-by: Olof Johansson <olof@lixom.net>
- MBus devicetree bindings
- devbus update for address decoding window, cleanup
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.20 (GNU/Linux)
iQEcBAABAgAGBQJSC9AMAAoJEAi3KVZQDZAeEskH+gLbu4awN//ItLxqdOjCffs1
o3N7C21SjAuGrueSxLFcYxLXk6XhM1x3mAEjvvbd1ze1yyKIY21PQGkwtjrxQxr5
DbRtz8slgFte9jnOtUQ9gfSM8Q4PsOT4oPtj6tFc9DREIhX8uZtDxLn5YVNsD1MI
hLxKbL9OHUxtwQ6aM7IdyMmYXkmLVaBUZFJ7f86CH8oVRJXLcqYzVdLrOUmbRdBX
GpB6hAnSqx2spfAYxI928Od+3PIRVW4qm724t0iLI+8xQmjCxIbIDz8sS2NKVM9G
YowJ+im5dUI3Wv7l/huVi/r0mvQJJi6BL36c+O0YJUY7KeKT615zdeG3AekvB5g=
=6spO
-----END PGP SIGNATURE-----
Merge tag 'drivers-3.12' of git://git.infradead.org/linux-mvebu into next/soc
From Jason Cooper:
mvebu drivers changes for v3.12
- MBus devicetree bindings
- devbus update for address decoding window, cleanup
* tag 'drivers-3.12' of git://git.infradead.org/linux-mvebu: (35 commits)
memory: mvebu-devbus: Remove unused variable
ARM: mvebu: Relocate PCIe node in Armada 370 RD board
ARM: mvebu: Fix AXP-WiFi-AP DT for MBUS DT binding
ARM: mvebu: add support for the AXP WiFi AP board
ARM: mvebu: use dts pre-processor for mv78230
PCI: mvebu: Adapt to the new device tree layout
bus: mvebu-mbus: Add devicetree binding
ARM: kirkwood: Relocate PCIe device tree nodes
ARM: kirkwood: Introduce MBUS_ID
ARM: kirkwood: Introduce MBus DT node
ARM: kirkwood: Use the preprocessor on device tree files
ARM: kirkwood: Split DT and legacy MBus initialization
ARM: mvebu: Relocate Armada 370/XP PCIe device tree nodes
ARM: mvebu: Relocate Armada 370/XP DeviceBus device tree nodes
ARM: mvebu: Add BootROM to Armada 370/XP device tree
ARM: mvebu: Add MBus to Armada 370/XP device tree
ARM: mvebu: Use the preprocessor on Armada 370/XP device tree files
ARM: mvebu: Initialize MBus using the DT binding
ARM: mvebu: Remove the harcoded BootROM window allocation
bus: mvebu-mbus: Factorize Armada 370/XP data structures
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- USB host numbering for 9x5 which was preventing from using all ports
- a missing UART (not USART) clock lookup table was preventing from using
them on 9x5
- too large amount of memory was specified for 9n12ek
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJSCz/bAAoJEAf03oE53VmQdrkIAMqkvFsaZ5RYEyincfvLq0vR
Sms2rWsU2NEp00RoR9wFfz82nz0xKpC7b+TPupiSQTDh59xwM2ffOWIa+pKapXjg
BhjnUtNFmASM8KmCnR1GzfxkHeYdv1KD6grp4oxCYyh/FPgFRo1CazLkLCe5JEyB
reFRI/a+7cKV2xlwb4Z3I1f+eGJUXH80YIdrr34xblDMdkTs8IDcNigmkH4mDM2k
BUK+8ZIm/oZQqkTfJqNkPD3ZwjWdDph64UndJNMuTDFoyP3UeJBsrfDu2aNp1N0Z
v80+iTDaVhyouim6dI1jXkDFPUc0fc8MfPIXdyzkNB323IAVWyTBNAsS73V/HUI=
=7J8D
-----END PGP SIGNATURE-----
Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixes
From Nicolas Ferre:
Device tree related fixes:
- USB host numbering for 9x5 which was preventing from using all ports
- a missing UART (not USART) clock lookup table was preventing from using
them on 9x5
- too large amount of memory was specified for 9n12ek
* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
ARM: at91/DT: fix at91sam9n12ek memory node
ARM: at91: add missing uart clocks DT entries
ARM: at91/DT: at91sam9x5ek: fix USB host property to enable port C
Signed-off-by: Olof Johansson <olof@lixom.net>
Revert "ARM: dts: Change i2s compatible string on exynos5250" (c7f7e6)
and "ARM: dts: exynos5250: move common i2s properties to exynos5 dtsi"
618728) since they reference DMA controller nodes that don't exist
causing DT build issues.
Reported-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Mark Brown <broonie@linaro.org>
This enables the microphone input jack, and hence allows audio to be
captured as well as played back.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This enables the microphone input jack, and hence allows audio to be
captured as well as played back.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The patch set beginning with commit:
"ARM: ux500: Apply a ste-* prefix onto snowball.dts"
thru commit:
"ARM: ux500: Remove u9540.dts as it's been replaced"
altered the names of the ux500 device tree files but forgot
to:
- Rename the ccu8540-pinctrl.dtsi file
- Update #include statements from files using these
files, so the build broke.
- Update the Makefile for the device trees so the build
broke.
Fix it up so we can build them all again.
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
From Simon Horman:
Second Round of Renesas ARM based SoC updates for v3.12
* Increased clock coverage for r8a7740 and r8a7790 SoCs
* tag 'renesas-soc2-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7740: Add TPU clock entry for DT platforms
ARM: shmobile: r8a7790: clocks for Ether support
ARM: shmobile: r8a7740: Fix TPU clock name
ARM: shmobile: Insert align directives before 4 bytes data
ARM: shmobile: Force ARM mode to compile reset vector for secondary CPUs
ARM: shmobile: fix compile error when CONFIG_THUMB2_KERNEL=y
ARM: shmobile: Update romImage to relocate appended DTB
Signed-off-by: Olof Johansson <olof@lixom.net>
This adds a device tree usable on Mele A1000 (and A2000, as it
apparently is the same device except for the case). This device features
one UART port, Ethernet, an AXP209 PMU on i2c0 and two user configurable
LEDs.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
[maxime: fixed the soc node address]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Move Renesas ARM based SoCs a little closer to using
multiplatform by adding ARCH_SHMOBILE_MULTI and only
building clocks when COMMON_CLK=n.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJR90vlAAoJENfPZGlqN0++Q3MQAImhPlPcqU4PoMyUQSAG/hj1
V7pwYjKLTLxGi4WGyqLnFrSvNUKhKLDUa0kv6iiccOuppc3xU6XDKMyQt2b8F3UN
Xod1oX74hQasX6dMUuAbuVFX+vfIms81Pk76Jx0nVRIEzuBSgl+JPP0A3VdDXpHo
zUVBH788juW3j6Uihm6dQSoIfSAnRGR2j/04qrMXlJ4WycYPya205I3HIDPOe7kj
TMOU3jBzB9051LyggDrDXjUEvtqJDvOJ32KeFHXnCiSLitbi1MEFPxkl5ldDYAEt
4CmrZanTfWpR9pCVwN4PLKs6BXAn/YOD55vFeB92gCT3/cCG/HYeyrW2JsmMbrhm
BaxRPFGdYsfVOj9+waqZMsvmvi9NluuxJ5Pne/ENxn6Yn0IlXF4pfcYzWLoNa55u
3r5EQumfPkfdCn3J1XIkbYMXhBMbQnUHbCqrk6PD2ovlsJwYvbiVkunsJohOsKcG
ARKhGoBJ0QCp9MU9wLjGKyVtJKvejCZdpN8E8gavGcFRJJpT7GwElp6wp4brhqIs
xUC/8GAZAk7U45K1DRU7ZX+87muKRQ0lR0brYaQmH/KvfT4bPINFx3G9yIwICG7h
tDZjMGQXYFTNpbaAbSoSggE1ZaowzLo9RaHBBbFfRuES8ik6nx2ev9smKrSupq4s
lWz7rgsy5be8pX4DRibR
=QD0i
-----END PGP SIGNATURE-----
Merge tag 'renesas-multiplatform-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
From Simon Horman:
Renesas ARM based SoC multiplatform updates for v3.12
Move Renesas ARM based SoCs a little closer to using
multiplatform by adding ARCH_SHMOBILE_MULTI and only
building clocks when COMMON_CLK=n.
* tag 'renesas-multiplatform-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Allow ARCH_SHMOBILE_MULTI timer configuration
ARM: shmobile: Add EMEV2 and KZM9D to ARCH_SHMOBILE_MULTI
ARM: shmobile: Introduce ARCH_SHMOBILE_MULTI
ARM: shmobile: Only build clocks when COMMON_CLK=n
Signed-off-by: Olof Johansson <olof@lixom.net>
SH Mobile pinctrl DT support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJR7x2SAAoJENfPZGlqN0++TSMQAK8jwFDHgLwTgqVzBy59OwK4
w9Ou1Jj2Fu6tRaOKjATDc/lrt/kAqifhBLvUX5VFccxa5TLBc8w/KVsrOvi3aN0Q
ns447EsCmMqfVF1EwYFxro9mYpvwPB92+IsABdN3lWSZyqVrSCy8hs/4q3ozDqu5
4rfhFRWWzOJ3G5D+U7ZCbKsgSud6IB3eicYbBHVvrF3AJwgddCneN61q5WKTpiae
ah3EIPO1RtprdSCq9MtIliX0PFALtcKfGTz7dcPCdUy5H0wZf5X8/NvMlYiqnf4X
0BTAlsR14R1vCZF04oSMQPlwI1YfuvX/QrlESQuI/vD4FwU32SFC44iYJtpKS6s2
sSfEeU66gGQyTpbX4OkwHX1ws68d0gsOB0lXb01i6kZnavFUrMOLLWmFxBmgnFSU
/PCA7YiFdGjiTduVwpFmPI5l+1m7solHSLiw7iMN5dBlGIruEseSPQl9ovC7cGUc
bZU2VxHe/Xxyg9O6WWjsV8XVC05V+r79L0/bPdxIFzi1W4mjK0dqyya243TyJRKD
20TAdmlmkW+J/gpaJpISKftn0mcE1/DEkz0XpzYWc/WgYEOnD3gtad80ZB+dzq1W
BblYm1dEON/qjNYW6KYXYyYgttR/QkZVSVWm08LPypxjGvihB+Sxwhrb3ivK/CtI
IKBiqj17072aIseJbtFq
=PwyZ
-----END PGP SIGNATURE-----
Merge tag 'renesas-pinmux-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
From Simon Horman:
Renesas ARM based SoC pinmux updates for v3.12
SH Mobile pinctrl DT support
* tag 'renesas-pinmux-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: kzm9g-reference: Add LED1-LED4 to the device tree
ARM: shmobile: kzm9g-reference: Move SDHI regulators to DT
ARM: shmobile: kzm9g-reference: Move pinctrl mappings to device tree
ARM: shmobile: marzen-reference: Add LED2-LED4 to the device tree
ARM: shmobile: marzen-reference: Move pinctrl mappings to device tree
ARM: shmobile: armadillo-reference: Add LED1-LED4 to the device tree
ARM: shmobile: armadillo-reference: Move st1232 reset GPIO to DT
ARM: shmobile: armadillo-reference: Add st1232 pin mappings
ARM: shmobile: armadillo-reference: Move pinctrl mappings to device tree
ARM: shmobile: sh73a0: Add pin control device to device tree
ARM: shmobile: sh7372: Add pin control device to device tree
ARM: shmobile: r8a7790: Add GPIO controller devices to device tree
ARM: shmobile: r8a7790: Add pin control device to device tree
ARM: shmobile: r8a7779: Add GPIO controller devices to device tree
ARM: shmobile: r8a7779: Add pin control device to device tree
ARM: shmobile: r8a7778: Add GPIO controller devices to device tree
ARM: shmobile: r8a7778: Add pin control device to device tree
ARM: shmobile: r8a7740: Add pin control device to device tree
ARM: shmobile: r8a73a4: Add pin control device to device tree
Signed-off-by: Olof Johansson <olof@lixom.net>
Conflicts:
arch/arm/boot/dts/r8a73a4.dtsi
arch/arm/boot/dts/r8a7790.dtsi
The gpio controller node inherited from pxa2xx.dtsi won't work for
pxa3xx SoCs, so let's override it in pxa3xx.dtsi.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Device tree entries for the three EHCI controllers on Tegra114.
Enables the the third controller (USB host) on Dalmore.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add device tree entries for the 3 USB controllers and PHYs and
enable the third controller on Cardhu and Beaver boards.
Fix VBUS regulator entries on Beaver. The GPIO pins were wrong.
Also, internal pullups need to be enabled on those pins.
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This patch removes quirks from i2s node and change the i2s
compatible names.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
I2S nodes shares some properties across exynos5 SoCs (exynos5250
and exyno5420). Common code is moved to exynos5.dtsi which is
included in exyno5250 and exynos5420 SoC files.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
This adds an initial DT file for the Globalscale D2Plug with Dove SoC.
Currently, one LED is missing and I have not been able to get SD8787 driver
working. Those will be taken care of later.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This adds a node for the IR receiver connected to a GPIO pin on the
SolidRun CuBox.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This adds common dedicated and gpio pinmux functions to SoC pinctrl
node. It also relocates pinctrl references to corresponding DT nodes.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This adds a node for the Marvell Sheeva PJ4A CPU found on Dove SoCs.
While at it, also move the l2-cache node out of internal registers and
consistently name different nodes.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Conflicts:
arch/arm/boot/dts/dove.dtsi
Instead of evenly splitting the 512 MiB area between prefetchable and
non-prefetchable memory spaces, increase the prefetchable memory space
to 384 MiB while at the same time decreasing the non-prefetchable memory
space to 128 MiB. This is a more useful default as most PCIe devices
require more prefetchable than non-prefetchable memory.
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Beaver's PCIe lane configuration most closely matches x2 x2 x2 rather
than x4 x1 x1, since clocks 0 and 2 are used, and lanes 0 and 5 are used,
and the only way those align is with a x2 x2 x2 configuration.
Also, disable root port 1; there's nothing connected to it. Root port 0
is the on-board PCIe Ethernet, and port 2 is the mini-PCIe slot.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
PCIe lane 0 is connected to an onboard Gigabit Ethernet (RTL8168evl) and
lane 4 is routed to the board's miniPCIe slot.
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Root port 2 is routed to the bottom connector on Cardhu and is used by
the development dock to provide gigabit ethernet and USB functionality.
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add the top-level pcie-controller node for the Tegra30 SoC. Tegra30 has
three root ports that can use different lane layouts.
Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
With the device tree support in place, probe the PCIe controller from
the device tree and remove the corresponding workaround in the board
file.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
With the device tree support in place, probe the PCIe controller from
the device tree and remove the corresponding workaround in the board
file.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Enable the first PCIe root port which is connected to an FPGA on the
Tamonten Evaluation Carrier and add device nodes for each of the PCI
endpoints available in the standard configuration.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add properties common to all Tamonten-derived boards to the Tamonten
DTSI and add the fixed 1.05 V regulator.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add the top-level pcie-controller node for the Tegra20 SoC. Tegra20 has
two root ports that can use different lane layouts.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
[swarren: split DT changes into a separate patch from the main driver]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Enabling the LP1 suspend mode for Tegra devices.
Tested-by: Marc Dietrich <marvin24@gmx.de> # paz00 board
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Exynos PCIe IP consists of Synopsys specific part and Exynos
specific part. Only core block is a Synopsys Designware part;
other parts are Exynos specific.
Also, the Synopsys Designware part can be shared with other
platforms; thus, it can be split two parts such as Synopsys
Designware part and Exynos specific part.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Pratyush Anand <pratyush.anand@st.com>
Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
Enable the HDMI output as well as DDC and hotplug detection on Beaver.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
There was a typo in the base address used for the soc node in the A13
device tree. Fix it with the proper base address.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The reg property of the simple-bus driver is completely useless. Remove
it from the DTSI.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
There was a typo in the base address used for the soc node in the A10s
device tree. Fix it with the proper base address.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The reg property of the simple-bus driver is completely useless. Remove
it from the DTSI.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
There was a typo in the base address used for the soc node in the A10
device tree. Fix it with the proper base address.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The reg property of the simple-bus driver is completely useless. Remove
it from the DTSI.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This driver is currently used by musb' cppi41 couter part. I may merge
both dma engine user of musb at some point but not just yet.
The driver seems to work in RX/TX mode in host mode, tested on mass
storage. I increaed the size of the TX / RX transfers and waited for the
core code to cancel a transfers and it seems to recover.
v2..3:
- use mall transfers on RX side and check data toggle.
- use rndis mode on tx side so we haveon interrupt for 4096 transfers.
- remove custom "transferred" hack and use dmaengine_tx_status() to
compute the total amount of data that has been transferred.
- cancel transfers and reclaim descriptors
v1..v2:
- RX path added
- dma mode 0 & 1 is working
- device tree nodes re-created.
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Dan Williams <djbw@fb.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This moves the two instances from the big node into two child nodes. The
glue layer ontop does almost nothing.
There is one devices containing the control module for USB (2) phy,
(2) usb and later the dma engine. The usb device is the "glue device"
which contains the musb device as a child. This is what we do ever since.
The new file musb_am335x is just here to prob the new bus and populate
child devices.
There are a lot of changes to the dsps file as a result of the changes:
- musb_core_offset
This is gone. The device tree provides memory ressources information
for the device there is no need to "fix" things
- instances
This is gone as well. If we have two instances then we have have two
child enabled nodes in the device tree. For instance the SoC in beagle
bone has two USB instances but only one has been wired up so there is
no need to load and init the second instance since it won't be used.
- dsps_glue is now per glue device
In the past there was one of this structs but with an array of two and
each instance accessed its variable depending on the platform device
id.
- no unneeded copy of structs
I do not know why struct dsps_musb_wrapper is copied but it is not
necessary. The same goes for musb_hdrc_platform_data which allocated
on demand and then again by platform_device_add_data(). One copy is
enough.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
The pcie-controller node needs to be relocated according the MBus
DT binding, since it's now a child of the mbus-compatible node.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
There are a number of variants of the ZyXEL NSA310, with slightly
different LEDs, buttons and i2c devices. Add a DTS file to support one
more of these variants.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Tibor Hársszegi <tibor@harsszegi.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Summary of changes:
- Drop unused HAVE_SCHED_CLOCK config option
- Remove now redundant smp_init_cpus call
- Update the smc code to remove dsb and r12 usage
- Convert device tree to use #include and GIC bindings
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJSApuFAAoJEHJsHOdBp5c/UGcQAIUDwFk8nq1C7y13TTwxtEWV
iqmwojeuaTyCw1HOsz+6mMrFsziOSFuGxh1JNAlhfZole23gpTr1NFziH7HxlWo5
o4dVoLIO/cG5Ie95p2SHe8pwZV5+a82SjBYE6IJ6MmvCrER+c7/Ucxst8UhKj5ok
6RsSNU0buMPwuXnFttOk7H8HSlyCiNZEzOJGJkO5j77D9Cj8eN7z3AkgMtMni0ge
lFFVFDiGU6LSiU85BOg7ixVJPJeOqPmb1aWaTDko+sIrOpt8lUKFWAZNIOmxhUHC
gkF1lcgfDRpvMroXlJWqABlXc7789l4V3w4aJhn5IIXEUg9WlD2FFJ+euTbnSDvM
aZQzBzPWuegonJZyO2Aznld0vDGR6CK8spsi/ooYrPFntipThBoORbdQzW0Mukns
IbgJ2dia1whys7fVLcXfJiOlObKS3ydIF3KR79KYS59NUSzsmAu1kdSahWpp0VYw
YyMXSDf3AIbjptNkmvcO1UOhANrGm5F2j1q7UY6YIMr52Eo3Zg9uJWGkYs6poxAl
gT2OpFG0eKExIoJXmd4TpJMMbCQuoRNAsJYsQwsg2JmaNzjmQUpuJYd9qUdl4ZIF
dILXez9mb87PamRKg+Q0lP6Up/rTM2zKZtZKO082HXr/6cDJEy6H8TSD5LHxrji2
LB1G37B0ZiGOaclQROnx
=NazV
-----END PGP SIGNATURE-----
Merge tag 'keystone-fixes-non-critical' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/fixes-non-critical
From: Santosh Shilimkar <santosh.shilimkar@ti.com>:
ARM: keystone: non-critical fixes, cleanup for 3.12
Summary of changes:
- Drop unused HAVE_SCHED_CLOCK config option
- Remove now redundant smp_init_cpus call
- Update the smc code to remove dsb and r12 usage
- Convert device tree to use #include and GIC bindings
* tag 'keystone-fixes-non-critical' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: Keystone: Convert device tree file to use IRQ defines
ARM: keystone: use #include to include skeleton.dtsi
ARM: keystone: Drop the un-necessary dsb from keystone_cpu_smc()
ARM: Keystone: No need to preserve r12 across smc call
ARM: keystone: remove redundant smp_init_cpus definition
ARM: keystone: drop useless HAVE_SCHED_CLOCK
Signed-off-by: Kevin Hilman <khilman@linaro.org>
The ranges property needs to be changed to use the new MBus DT binding.
Also, the pcie-controller node needs to be relocated as according the MBus
DT binding, it's now a child of the mbus-compatible node.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The AXP WiFi AP board is a Marvell platform based on the Armada XP
MV78230 SoC. It has two mini-PCIe connectors, one USB 3.0 port powered
by a USB 3.0 controller on PCIe, two Ethernet ports, 1 GB of RAM, 1 GB
of NAND, 16 MB of SPI flash, one SATA port and one button, two UARTs
Successfully tested: USB 3.0 port, the mini-PCIe connectors, SPI
flash, Ethernet ports, SATA port, button, UART.
Untested: NAND flash, due to lack of mainline support for the Armada
370/XP NAND controller for now.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Seif Mazareeb <seif@marvell.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Update the reg property of the memory node in
skeleton64.dtsi to reflect the fact that the root node uses
address-cells=2 and size-cells=2.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
SCC (Serial Configuration Controller) is used to set initial
conditions for the test chip (TC2). Its registers are also mapped
in normal address space and used to obtain runtime information
and for power management.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
This must have been a merge error. There was a patch which renamed the
u9540.dts to ccu9540.dts, however the u9540.dts was reincarnate with
the same patches which created it in the first place. Let's kill it
once and for all.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
It doesn't exist on the Snowball development board.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
TPS61052 is a; boost converter, LED driver, LED flash driver and
simple GPIO pin chip. It has no use here however, as it is not
found on the Snowball development board.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
It doesn't exist on the Snowball development board.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
It doesn't exist on this development board.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Instead of using bit-banged I2C, let's use the actual I2C
driver in the kernel. Since the I2C block may be communicating
with things like the PMIC, we need to select it from the Kconfig
just like the bit-banged adapter is selected today. The rest of
the configuration for this driver can be done from the device
tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch adds the device tree bindings for the bcm281xx reboot code.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Acked-by: Christian Daudt <csd@broadcom.com>
This patch configures pin map in device tree of i2c0,
1,2,4 & 5 for ccu8540 board.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch adds pinctrl device tree settings for uart0 and uart2
for ccu8540 board.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Regulator names are platform independent, so they need to be applied to
the base level platform DTS files *.dts. Here we're supplying the names
for the newly described AB8500 external regulators.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
AB8500 AUX regulators are supplied by EXT3 on some boards. This supply
phandle lookup will enable the regulator core to search for and locate
the EXT3 supply at registration time.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The AB8500 has 3 external regulators which are used to control outside
voltage sources. Some of the core AB8500 use these external regulators
as a supply, so they must be obtainable via Device Tree.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit converts the mv88f6281gtw_ge Kirkwood board to use a
Device Tree representation, except for the Ethernet devices and the
DSA switch. Even though the mv643xx_eth driver has a DT binding,
converting this board to use it is for now left on the side because it
doesn't use a simple PHY, but a DSA switch instead.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Add MAX8998 LDO12 and fixed voltage regulator nodes. While at it,
all fixed voltage regulator nodes are grouped in a 'regulators' node.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add pinctrl nodes for the camera parallel port CAM_A data bus
and the CAM_A_CLKOUT clock output pin.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Enable FIMC devices on the Trats board. This allows using the
device in memory-to-memory mode only. The camera port pinctrl
property is now empty and will be updated while support for the
camera sensors is added.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add common camera node and detailed properties for
the Exynos4210 FIMC devices.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch add dts entries required for the SPI bus used for
firware upload by the S5C73M3 camera.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Now that mbus has been added to the device tree, it's possible to
move the PCIe nodes out of the ocp node, placing it directly
below the mbus. This is a more accurate representation of the hardware.
Moving the PCIe nodes, we now need to introduce an extra cell to
encode the window target ID and attribute. Since this depends on
the PCIe port, we split the ranges translation entries, to
correspond to each MBus window.
In addition, we encode the PCIe memory and I/O apertures in the MBus
node, according to the MBus DT binding specification. The choice made
is 0xe0000000-0xf0000000 for memory space, and 0xf200000-0xf2100000 for
I/O space. These apertures can be changed in each per-board DT file.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This macro is used to define window's target ID and attribute cells
for the MBus ranges entries.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Add a minimal MBus node, just to allow the MBus driver to probe.
Follow-up patches will migrate the rest of the nodes appropriately.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Now that mbus has been added to the device tree, it's possible to
move the PCIe nodes out of internal registers, placing it directly
below the mbus. This is a more accurate representation of the
hardware.
Moving the PCIe nodes, we now need to introduce an extra cell to
encode the window target ID and attribute. Since this depends on
the PCIe port, we split the ranges translation entries, to correspond
to each MBus window.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Now that mbus has been added to the device tree, it's possible to
move the DeviceBus out of internal registers, placing it directly
below the mbus. This is a more accurate representation of the hardware.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
In order to access the SoC BootROM, we need to declare a mapping
(through a ranges property). The mbus driver will use this property
to allocate a suitable address decoding window.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada 370/XP SoC family has a completely configurable address
space handled by the MBus controller.
This patch introduces the device tree layout of MBus, making the
'soc' node as mbus-compatible.
Since every peripheral/controller is a child of this 'soc' node,
this makes all of them sit behind the mbus, thus describing the
hardware accurately.
A translation entry has been added for the internal-regs mapping.
This can't be done in the common armada-370-xp.dtsi because A370
and AXP have different addressing width.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
NFS detail settings like "nfsroot=,rsize=4096,wsize=4096" are no longer needed
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
NFS detail settings like "nfsroot=,rsize=4096,wsize=4096" are no longer needed
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Now that Ether support has been added to the lager board
it is possible to use nfsroot. This configuration is
in line with that of other shmobile boards.
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
... for the sake of consistency and assumed convention.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch enables the front camera using the internal
camera ISP (FIMC-IS).
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds AK8975 magnetometer node and corresponding
i2c-gpio bus node for TRATS2 board.
Signed-off-by: Jacek Anaszewski <j.anaszewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add common camera node and Exynos4212/4412 specific nodes for
FIMC, MIPI-CSIS, FIMC-LITE and FIMC-IS devices.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds common Exynos4 SoC series FIMC and MIPI CSIS
device nodes.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The Exynos4 SPI controller has migrated to the generic DMA bindings
since commit b5be04d35dbb("spi: s3c64xx: Modify SPI driver to use
generic DMA DT support"). Use the generic bindings to specify the
corresponding DMA to make the SPI usable again on Exynos4x12 SoCs.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The ISP power domain is a common power domain for FIMC-LITE
and FIMC-IS (camera ISP) devices.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add pinctrl nodes for the ISP I2C0, ISP I2C1 and ISP UART devices.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add separate nodes for the CAMCLK pin and turn off pull-up on camera
ports A, B. The video bus pins and the clock output (CAMCLK) pin need
separate nodes since full camera port is not used in some configurations,
e.g. for MIPI CSI-2 bus only CAMCLK is required and data/clock signal
use separate dedicated pins.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
All hardware parts of the (Armada 370 based) NETGEAR ReadyNAS 102 are
supported by mainline kernel (USB 3.0 rear ports, USB 2.0 front port,
Gigabit controller and PHY, serial port, leds, buttons, SATA ports,
G762 fan controller) except for:
- the Intersil ISL12057 I2C RTC Chip,
- the Armada NAND controller.
Support for both of those is currently work in progress and does not
prevent boot.
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The shmobile DT files available in the kernel are reference
implementations intended to be used as sample code, as well as for
development. As such, it makes sense to mount the root file system in
read/write mode by default.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add the RTS/CTS property for auart0 which means we enable the
DMA support for it.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This was missed when splitting out the phy from the controller node in
commit 9dffe3be3f (ARM: tegra: modify ULPI reset GPIO properties).
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch fixes cpu nodes with device_type = "cpu". This change was not
necessary before 3.10-rc7.
Without this patch STi SOCs does not boot as SMP.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Due to wrong older revision of documentation used as reference, we
seem to have a bunch of LDOs wrongly configured on OMAP5 uEVM. This
series is based power tree on production board 750-2628-XXX platform.
Unfortunately, the wrong voltages may be detrimental to OMAP5 as they
supply hardware blocks at voltages that are out of specification.
There is a chance that without these fixes there can be hardware
damage to omap5-uevm boards with the v3.11-rc series.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJR92JdAAoJEBvUPslcq6VzXDEQAOTE3VSK12SV9x/DTXS8ghGj
EXhzfHNqj1pFMnyIGKZWhEN6oIuYrPiobYzlF5PtnNVcJfDWyuSghUnsxJKzhBnS
bB9k9CjkDE5ArKF7vv83KF1/Ncogq5zvi9Sqkyju1VPj7g9kEwSRMZnfqtVzMG7v
wuAInK0cHTUUXuk+S/1Wch0/oby13jriJYirHWGvV3Xshvs1LWfIiGV4Y1brB2mt
KJgdBJ62r2EpdvDqao9cwJ0NG6M84SFXDRb21VuZiTM7mjVJ1+BoWk8Y6AEC/lm5
GUGu47QBbsVaRBmwoCyXAzHnBa/MblQli8ceTeSiCkqW6P46lBvx6as5l4+0Nq2b
xL6r3hVHUCht5Vzg9erIkDQMDIlhzKcoJyzUM6xy7lw6QiTA7CEUmDYHmhBrb1kq
jzzF0zWc7HNX/ZeQxiwZSI4aDipaz1nJDb6bPb0Etjx2e5aoDtQJv/r6iH4u46c0
1mVqSJzAf1l01+oo8FRLR25P3bkwKPbwMMI7d5JgTn/dRQqCveEU3XC8/wdZyWJm
goU96uKfW8fW/lCkHzNhzhqay7uulQZxnsSM9fXd/5wofXOryXLEXcvk/d/9eHPU
Ov+5Ejb2j3rCWPFYuaVg6Q1gHLZBlXOQB2hs7y6MOq4Bs8tHqo1GHMYh03GPbuiA
TYeBvNwnYIg7MAuaFuCx
=fW5m
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.11/fixes-omap5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
From Tony Lindgren:
Fixes for omap5-uevm regulators from Nishanth Menon <nm@ti.com>:
Due to wrong older revision of documentation used as reference, we
seem to have a bunch of LDOs wrongly configured on OMAP5 uEVM. This
series is based power tree on production board 750-2628-XXX platform.
Unfortunately, the wrong voltages may be detrimental to OMAP5 as they
supply hardware blocks at voltages that are out of specification.
There is a chance that without these fixes there can be hardware
damage to omap5-uevm boards with the v3.11-rc series.
* tag 'omap-for-v3.11/fixes-omap5' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap5-uevm: update optional/unused regulator configurations
ARM: dts: omap5-uevm: fix regulator configurations mandatory for SoC
ARM: dts: omap5-uevm: document regulator signals used on the actual board
Signed-off-by: Olof Johansson <olof@lixom.net>
Two small fixes for MSM.
The first fixes the a gpio controller register address. I didn't see
any acks from the devicetree maintainers, so I've copied them on this
pull request. The change itself is minor, and just to the register
address.
The second change removes the gpiomux V1 code from MSM. This was
breaking compilation for some of the targets.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQIcBAABAgAGBQJR8vF8AAoJEOa6n1xeVN+C74wP/0SI9cg18WyBJRz7YhMdEY8R
2hqB9l4cxo+Nr1+8kbKHyEyHQqzWSPK3IAuXsePhWJEKkdW5Ize2AZZCNDbnHX7a
pr9sEZw3Nqr/oOZlHsm5WIjkZ1DMCUdtmBuRnNoprng9CgX48s+eforJhl61qChW
imWBr/ZZ0chp8uWpeIA3UP4yixNCw386iyRnegxfJ68MNZMx35PTNwhF4kwCa+N+
0nLY5GiLZm4ogm94QreNL/oAj5B4f4eHjIPHYbnTox+6NpkU+SmYIpPg/k6vyA4p
mtu2fZTdgB02fMArNE+sQNhpIPWHcgo1tCD4eR7mHb7gbANGqEH0Y/4KpGZYGKrk
sauAfax+5oR+6HqDVsaGZ7Rz0fdLjJ/UERAlDgGXvLXX5AgpNlnkpRc9M1LAtwOC
6a3Ydf+54TPjPJHz5mqrQHdST8FmCUL41SmYM091pYGy+NU6DEP61+KoEUOvYVGo
TqHARJYLHtsrlgkLNQrsnUU/AvMqXrn75IK8XmNipq8saGgTLlZ0xe6R9lbKOQXW
2pKTXHbvyJnkS+Ald559XVK+SZ+wRPLnnFFG7wVa8Io4215nh1ueXoYz70sbr1b0
XyZt8LdmCkTALeep6yxfyUCeFKYYXyolOGwRTU6NrmzHs3Tibe5DeiKOLc0ye2P9
g/OyKuBj9hRbgPbr1N9N
=qmE5
-----END PGP SIGNATURE-----
Merge tag 'msm-3.11-fix1' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into fixes
From David Brown, fixes for MSM for 3.11:
Two small fixes for MSM.
The first fixes the a gpio controller register address. I didn't see
any acks from the devicetree maintainers, so I've copied them on this
pull request. The change itself is minor, and just to the register
address.
The second change removes the gpiomux V1 code from MSM. This was
breaking compilation for some of the targets.
* tag 'msm-3.11-fix1' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm:
ARM: msm: Consolidate gpiomux for older architectures
ARM: msm: dts: Fix the gpio register address for msm8960
Signed-off-by: Olof Johansson <olof@lixom.net>
A couple of references to Tegra GPIO numbers were missed when cleaning
up the Tegra DT files. Convert them now.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The IRQ trigger type of Palmas MFD device (tps65913) is designed as
low-level sensitive on Dalmore. The wrong configuration would cause an
interrupt storm when booting the system. Fixing it in DT with appropriate
interrupt type.
Cc: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add PMU information to emev2.dtsi. With this
included KZM9D DT reference may use the PMU.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add PMU information to sh73a0.dtsi. With this
included KZM9G DT reference may use the PMU.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add PMU information to r8a7740.dtsi. With this
included Armadillo800eva DT reference may use the PMU.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
commit e00c27ef3b
(ARM: dts: OMAP5: Add Palmas MFD node and regulator nodes)
introduced regulator entries for OMAP5uEVM.
However, The regulator information is based on an older temporary
pre-production board variant and does not reflect production board
750-2628-XXX boards.
The following optional/unused regulators can be updated:
- SMPS9 supplies TWL6040 over VDDA_2v1_AUD. This regulator needs to be
enabled only when audio is active. Since it does not come active by
default, it does not require "always-on" or "boot-on".
- LDO2 and LDO8 do not go to any peripheral or connector on the board.
Further, these unused regulators should have been 2.8V for LDO2 and
3.0V for LDO8. Mark these LDOs as disabled in the dts until needed.
Reported-by: Marc Jüttner <m-juettner@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: J Keerthy <j-keerthy@ti.com>
Acked-by: Benoit Cousson <benoit.cousson@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
commit e00c27ef3b
(ARM: dts: OMAP5: Add Palmas MFD node and regulator nodes)
introduced regulator entries for OMAP5uEVM.
However, The regulator information is based on an older temporary
pre-production board variant and does not reflect production board
750-2628-XXX boards.
The following fixes are hence mandatory to ensure right voltage is
supplied to key OMAP5 SoC voltage rails:
- LDO1 supplies VDDAPHY_CAM which is OMAP5's vdda_csiporta/b/c. This
can only be supplied at 1.5V or 1.8V and we currently supply 2.8V.
To prevent any potential device damage risk, use the specified
1.5V-1.8V supply.
Remove 'always-on' and 'boot-on' settings here as it is
a 'on need' supply to SoC IP and is not enabled by PMIC by
default at boot.
- LDO3 supplies Low Latency Interface(LLI) hardware module which is a
special hardware to communicate with Modem. However since uEVM is
not setup by default for this communication, this should be disabled
by default.
Further, vdda_lli is supposed to be 1.5V and not 3V.
- LDO4 supplies VDDAPHY_DISP which is vdda_dsiporta/c/vdda_hdmi
This can only be supplied at 1.5V or 1.8V and we currently
supply 2.2V.
To prevent any potential device damage risk, use the specified
1.5V-1.8V supply.
Remove 'always-on' and 'boot-on' settings here as it is a 'on need'
supply to SoC IP and is not enabled by PMIC by default at boot.
- LDO6 supplies the board specified VDDS_1V2_WKUP supply going to
ldo_emu_wkup/vdds_hsic. To stay within the SoC specification supply
1.2V instead of 1.5V.
- LDO7 supplies VDD_VPP which is vpp1. This is currently configured for
1.5V which as per data manual "A pulse width of 1000 ns and an amplitude
of 2V is required to program each eFuse bit. Otherwise, VPP1 must not
be supplied".
So, fix the voltage to 2V. and disable the supply since we have no plans
of programming efuse bits - it can only be done once - in factory.
Further it is not enabled by default by PMIC so, 'boot-on' must be
removed, and the 'always-on' needs to be removed to achieve pulsing
if efuse needs to be programmed.
- LDO9 supplies the board specified vdds_sdcard supply going within SoC
specification of 1.8V or 3.0V. Further the supply is controlled by
switch enabled by REGEN3. So, introduce REGEN3 and map sdcard slot to
be powered by LDO9. Remove 'always-on' allowing the LDO to be disabled
on need basis.
Reported-by: Marc Jüttner <m-juettner@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: J Keerthy <j-keerthy@ti.com>
Acked-by: Benoit Cousson <benoit.cousson@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
commit e00c27ef3b
(ARM: dts: OMAP5: Add Palmas MFD node and regulator nodes)
introduced regulator entries for OMAP5uEVM.
However, currently we use the Palmas regulator names which is used for
different purposes on uEVM. Document the same based on 750-2628-XXX
boards - which is meant to be supported by this dts.
Reported-by: Marc Jüttner <m-juettner@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: J Keerthy <j-keerthy@ti.com>
Acked-by: Benoit Cousson <benoit.cousson@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This is in preparation for converting the marzen board to
use DT_MACHINE_START.
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
PFC pinctrl configuration can now be performed via DT. Update
ape6evm-reference to use this.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
USB VBUS regulators are now specified with the vbus-supply property
instead of nvidia,vbus-gpio, so remove the obsolete properties.
The equivalent vbus-supply properties were already added in patch
"ARM: tegra: update device trees for USB binding rework".
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This patch changes the Tegra20 USB PHY nodes to use the UTMI configuration
parameter names as specified in the device tree binding documentation
after patch "ARM: tegra: finalize USB EHCI and PHY bindings".
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
all other drivers using Synopsys IPs with DT
have a compatible of snps,$driver, in order
to add consistency, we are switching over to
snps,dwc3 but keeping synopsys,dwc3 in the core
driver to maintain backwards compatibility.
New DTS bindings should NOT use synopsys,dwc3.
Signed-off-by: Felipe Balbi <balbi@ti.com>
- Driver fixes for AM33xx, SIRF and PFC pin controllers.
- Fix a compile warning from the pinctrl single-register
driver.
- Fix a little nasty memory leak.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.13 (GNU/Linux)
iQIcBAABAgAGBQJR9YhoAAoJEEEQszewGV1zfl8P/jk2VjlRE0P4LRLSRn3Rt7yj
Wz7IyZTol+mFnaY0yKQS9rToK+GqtJQHA1zuNP8iQnJbQh+UromAZwBd58dP7cnu
mYSi2QS4osYT5RjvVtB2yYy9sRrc4iTb+qJFekanA4IcHt0zKDZysyN8moU5JxmN
TVr+cauFm7qimkjps2Dns94UhVGpgB7A6Y8yC3SYtPv1GPdWQgSaDabWqMYq0bn1
ARUaz3XcbjMAGbPi8kDEFsP/SkM2OcMXpjX23G6ifgO9pyEKeum5+FWtllVeeAzb
LmymMJYVcTPLFw0yj+9lkRBew2K9JKmPp8rAUBvbDn53vbguMkDJTczM3IUZ279h
lRvR+w9F2M1rqIfwSa0/ZqTYKXbsF/IASYMXL/awNywnss+caPUxiN4EWRuKDssS
Wh6veS9l4roMupaez6GU7gQ8UgNnFTQg2BYzeFYbAg1jJ1b/U+E0MK/9yUzewXQw
phlcFFibYce+1qhJhQ3lIYb6O512vw+2Xk+G6JBZVuwzMVvUUJwJqfGRKCoobxZz
DRBIQJ9U4DRMethjfp5mP0H6nH7/fwKqvftKlsnOb9SXZregpcLV+ymrkkmW/Ey2
XuEHQqUbmD0zoPHvFgoUmAYlzmhxtmHK5uJDSH1aZ4b9IOzr2mV1RSt0xwo3BpTS
gwtDvmutV/JQ8RZMLLvw
=URtB
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-for-v3.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control fixes from Linus Walleij:
- Driver fixes for AM33xx, SIRF and PFC pin controllers
- Fix a compile warning from the pinctrl single-register driver
- Fix a little nasty memory leak
* tag 'pinctrl-for-v3.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
pinctrl: fix a memleak when freeing maps
pinctrl: pinctrl-single: fix compile warning when no CONFIG_PM
pinctrl: sh-pfc: fix SDHI0 VccQ regulator on sh73a0 with DT
arm/dts: sirf: fix the pingroup name mismatch between drivers and dts
pinctrl: sirf: add usp0_uart_nostreamctrl pin group for usp-uart without flowctrl
pinctrl: sirf: fix the pin number and mux bit for usp0
pinctrl: am33xx dt binding: correct include path
This patch adds a sample DT-based Bock-W "reference" implementation.
The use of platform-specific C-code should be avoided
with this configuration as much as possible.
This patch adds new r8a7778_add_dt_devices() which was same stance
of r8a7790_add_dt_devices()
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Future irqchip driver for Orion SoCs has a modified reg layout starting
from CAUSE register. The former DT irq driver stub just used what the
non-DT driver wants. Currently, orion5x is not ready for irqchip driver
because of legacy timer and missing DT clk provider. To ease future
conversion and just because orion-intc binding documentation already
reflects new reg layout, we convert orion5x DT now.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
With recent support for true irqchip and clocksource drivers for Orion
SoCs, now make use of it on DT enabled Kirkwood boards.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
With recent support for true irqchip and clocksource drivers for Orion
SoCs, now make use of it on DT enabled Dove boards.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch adds mv643xx_eth and mvmdio device tree nodes for DT enabled
Orion5x boards. Phy nodes are also added with reg property set on a
per-board basis.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch adds mv643xx_eth and mvmdio device tree nodes for DT enabled
Kirkwood boards. Phy nodes are also added with reg property set on a
per-board basis.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch adds orion-eth and mvmdio device tree nodes for DT enabled
Dove boards. As there is only one ethernet controller on Dove, a default
phy node is also added with a note to set its reg property on a per-board
basis.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Now that GMT G762 PWM Fan Controller is available upstream, let's add
missing bindings in Netgear ReadyNAS Duo v2 .dts file.
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Quoting from Documentation/leds/leds-class.txt:
LED Device Naming
=================
Is currently of the form:
"devicename:colour:function"
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch adds device node for TMU controller. There are 3
instances of the controllers so 3 nodes are created.
Acked-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Reviewed-by: Eduardo Valentin <eduardo.valentin@ti.com>
Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch introduces device tree sources for Samsung Trats 2 board
based on Exynos4412 SoC.
Currently support includes:
- eMMC,
- main PMIC (max77686),
- serial ports,
- GPIO keys,
- touchscreen.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The default audio module for the Arndale has a WM1811A on it. Add this to
the device tree bindings.
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
As part of this add nodes for the main wall supply as well as bucks 7
and 8 which are used to drop that down for several of the LDOs.
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Fixed voltage regulators (and other similar free standing things) are
supposed to go on a simple-bus for DT correctness reasons.
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The out of tree code configures a pullup on the line indicating that it
is an active low interrupt.
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* A few device tree source fixes regarding pinctrl, clock, and pwm
backlight.
* Fixes imx28 and imx51 audio driver failure caused by sgtl5000 codec
driver change by supplying the correct clock for codec.
* imx6q emi_sel clock muxing and imx6q-iomuxc-gpr macro fixes
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJR5B55AAoJEFBXWFqHsHzOEGoH/2DesLDZkQbUCn+w7Z3H7HYi
QAPeG1F/Ke3cBSaT+v/Z+46MgmU2gyQkxk08GRtPuVAZwCuWxSUN1H6+yakeBdHb
XGXR25RbbASIpYdYnC37eKiU2itiBmD7CRbWJ5xPHEluAgr47vr3OKfls6laii3b
nSM4sKz45PxBJ55M0qcE+A6oVdf9c+G0vm0aX14xEiLEUghB/U0KNKWp+B63hwfh
tg11gNwr2dO8jv51xpwJXH17juoZ46srOzmxERJm3j08JSz/tJSvIQajSsg54aLT
pAxToPAeuGGga5+7AanGT+repzZdd74Lp3U/lGw6WpaxLOpFf5Am3841O8qqCLw=
=q0LM
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes
From Shawn Guo, imx fixes for 3.11:
- A few device tree source fixes regarding pinctrl, clock, and pwm
backlight.
- Fixes imx28 and imx51 audio driver failure caused by sgtl5000 codec
driver change by supplying the correct clock for codec.
- imx6q emi_sel clock muxing and imx6q-iomuxc-gpr macro fixes
* tag 'imx-fixes-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: dts: imx51-babbage: Pass a real clock to the codec
ARM i.MX53: mba53: Fix PWM backlight DT node
ARM: imx: fix vf610 enet module clock selection
ARM: mxs: saif0 is the clock provider to sgtl5000
ARM: i.MX6Q: correct emi_sel clock muxing
ARM i.MX6Q: Fix IOMUXC GPR1 defines for ENET_CLK_SEL and IPU1/2_MUX
ARM: i.MX27: Typo fix
ARM: imx27: Fix documentation for SPLL clock
ARM i.MX53: Fix UART pad configuration
From Tony Lindgren:
Omap fixes mostly to deal with the dropping of platform data for omap4,
and to make v7_defconfig bootable on omap4 SDP with nfsroot.
* tag 'omap-for-v3.11/fixes-against-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Provide alias to USB PHY clock
ARM: dts: Add missing vmmc2 regulator for twl
ARM: multi_v7: Enabled omap4430 sdp nfsroot
This patch fixes a bug in pinctrl setup of serial2 device, Some of the
pins in the pinctrl node of serial2 do not belong to that
pin-controller. This patch divides them in the pins into there
respective pin controller nodes.
Without this patch serial on StiH416-B2000 Board will not work as it
fails with:
"st-pinctrl pin-controller-rear.3: failed to get pin(99) name
st-pinctrl pin-controller-rear.3: maps: function serial2 group serial2-0
num 4
pinconfig core: failed to register map default (3): no group/pin given"
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Enable build of EMEV2 and KZM9D DT Reference in
case of ARCH_MULTIPLATFORM and ARCH_SHMOBILE_MULTI.
IS_ENABLED() is leaves the clock-emev2.c file out
in case of COMMON_CLK=y.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Create two GPIO-controlled fixed-voltage regulators in the
kzm9g-reference DT and remove manual configuration of the corresponding
GPIOs from board code.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the pinctrl mappings in board code by device tree mappings.
For devices that are still instantiated from board code reference the
mappings as the default pin controller state to apply them at boot time.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the pinctrl mappings in board code by device tree mappings.
For devices that are still instantiated from board code reference the
mappings as the default pin controller state to apply them at boot time.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reference the st1232 reset GPIO from the device tree and remove it from
board code.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add pin mappings for the st1232 device to the device tree and reference
them as the default state for the device.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace the pinctrl mappings in board code by device tree mappings.
For devices that are still instantiated from board code reference the
mappings as the default pin controller state to apply them at boot time.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a pfc node to the sh73a0 device tree and remove manual pinmux
initialization from the corresponding board files.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a pfc node to the sh7372 device tree.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a pfc node to the r8a7790 device tree.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a pfc node to the r8a7779 device tree and remove manual pinmux
initialization from the corresponding board files.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a pfc node to the r8a7778 device tree.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a pfc node to the r8a7740 device tree and remove manual pinmux
initialization from the corresponding board files.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a pfc node to the r8a73a4 device tree.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
[g.liakhovetski+renesas@gmail.com use 2 nodes for address and size]
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
in drivers/pinctrl/sirf, pingroup name is cko0 and cko1, but in dts, they
are cko0 and cko1_rst. this patch fixes the error in dts.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
this patch adds the lost pin group which supports to let USP0 to simulate
a UART without hardware flow control.
Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Adding the PM configurations for PMC to support platform suspend.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Make the entry of Dalmore Power Management Unit device TPS65913
in dalmore DTS file. The Palma driver support this device.
Enable following submodule of the TPS65913:
- GPIO driver
- RTC driver.
- Power regulator driver.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren, fixed indentation and DT node sort order]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Fix the the gpio reg address for the device tree entry.
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Device Tree "num-ports" property of USB host node has to be
set to maximum number of ports available.
The possibility to activate a particular port is done by specifying the proper
gpio configuration for its vbus.
This patch fixes the USB host node by configuring the 3 ports available on the
product and letting "port A" available for USB gadget usage.
Reported-by: Rodolfo Giometti <giometti@enneenne.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Bo Shen <voice.shen@atmel.com>
This is sufficient to allow boot of the Lager board with
a console without boards-lager.c compiled into the kernel.
This is an example of a minimal but still useful initialisation
of the board using DT as much as possible.
As such it is the same as the boot of Lager that can be achieved
without a board file. The intention of adding this file
is to facilitate further work to allow board specific devices to be
initialised via DT.
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add CPUFreq support to ape6evm-reference, using a max8973 regulator, that
is supplying V_DVFS for the 4 CA15 cores on r8a73a4.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds a sample DT-based APE6EVM "reference" implementation. The
use of platform-specific C-code should be avoided with this configuration
as much as possible.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add support for the SMSC ethernet controller found
on the KZM9D board to the KZM9D DT Reference code.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add a DT reference implementation for the KZM9D board.
Only DT devices are used in this case. UART, STI, GPIO
and SMP / GIC are all provided by emev2.dtsi.
There is still a board specific C file used for enabling
legacy SH clocks. This file will be removed after we have
moved over to common clocks.
Signed-off-by: Magnus Damm <damm@opensource.se>
[horms+renesas@verge.net.au: Do not include trailing blank line in
board-kzm9d-reference.c ]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This adds DT templates for all MMCIF and SDHI controllers on r8a7790.
They are added with status="disabled". To use them platform-specific
DTs have to enable the required ones.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Richard Genoud