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4 Commits (880648b300fcc29e5755b5f18c0a82551fc09f8a)

Author SHA1 Message Date
Manivannan Sadhasivam 9f1e3c5966 pinctrl: Add drive strength support for BM1880 SoC
Add drive strength support for Bitmain BM1880 SoC.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-06-08 01:29:42 +02:00
Manivannan Sadhasivam 49bd61ebce pinctrl: Add pinconf support for BM1880 SoC
Add pinconf support for Bitmain BM1880 SoC. Pinconf support includes
pin bias, slew rate and schmitt trigger. Drive strength support will
be added later.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-24 13:54:08 +02:00
Manivannan Sadhasivam 8247b2474b pinctrl: Rework the pinmux handling for BM1880 SoC
Rework the BM1880 SoC pinmux handling by removing the
BM1880_PINMUX_FUNCTION_MUX define and merging it with the
BM1880_PINMUX_FUNCTION definition. Since the PWM muxing is handled by
generic pin controller in the SoC itself, there is no need to have a
dedicated code to do the muxing in PWM registers. So, lets club all
pinmux handling in the same per pin mux handling code.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-24 13:52:15 +02:00
Manivannan Sadhasivam 8f3f024696 pinctrl: Add pinctrl support for BM1880 SoC
Add pinctrl support for Bitmain BM1880 SoC. The driver only handles
pinmuxing as the SoC is not capable of handling pinconf.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-05-03 07:53:13 +01:00