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6 Commits (9ba7648cc9b363dd5597caf68968502493996ce5)

Author SHA1 Message Date
Vineet Gupta 9ba7648cc9 ARC: [dts] Rename cpu_intc -> core_intc 
This is again for future changes to use common DTSI for timers which
refer to @core_intc

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
 2016-05-09 09:32:29 +05:30
Vineet Gupta 2e8cd93877 ARCv2: [dts]: Introduce HS38 specific include DTS ... 
... and add them to plat-sim DTS.

This allows for future change to introduce timers in DT in single place

Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
 2016-05-09 09:32:29 +05:30
Vineet Gupta f759ee57b2 ARC: Ensure DT mem base is same as what kernel is built with 
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
 2015-10-28 16:13:42 +05:30
Vineet Gupta 090749502f ARC: add/fix some comments in code - no functional change 
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
 2015-08-20 19:05:49 +05:30
Alexey Brodkin e2fc61f384 ARCv2: [axs103] bump CPU frequency from 75 to 90 MHZ 
With up-to-date FPGA builds ARC cores are supposed to correctly operate
even with 90 MHz clock (which is a target frequency for AXS103 release).

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: arc-linux-dev@synopsys.com
 2015-07-09 17:36:31 +05:30
Vineet Gupta 5fa2daaa8d ARCv2: [axs103] Support ARC SDP FPGA platform for HS38x cores 
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
 2015-06-25 06:00:20 +05:30