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4 Commits (b138c331cbb1990857f2168fe6d981db1c41fa32)

Author SHA1 Message Date
Hou Zhiqiang 6d5b9d4c66 PCI: ls_gen4: WA for SERROR
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2019-11-25 16:29:23 +08:00
Hou Zhiqiang 7e3a04890a PCI: mobiveil: ls_pcie_g4: add Workaround for A-011451
When LX2 PCIe controller is sending multiple split completions and
ACK latency expires indicating that ACK should be send at priority.
But because of large number of split completions and FC update DLLP,
the controller does not give priority to ACK transmission. This
results into ACK latency timer timeout error at the link partner and
the pending TLPs are replayed by the link partner again.

Workaround:
1. Reduce the ACK latency timeout value to a very small value.
2. Restrict the number of completions from the LX2 PCIe controller
   to 1, by changing the Max Read Request Size (MRRS) of link partner
   to the same value as Max Packet size (MPS).

This patch implemented part 1, the part 2 can be set by kernel parameter
'pci=pcie_bus_perf'

This ERRATA is only for LX2160A Rev1.0, and it will be fixed
in Rev2.0.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2019-11-25 16:29:23 +08:00
Hou Zhiqiang efca0d2a58 PCI: mobiveil: ls_pcie_g4: add Workaround for A-011577
PCIe configuration access to non-existent function triggered
SERROR interrupt exception.

Workaround:
Disable error reporting on AXI bus during the Vendor ID read
transactions in enumeration.

This ERRATA is only for LX2160A Rev1.0, and it will be fixed
in Rev2.0.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2019-11-25 16:29:23 +08:00
Hou Zhiqiang 24e0514f88 PCI: mobiveil: Add PCIe Gen4 RC driver for NXP Layerscape SoCs
This PCIe controller is based on the Mobiveil GPEX IP, which is
compatible with the PCI Express™ Base Specification, Revision 4.0.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
2019-11-25 16:29:22 +08:00