To deal with IPs which are specific to dra74x and dra72x, maintain seperate
ocp interface lists, while keeping the common list for all common IPs.
Move USB OTG SS4 to dra74x only list since its unavailable in
dra72x and is giving an abort during boot. The dra72x only list
is empty for now and a placeholder for future hwmod additions which
are specific to dra72x.
Fixes: d904b38df0 ("ARM: DRA7: hwmod: Add SYSCONFIG for usb_otg_ss")
Reported-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
[paul@pwsan.com: fixed comment style to conform with CodingStyle]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
- Add device tree and hwmod data for various devices
for new SoCs
- Remove legacy mailbox hwmod data that's no longer
needed for SoCs that are DT only. Note that this may
cause a minor merge conflict in mach-omap2/devices.c
with omap_init_mbox() and omap_init_hdmi_audio(), both
are legacy code that is getting removed
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT0PR7AAoJEBvUPslcq6VzcUkP/RlSR5qip8BgSsar600B/W11
JFKl8t4VNcoutv109UYrmHaodYDsou6Sgj3QhZk1iQ8Sl76TCXDbF2LUtlpEt4VR
tpzr01o9gRw7SqxOxpIo6AB6owNmfiEhlRX9OsbGC5efgVFPJUO3ycK7ap2JdKbr
Cr976YBE6RVe5JDrQAbKGThilOoidOxUAFToXNbo72VM59V0E8J8LQQJHHs6oWeR
fz6p1sj1P45xUO8/LQ11Aaz5iQ/6bai4sHHZffFcglfjqxEHx5xFbFriEuUS5s+9
dmfyvP1fy7dkiLVFo5KZuDVUBMnLGFUWUWlmxf/dMH+dw4yjxRlyXSxLHa2U8vAO
ttRHBBCph5y2gxSYBvkVXdqV4DdgrIjS7yWUJBnXo+73N/8CfFjOv/kc7l7p2vCu
7uNa7c03+xVG/+EhZPMPxI4nzhb8KRLqZ9k8+FhIfvzuHdA2x//BGYvjmLdi84fk
aEptRjeM5Shvgf89r/OThAiQmQYjMCxUB16jcZVyTaIj6C3sFnudWJR/N0VEaPnZ
QdlbvgN9w+/cvWWFA1P11wgriDKWWS6nWz24tp/YvBI12cIl//NXO8FNv+sOV6Jt
zpjqJTa16c3SxPKTkv6yIzdB5h5Jxouw/EXzrT0Uj5gL0kRqwA17FEdySR31uSDl
F/T9CcZK7JMIx9uCQ8Hf
=lKl0
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.17/soc-new' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Merge "SoC related changes for omaps for v3.17 merge window"
from Tony Lindgren:
- Add device tree and hwmod data for various devices
for new SoCs
- Remove legacy mailbox hwmod data that's no longer
needed for SoCs that are DT only. Note that this may
cause a minor merge conflict in mach-omap2/devices.c
with omap_init_mbox() and omap_init_hdmi_audio(), both
are legacy code that is getting removed
* tag 'omap-for-v3.17/soc-new' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: DRA7: hwmod: Add data for RTC
arm: dra7xx: Add hwmod data for MDIO and CPSW
arm: dra7xx: Add hwmod data for pcie1 and pcie2 subsystems
arm: dra7xx: Add hwmod data for pcie1 phy and pcie2 phy
ARM: DRA7: hwmod: Add OCP2SCP3 module
ARM: DRA7: hwmod: remove interrupts for DMA
ARM: OMAP2+: DMA: remove requirement of irq for platform-dma driver
ARM: AM33xx: hwmod_data: Remove legacy mailbox addrs
ARM: OMAP4: hwmod_data: Remove legacy mailbox addrs
ARM: OMAP2: hwmod_data: Remove legacy mailbox data and addrs
ARM: OMAP2+: Avoid mailbox legacy device creation for DT-boot
ARM: DRA7: hwmod_data: Add mailbox hwmod data
ARM: dts: DRA7: Add mailbox nodes
ARM: dts: AM4372: Correct mailbox node data
ARM: dts: AM33xx: Add mailbox node
ARM: dts: OMAP4: Add mailbox node
ARM: dts: OMAP2+: Add mailbox fifo and user information
ARM: AM43xx: hwmod: add DSS hwmod data
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
although one patch adds DSS hwmods for AM43xx.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/hwmod-a-v3.17/20140722143514/
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJTztT1AAoJEMePsQ0LvSpLM90P/jT8Ea/hjZzsZwi48RD/xv5u
fFXVdb69jx0sS8HrXPIpuyLxYASFM4iRK7cJn6C0ptNj31mi+BKRhIH2xKdtxw/X
n+5UvBirHj+Vk3Sk2OVmb7oKslDlOCPQvwMkWfOQzF6CCujIqrhMhzzq71b6GfWb
KVmlsQoMWqApedcNHpoOLwvD+TZBbU4RRRtUb9owYXSPGReci4korT5SDADjfA7Y
nuGLk0YnkF2CsShORyM8BYrB1DXJjIk133d3xOK+blgV8slMik3af2N77CwWPTtP
P/qj8Uk3J787FG9nV8nq9aSpNZa8cOSIFSjdg2OhpwV5hX6wGJlnm5Q2sbQyzyxM
9Xe5L40i/F96F/vHDyCwTEdPoyu6VHysJG6qCGbsKp7rfEIj9WPhSZoi2hxqzxI5
furH0hwA68l68C+ujOsUX1xU8RfCrpEW8Knj69FBuHhX87x4Yoxc1KuIA4wabol3
8fEts6S99aVYit7GAoU2JnPzBCoE6aRT5Ns7rnswCqNFu4xKW8CkOLHR02MA2l0v
1TZPIFBGkHwU/r0U8VhLKqr/bGqVtPMyUJnmuGGoT3Wdcm1oi+Hk6940Hc8SqjAk
dIkIirS+08cpn4SuJJa+HrNMLmeFF2pqSumpAvr+kK2OFFhpnx9LHbq++JCMCIZB
0uOAyHGMtY9E/vTJwQgt
=csSf
-----END PGP SIGNATURE-----
Merge tag 'for-v3.17/omap-hwmod-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.17/soc
OMAP hwmod data additions for v3.17. Most of these are DRA7xx-related,
although one patch adds DSS hwmods for AM43xx.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/hwmod-a-v3.17/20140722143514/
Add hwmod data for RTC
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: updated to apply]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Adding hwmod data for CPSW and MDIO which is present in DRA7xx SoC
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Tested-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Added hwmod data for pcie1 and pcie2 subsystem present in DRA7xx SOC.
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Added hwmod data for pcie1 and pcie2 phy present in DRA7xx SOC.
Also added the missing CLKCTRL OFFSET macro and CONTEXT OFFSET macro
for pcie1 phy and pcie2 phy.
Cc: Tony Lindgren <tony@atomide.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This module is needed for the SATA and PCIe PHYs.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
DMA interrupts are now available in of, and the definitions are
duplicates in hwmod. This prevents us from dynamically allocating
interrupt resources for dma from devicetree.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the hwmod data for the 13 instances of the system mailbox
IP in DRA7 SoC. The patch is needed for performing a soft-reset
while configuring the respective mailbox instance, otherwise is
a non-essential change for functionality. The modules are smart
idled on reset, and the IP module mode is hardware controlled.
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the sysconfig class bits for the Super Speed USB
controllers
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Get rid of optional clock as that is now managed by the
AHCI platform driver.
Correct .mpu_rt_idx to 1 as the module register space (SYSCONFIG..)
is passed as the second memory resource in the device tree.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add nodes for the Super Speed USB controllers, omap-control-usb,
USB2 PHY and USB3 PHY devices.
Remove ocp2scp1 address space from hwmod data as it is
now provided via device tree.
CC: Benoît Cousson <bcousson@baylibre.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The spinlock module's SYSCONFIG register on DRA7xx does not
support smart wakeup, and also does not have the CLKACTIVITY
field. The sysc data for spinlock module has been appropriately
fixed up to reflect the same.
Cc: Ambresh K <ambresh@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
With commit '7dedd34: ARM: OMAP2+: hwmod: Fix a crash in _setup_reset() with
DEBUG_LL' we moved from parsing cmdline to identify uart used for earlycon
to using the requsite hwmod CONFIG_DEBUG_OMAPxUARTy FLAGS.
On DRA7 though, we seem to be missing this flag, and atleast on the DRA7 EVM
where we use uart1 for console, boot fails with DEBUG_LL enabled.
Reported-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com> # on a different base
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Fixes: 7dedd34694 ("ARM: OMAP2+: hwmod: Fix a crash in _setup_reset() with DEBUG_LL")
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Adding the hwmod data for DRA7XX platforms.
Signed-off-by: Ambresh K <ambresh@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Rajendra Nayak