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19 Commits (ba25f9dcc4ea6e30839fcab5a5516f2176d5bfed)

Author SHA1 Message Date
Tony Li 01db9953a7 [POWERPC] Add missing semicolon for fsl_pci.c
Signed-off-by: Tony Li <tony.li@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-16 09:06:43 -05:00
Kumar Gala 2fce1225af [POWERPC] FSL: Access PCIe LTSSM register with correct size
The LTSSM register is actual 32-bits wide so we should be doing a
dword access.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:37 -05:00
Jason Jin 61c5d3cde1 [POWERPC] Treat 8610 PCIe host bridge as transparent
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-10-08 08:38:26 -05:00
Kumar Gala 5d54ddcbcf [POWERPC] 85xx: Add basic Uniprocessor MPC8572 DS port
Added basic board port for MPC8572 DS reference platform that is
similiar to the MPC8544/33 DS reference platform in uniprocessor mode.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 08:51:54 -05:00
Kumar Gala 15f6ddc7d9 [POWERPC] Fix PCI Device ID for MPC8544/8533 processors
The initial user manuals for MPC8544/8533 had some issues with properly
documenting the device IDs for MPC8544/8533.  These processors are almost
identical and both show up on the reference boards.

Fix up the quirks for PCIe support to handle MPC8533/E.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-08-21 19:15:31 -05:00
Kumar Gala 282045b450 [POWREPC] Fixup a number of modpost warnings on ppc32
Fixed the following warnings:

WARNING: vmlinux.o(.text+0x2934): Section mismatch: reference to .init.text:__alloc_bootmem (between 'irq_alloc_host' and 'irq_set_default_host')
WARNING: vmlinux.o(.text+0xb2aa): Section mismatch: reference to .init.data:boot_command_line (between 'register_early_udbg_console' and 'udbg_printf')
WARNING: vmlinux.o(.text+0xb2b2): Section mismatch: reference to .init.data:boot_command_line (between 'register_early_udbg_console' and 'udbg_printf')
WARNING: vmlinux.o(.text+0xe354): Section mismatch: reference to .init.text:__alloc_bootmem (between 'pcibios_alloc_controller' and 'pci_domain_nr')
WARNING: vmlinux.o(.text+0x12768): Section mismatch: reference to .init.text:update_bridge_resource (between 'quirk_fsl_pcie_transparent' and 'indirect_read_config')
WARNING: vmlinux.o(.text+0x127a8): Section mismatch: reference to .init.text:update_bridge_resource (between 'quirk_fsl_pcie_transparent' and 'indirect_read_config')
WARNING: vmlinux.o(.text+0x17566c): Section mismatch: reference to .init.text:pcibios_fixup_bus (between 'pci_scan_child_bus' and 'pci_scan_bus_parented')

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-26 00:16:21 -05:00
Kumar Gala 7659c038d3 [POWERPC] Fix PCI indirect for big-endian cfg_addr
We didn't actually propogate the flag we pass into setup_indirect_pci()
to set indirect_type and thus were getting the wrong endianness if
PPC_INDIRECT_TYPE_BIG_ENDIAN was set.

Also, we need to or in additional flags rather than just doing a
direct assignment.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-25 00:29:53 -05:00
Kumar Gala e58712111f [POWERPC] 85xx: Added needed MPC85xx PCI device IDs
Added the MPC85xx PCI device IDs that we need for the quirks we have.

Also, fixed the MPC8567E, MPC8567 device IDs which had the wrong value.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-24 10:32:05 -05:00
Jon Loeliger c26c372cdb [POWERPC] Add Freescale PCI VENDOR ID and 8641 device IDs
Also add 8641/8641D device IDs as well.
All of which already exist or have been submitted to
The Linux PCI ID Repository at:
    http://pci-ids.ucw.cz/

CC-to: pci-ids@ucw.cz
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-24 10:31:58 -05:00
Kumar Gala eb12af4333 [POWERPC] FSL: Add support for PCI-X controllers
Some set of 85xx platforms have PCI-X controllers.  The old arch/ppc
code setup these controllers and we haven't moved it over to arch/powerpc.

We use the PCI-X Capabilties to know if we are in PCI-X mode instead
of the Global Utilities PORDEVSR.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 22:30:14 -05:00
Kumar Gala 7391ff35b2 [POWERPC] Make sure virtual P2P bridge registers are setup on PCIe PHB
For the Freescale PCIe PHBs Not all firmwares setup the virtual P2P
bridge registers properly.  Make sure they get setup based on what
the struct pci_controller got from the device tree.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 22:30:11 -05:00
Roy Zang f16dab981a [POWERPC] Add basic PCI/PCI Express support for 8544DS board
Add basic support for the PCIe PHB and enable the ULI bridge.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 22:30:02 -05:00
Kumar Gala 2e56ff206b [POWERPC] Make endianess of cfg_addr for indirect pci ops runtime
Make it so we do a runtime check to know if we need to write cfg_addr
as big or little endian.  This is needed if we want to allow 86xx support
to co-exist in the same kernel as other 6xx PPCs.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 22:29:09 -05:00
Kumar Gala aa3c112146 [POWERPC] 85xx: Added 8568 PCIe support
Added the PCIe device node to the 8568 dts and the needed quirk entries.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:08 -05:00
Kumar Gala 6c0a11c118 [POWERPC] Fixup resources on pci_bus for PCIe PHB when no device is connected
On the 85xx/86xx PCIe controllers if there is no device connected to the
PHB we will still allocate a pci_bus for downstream bus of the virtual
P2P bridge. However the resources allocated to the downstream bus are not
correct and so we just mimic the resources from the upstream pci_bus.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:08 -05:00
Roy Zang 3f6c5dae27 [POWERPC] Use Freescale pci/pcie common code for 85xx boards
Switch the 85xx platform over to using the FSL generic PCI code.  This
gets ups PCIe support in addition to base PCI support.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:08 -05:00
Kumar Gala 957ecffc25 [POWERPC] FSL: Cleanup how we detect if we are a PCIe controller
Use the PCI capabilities to determine if we are PCIe PHB.  Also use
PPC_INDIRECT_TYPE_NO_PCIE_LINK since the Freescale PCIe controllers
will lock the system if they don't have link and you try to do a config
access to anything but the PHB.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:07 -05:00
Zang Roy-r61911 9ac4dd301e [POWERPC] Rewrite Freescale PCI/PCIe support for 8{3,5,6}xx
Rewrite the Freescale PCI code to support PCI on 83xx/85xx/86xx and
PCIe on 85xx/86xx.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:07 -05:00
Roy Zang 55c44991e2 [POWERPC] Create common fsl pci/e files based on 86xx platforms
Move
arch/powerpc/platforms/86xx/pci.c -> arch/powerpc/sysdev/fsl_pci.c
arch/powerpc/sysdev/fsl_pcie.h -> arch/powerpc/sysdev/fsl_pci.h
as the base to unify 83xx/85xx/86xx pci and pcie.

Add CONFIG_FSL_PCI to build fsl_pci.c for Freescale pci and pcie option.
The code still works for 86xx platforms.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23 10:27:07 -05:00