4 Commits (bed98a59b62d3e121da2d8372425fd4e424b0aa6)

Author	SHA1	Message	Date
Sergei Shtylyov	bed98a59b6	ARM: dts: r8a7745: add Ether support ... Define the generic R8A7745 part of the Ether device node. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>	2016-11-23 20:52:30 +01:00
Sergei Shtylyov	e0d2da54c4	ARM: dts: r8a7745: add [H]SCIF{|A|B} support ... Describe [H]SCIF{|A|B} ports in the R8A7745 device tree. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> [simon: consistently use tabs for indentation] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>	2016-11-23 20:52:30 +01:00
Sergei Shtylyov	06a80bad04	ARM: dts: r8a7745: add SYS-DMAC support ... Describe SYS-DMAC0/1 in the R8A7745 device tree. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>	2016-11-23 20:52:29 +01:00
Sergei Shtylyov	c95360247b	ARM: dts: r8a7745: initial SoC device tree ... The initial R8A7745 SoC device tree including CPU0, GIC, timer, SYSC, RST, CPG, and the required clock descriptions. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>	2016-11-23 20:52:29 +01:00